blob: 20fd153a337bf80093bfb8e801b7ccb2fff4d1a1 [file] [log] [blame]
Zane Shelleyabc51c22020-11-09 21:35:35 -06001<?xml version="1.0" encoding="UTF-8"?>
Zane Shelleyf8a726b2020-12-16 21:29:32 -06002<attn_node model_ec="P10_10,P10_20" name="CFIR_TP_CS_RE" reg_type="SCOM">
Zane Shelleyabc51c22020-11-09 21:35:35 -06003 <register name="CFIR_TP_XSTOP">
4 <instance addr="0x01040000" reg_inst="0"/>
5 </register>
6 <register name="CFIR_TP_XSTOP_MASK">
7 <instance addr="0x01040040" reg_inst="0"/>
8 </register>
9 <register name="CFIR_TP_RECOV">
10 <instance addr="0x01040001" reg_inst="0"/>
11 </register>
12 <register name="CFIR_TP_RECOV_MASK">
13 <instance addr="0x01040041" reg_inst="0"/>
14 </register>
15 <rule attn_type="CS" node_inst="0">
16 <expr type="and">
17 <expr type="reg" value1="CFIR_TP_XSTOP"/>
18 <expr type="not">
19 <expr type="reg" value1="CFIR_TP_XSTOP_MASK"/>
20 </expr>
21 <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
22 </expr>
23 </rule>
24 <rule attn_type="RE" node_inst="0">
25 <expr type="and">
26 <expr type="reg" value1="CFIR_TP_RECOV"/>
27 <expr type="not">
28 <expr type="reg" value1="CFIR_TP_RECOV_MASK"/>
29 </expr>
30 <expr type="int" value1="0x0FFFFFFFFFFFFFFF"/>
31 </expr>
32 </rule>
33 <bit child_node="TP_LOCAL_FIR" node_inst="0" pos="4">Local FIR</bit>
34 <bit child_node="OCC_FIR" node_inst="0" pos="5">OCC Local Fault Isolation Register</bit>
35 <bit child_node="PBAO_FIR" node_inst="0" pos="6">PBA Local Fault Isolation Register. Register bits are set for any error condition detected by the PBA. The PBAFIR will freeze upon logging the first error not masked in PBAFIRMASK.</bit>
36</attn_node>