Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame^] | 1 | /* IBM_PROLOG_BEGIN_TAG */ |
| 2 | /* This is an automatically generated prolog. */ |
| 3 | /* */ |
| 4 | /* $Source: src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H $ */ |
| 5 | /* */ |
| 6 | /* OpenPOWER HostBoot Project */ |
| 7 | /* */ |
| 8 | /* Contributors Listed Below - COPYRIGHT 2012,2017 */ |
| 9 | /* [+] International Business Machines Corp. */ |
| 10 | /* */ |
| 11 | /* */ |
| 12 | /* Licensed under the Apache License, Version 2.0 (the "License"); */ |
| 13 | /* you may not use this file except in compliance with the License. */ |
| 14 | /* You may obtain a copy of the License at */ |
| 15 | /* */ |
| 16 | /* http://www.apache.org/licenses/LICENSE-2.0 */ |
| 17 | /* */ |
| 18 | /* Unless required by applicable law or agreed to in writing, software */ |
| 19 | /* distributed under the License is distributed on an "AS IS" BASIS, */ |
| 20 | /* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ |
| 21 | /* implied. See the License for the specific language governing */ |
| 22 | /* permissions and limitations under the License. */ |
| 23 | /* */ |
| 24 | /* IBM_PROLOG_END_TAG */ |
| 25 | |
| 26 | #ifndef REG_CACHE_H |
| 27 | #define REG_CACHE_H |
| 28 | |
| 29 | /** @file prdfRegisterCache.H */ |
| 30 | |
| 31 | #include <map> |
| 32 | #include <iipbits.h> |
| 33 | #include <prdfGlobal.H> |
| 34 | #include <prdfScanFacility.H> |
| 35 | #include <prdfScomRegisterAccess.H> |
| 36 | #include <prdfTargetFwdRef.H> |
| 37 | |
| 38 | class BitString; |
| 39 | |
| 40 | namespace PRDF |
| 41 | { |
| 42 | /** |
| 43 | * @brief Caches the contents of registers used during analysis. |
| 44 | * |
| 45 | * It maintains the latest content of a register in a map. If contents of the |
| 46 | * register remain unchanged, register read returns contents stored in |
| 47 | * cache rather than reading from hardware. Hence it brings efficiency in read. |
| 48 | * Whenever write to actual hardware takes place, it is expected that once write |
| 49 | * to hardware succeeds, the user of cache shall call flush. It drops the |
| 50 | * particular register from map. As a result, when read takes place from same |
| 51 | * register next time, read from cache fails and actual access to hardware |
| 52 | * takes place. |
| 53 | */ |
| 54 | class RegDataCache |
| 55 | { |
| 56 | public: |
| 57 | |
| 58 | /** |
| 59 | * @brief Constructor |
| 60 | */ |
| 61 | RegDataCache() |
| 62 | { } |
| 63 | |
| 64 | /** |
| 65 | * @brief Destructor |
| 66 | */ |
| 67 | ~RegDataCache(); |
| 68 | |
| 69 | /** |
| 70 | * @brief Returns reference to singleton instance of the RegDataCache. |
| 71 | * @return The singleton reference. |
| 72 | */ |
| 73 | static RegDataCache & getCachedRegisters(); |
| 74 | |
| 75 | /** |
| 76 | * @brief Returns the data buffer for the given target and address. |
| 77 | * @param i_chip The target associated with the register. |
| 78 | * @param i_reg Pointer to register to be read. |
| 79 | * @return A reference to the data buffer associated with the register. |
| 80 | */ |
| 81 | BitString & read( ExtensibleChip * i_chip, |
| 82 | const SCAN_COMM_REGISTER_CLASS * i_reg ); |
| 83 | |
| 84 | /** |
| 85 | * @brief Flushes entire contents from cache. |
| 86 | */ |
| 87 | void flush(); |
| 88 | |
| 89 | /** |
| 90 | * @brief Removes a single entry from the cache. |
| 91 | * @param i_pChip The rulechip associated with the register. |
| 92 | * @param i_pRegister points to the register to be flushed from cache. |
| 93 | */ |
| 94 | void flush( ExtensibleChip* i_pChip, |
| 95 | const SCAN_COMM_REGISTER_CLASS * i_pRegister ); |
| 96 | /** |
| 97 | * @brief Queries if a specific entry exist in cache. |
| 98 | * @param i_pChip The rulechip associated with the register. |
| 99 | * @param i_pRegister base part of register entry to be queried in cache. |
| 100 | * @return pointer to cache entry associated with a given register |
| 101 | */ |
| 102 | BitString * queryCache( ExtensibleChip* i_pChip, |
| 103 | const SCAN_COMM_REGISTER_CLASS * i_pRegister )const; |
| 104 | /** |
| 105 | * @brief Queries if a specific entry exist in cache. |
| 106 | * @param i_scomAccessKey Reference to register to be queried. |
| 107 | * @return pointer to cache entry associated with a given register |
| 108 | */ |
| 109 | |
| 110 | BitString * queryCache( |
| 111 | const ScomRegisterAccess & i_scomAccessKey )const; |
| 112 | private: // data |
| 113 | |
| 114 | typedef std::map<ScomRegisterAccess, BitString *> CacheDump; |
| 115 | CacheDump iv_cachedRead; |
| 116 | |
| 117 | }; |
| 118 | |
| 119 | PRDF_DECLARE_SINGLETON(RegDataCache, ReadCache); |
| 120 | |
| 121 | } // namespace PRDF |
| 122 | |
| 123 | #endif // REG_CACHE_H |
| 124 | |