Zane Shelley | fd3f9cc | 2019-07-29 15:02:24 -0500 | [diff] [blame^] | 1 | /* IBM_PROLOG_BEGIN_TAG */ |
| 2 | /* This is an automatically generated prolog. */ |
| 3 | /* */ |
| 4 | /* $Source: src/usr/diag/prdf/common/framework/register/prdfScomRegister.C $ */ |
| 5 | /* */ |
| 6 | /* OpenPOWER HostBoot Project */ |
| 7 | /* */ |
| 8 | /* Contributors Listed Below - COPYRIGHT 2012,2017 */ |
| 9 | /* [+] International Business Machines Corp. */ |
| 10 | /* */ |
| 11 | /* */ |
| 12 | /* Licensed under the Apache License, Version 2.0 (the "License"); */ |
| 13 | /* you may not use this file except in compliance with the License. */ |
| 14 | /* You may obtain a copy of the License at */ |
| 15 | /* */ |
| 16 | /* http://www.apache.org/licenses/LICENSE-2.0 */ |
| 17 | /* */ |
| 18 | /* Unless required by applicable law or agreed to in writing, software */ |
| 19 | /* distributed under the License is distributed on an "AS IS" BASIS, */ |
| 20 | /* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ |
| 21 | /* implied. See the License for the specific language governing */ |
| 22 | /* permissions and limitations under the License. */ |
| 23 | /* */ |
| 24 | /* IBM_PROLOG_END_TAG */ |
| 25 | |
| 26 | // Module Description ************************************************** |
| 27 | // |
| 28 | // Description: This module provides the implementation for the PRD Scan |
| 29 | // Comm Register Chip class. |
| 30 | // |
| 31 | // End Module Description ********************************************** |
| 32 | |
| 33 | //---------------------------------------------------------------------- |
| 34 | // Includes |
| 35 | //---------------------------------------------------------------------- |
| 36 | |
| 37 | #include <iipchip.h> |
| 38 | #include <prdfScomRegister.H> |
| 39 | #include <iipconst.h> |
| 40 | #include <iipbits.h> |
| 41 | #include <prdfMain.H> |
| 42 | #include <prdfRasServices.H> |
| 43 | #include <prdfRegisterCache.H> |
| 44 | #include <prdfHomRegisterAccess.H> |
| 45 | #include <prdfPlatServices.H> |
| 46 | #include <prdfExtensibleChip.H> |
| 47 | |
| 48 | //---------------------------------------------------------------------- |
| 49 | // User Types |
| 50 | //---------------------------------------------------------------------- |
| 51 | |
| 52 | //---------------------------------------------------------------------- |
| 53 | // Constants |
| 54 | //---------------------------------------------------------------------- |
| 55 | |
| 56 | //---------------------------------------------------------------------- |
| 57 | // Macros |
| 58 | //---------------------------------------------------------------------- |
| 59 | |
| 60 | //---------------------------------------------------------------------- |
| 61 | // Internal Function Prototypes |
| 62 | //---------------------------------------------------------------------- |
| 63 | |
| 64 | //---------------------------------------------------------------------- |
| 65 | // Global Variables |
| 66 | //---------------------------------------------------------------------- |
| 67 | |
| 68 | //--------------------------------------------------------------------- |
| 69 | // Member Function Specifications |
| 70 | //--------------------------------------------------------------------- |
| 71 | |
| 72 | // -------------------------------------------------------------------- |
| 73 | namespace PRDF |
| 74 | { |
| 75 | |
| 76 | // --------------------------------------------------------------------- |
| 77 | |
| 78 | void ScomRegister::SetBitString( const BitString *bs ) |
| 79 | { |
| 80 | BitString & l_string = AccessBitString(); |
| 81 | l_string.setString(*bs); |
| 82 | } |
| 83 | |
| 84 | |
| 85 | //------------------------------------------------------------------------------ |
| 86 | |
| 87 | const BitString * ScomRegister::GetBitString(ATTENTION_TYPE i_type) const |
| 88 | { |
| 89 | // Calling Read() will ensure that an entry exists in the cache and the |
| 90 | // entry has at been synched with hardware at least once. Note that we |
| 91 | // cannot read hardware for write-only registers. In this case, an entry |
| 92 | // will be created in the cache, if it does not exist, when readCache() is |
| 93 | // called below. |
| 94 | if ( ( ACCESS_NONE != iv_operationType ) && |
| 95 | ( ACCESS_WO != iv_operationType ) ) |
| 96 | { |
| 97 | Read(); |
| 98 | } |
| 99 | return &(readCache()); |
| 100 | } |
| 101 | |
| 102 | //------------------------------------------------------------------------------ |
| 103 | |
| 104 | BitString & ScomRegister::AccessBitString() |
| 105 | { |
| 106 | // Calling Read() will ensure that an entry exists in the cache and the |
| 107 | // entry has at been synched with hardware at least once. Note that we |
| 108 | // cannot read hardware for write-only registers. In this case, an entry |
| 109 | // will be created in the cache, if it does not exist, when readCache() is |
| 110 | // called below. |
| 111 | if ( ( ACCESS_NONE != iv_operationType ) && |
| 112 | ( ACCESS_WO != iv_operationType ) ) |
| 113 | { |
| 114 | Read(); |
| 115 | } |
| 116 | |
| 117 | return readCache(); |
| 118 | } |
| 119 | |
| 120 | //------------------------------------------------------------------------------ |
| 121 | |
| 122 | uint32_t ScomRegister::Read() const |
| 123 | { |
| 124 | uint32_t o_rc = SUCCESS; |
| 125 | |
| 126 | // First query the cache for an existing entry. |
| 127 | if ( !queryCache() ) |
| 128 | { |
| 129 | // There was not a previous entry in the cache, so do a ForceRead() to |
| 130 | // sync the cache with hardware. |
| 131 | o_rc = ForceRead(); |
| 132 | } |
| 133 | |
| 134 | return o_rc; |
| 135 | } |
| 136 | |
| 137 | //------------------------------------------------------------------------------ |
| 138 | |
| 139 | uint32_t ScomRegister::ForceRead() const |
| 140 | { |
| 141 | #define PRDF_FUNC "[ScomRegister::ForceRead] " |
| 142 | |
| 143 | uint32_t o_rc = FAIL; |
| 144 | |
| 145 | do |
| 146 | { |
| 147 | // No read allowed if register access attribute is write-only or no |
| 148 | // access. |
| 149 | if ( ( ACCESS_NONE == iv_operationType ) && |
| 150 | ( ACCESS_WO == iv_operationType ) ) |
| 151 | { |
| 152 | PRDF_ERR( PRDF_FUNC "Write-only register: 0x%08x 0x%016llx", |
| 153 | getChip()->GetId(), iv_scomAddress ); |
| 154 | break; |
| 155 | } |
| 156 | |
| 157 | // Read hardware. |
| 158 | o_rc = Access( readCache(), MopRegisterAccess::READ ); |
| 159 | if ( SUCCESS != o_rc ) |
| 160 | { |
| 161 | // The read failed. Remove the entry from the cache so a subsequent |
| 162 | // Read() will attempt to read from hardware again. |
| 163 | flushCache( getChip() ); |
| 164 | } |
| 165 | |
| 166 | } while (0); |
| 167 | |
| 168 | return o_rc; |
| 169 | |
| 170 | #undef PRDF_FUNC |
| 171 | } |
| 172 | |
| 173 | //------------------------------------------------------------------------------ |
| 174 | |
| 175 | uint32_t ScomRegister::Write() |
| 176 | { |
| 177 | #define PRDF_FUNC "[ScomRegister::Write] " |
| 178 | |
| 179 | uint32_t o_rc = FAIL; |
| 180 | |
| 181 | do |
| 182 | { |
| 183 | // No write allowed if register access attribute is read-only or no |
| 184 | // access. |
| 185 | if ( ( ACCESS_NONE == iv_operationType ) && |
| 186 | ( ACCESS_RO == iv_operationType ) ) |
| 187 | { |
| 188 | PRDF_ERR( PRDF_FUNC "Read-only register: 0x%08x 0x%016llx", |
| 189 | getChip()->GetId(), iv_scomAddress ); |
| 190 | break; |
| 191 | } |
| 192 | |
| 193 | // Query the cache for an existing entry. |
| 194 | if ( !queryCache() ) |
| 195 | { |
| 196 | // Something bad happened and there was nothing in the cache to |
| 197 | // write to hardware. |
| 198 | PRDF_ERR( PRDF_FUNC "No entry found in cache: 0x%08x 0x%016llx", |
| 199 | getChip()->GetId(), iv_scomAddress ); |
| 200 | break; |
| 201 | } |
| 202 | |
| 203 | // Write hardware. |
| 204 | o_rc = Access( readCache(), MopRegisterAccess::WRITE ); |
| 205 | |
| 206 | } while (0); |
| 207 | |
| 208 | return o_rc; |
| 209 | |
| 210 | #undef PRDF_FUNC |
| 211 | } |
| 212 | |
| 213 | //------------------------------------------------------------------------------ |
| 214 | |
| 215 | uint32_t ScomRegister::Access( BitString & bs, |
| 216 | MopRegisterAccess::Operation op ) const |
| 217 | { |
| 218 | int32_t l_rc = SCR_ACCESS_FAILED; |
| 219 | TARGETING::TargetHandle_t i_pchipTarget = getChip()->GetChipHandle(); |
| 220 | l_rc = getScomService().Access( i_pchipTarget,bs,iv_scomAddress,op ); |
| 221 | |
| 222 | return(l_rc); |
| 223 | } |
| 224 | //----------------------------------------------------------------------------- |
| 225 | ExtensibleChip* ScomRegister::getChip( )const |
| 226 | { |
| 227 | ExtensibleChip* l_pchip = NULL; |
| 228 | l_pchip = ServiceDataCollector::getChipAnalyzed(); |
| 229 | TARGETING::TYPE l_type = PlatServices::getTargetType( |
| 230 | l_pchip->GetChipHandle() ); |
| 231 | PRDF_ASSERT( iv_chipType == l_type ) |
| 232 | return l_pchip; |
| 233 | } |
| 234 | |
| 235 | //------------------------------------------------------------------------------ |
| 236 | |
| 237 | bool ScomRegister::queryCache() const |
| 238 | { |
| 239 | RegDataCache & cache = RegDataCache::getCachedRegisters(); |
| 240 | BitString * bs = cache.queryCache( getChip(), this ); |
| 241 | return ( NULL != bs ); |
| 242 | } |
| 243 | |
| 244 | //------------------------------------------------------------------------------ |
| 245 | |
| 246 | BitString & ScomRegister::readCache() const |
| 247 | { |
| 248 | RegDataCache & cache = RegDataCache::getCachedRegisters(); |
| 249 | return cache.read( getChip(), this ); |
| 250 | } |
| 251 | |
| 252 | //------------------------------------------------------------------------------ |
| 253 | |
| 254 | void ScomRegister::flushCache( ExtensibleChip *i_pChip ) const |
| 255 | { |
| 256 | RegDataCache & regDump = RegDataCache::getCachedRegisters(); |
| 257 | if( NULL == i_pChip ) |
| 258 | { |
| 259 | regDump.flush(); |
| 260 | } |
| 261 | else |
| 262 | { |
| 263 | regDump.flush( i_pChip ,this ); |
| 264 | } |
| 265 | } |
| 266 | |
| 267 | //----------------------------------------------------------------------------- |
| 268 | |
| 269 | bool ScomRegister::operator == ( const ScomRegister & i_rightRegister ) const |
| 270 | { |
| 271 | if( iv_scomAddress == i_rightRegister.GetAddress() ) |
| 272 | { |
| 273 | return ( iv_chipType == i_rightRegister.getChipType() ); |
| 274 | } |
| 275 | else |
| 276 | { |
| 277 | return false ; |
| 278 | } |
| 279 | |
| 280 | } |
| 281 | |
| 282 | //----------------------------------------------------------------------------- |
| 283 | bool ScomRegister::operator < ( const ScomRegister & i_rightRegister ) const |
| 284 | { |
| 285 | if( iv_scomAddress == i_rightRegister.GetAddress() ) |
| 286 | { |
| 287 | return ( iv_chipType < i_rightRegister.getChipType() ); |
| 288 | } |
| 289 | else |
| 290 | { |
| 291 | return( iv_scomAddress < i_rightRegister.GetAddress() ); |
| 292 | } |
| 293 | |
| 294 | |
| 295 | } |
| 296 | //----------------------------------------------------------------------------- |
| 297 | bool ScomRegister::operator >= ( const ScomRegister & i_rightRegister ) const |
| 298 | { |
| 299 | return !( *this < i_rightRegister ); |
| 300 | } |
| 301 | }//namespace PRDF ends |