| From 0868dedda1b7b8112870dcc69f887d32a51b94b6 Mon Sep 17 00:00:00 2001 |
| From: Nagaraju Mekala <nmekala@xilix.com> |
| Date: Fri, 28 Sep 2018 12:04:55 +0530 |
| Subject: [PATCH 18/52] -Fixed MB-x relocation issues -Added imml for required |
| MB-x instructions |
| |
| --- |
| bfd/elf64-microblaze.c | 68 ++++++++++++++--- |
| gas/config/tc-microblaze.c | 152 +++++++++++++++++++++++++++---------- |
| gas/tc.h | 2 +- |
| 3 files changed, 167 insertions(+), 55 deletions(-) |
| |
| Index: gdb-9.2/bfd/elf64-microblaze.c |
| =================================================================== |
| --- gdb-9.2.orig/bfd/elf64-microblaze.c |
| +++ gdb-9.2/bfd/elf64-microblaze.c |
| @@ -1488,8 +1488,17 @@ microblaze_elf_relocate_section (bfd *ou |
| relocation -= (input_section->output_section->vma |
| + input_section->output_offset |
| + offset + INST_WORD_SIZE); |
| - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, |
| + unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
| + if (insn == 0xb2000000 || insn == 0xb2ffffff) |
| + { |
| + insn &= ~0x00ffffff; |
| + insn |= (relocation >> 16) & 0xffffff; |
| + bfd_put_32 (input_bfd, insn, |
| contents + offset + endian); |
| + } |
| + else |
| + bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, |
| + contents + offset + endian); |
| bfd_put_16 (input_bfd, relocation & 0xffff, |
| contents + offset + endian + INST_WORD_SIZE); |
| } |
| @@ -1580,11 +1589,28 @@ microblaze_elf_relocate_section (bfd *ou |
| else |
| { |
| if (r_type == R_MICROBLAZE_64_PCREL) |
| - relocation -= (input_section->output_section->vma |
| - + input_section->output_offset |
| - + offset + INST_WORD_SIZE); |
| - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, |
| + { |
| + if (!input_section->output_section->vma && |
| + !input_section->output_offset && !offset) |
| + relocation -= (input_section->output_section->vma |
| + + input_section->output_offset |
| + + offset); |
| + else |
| + relocation -= (input_section->output_section->vma |
| + + input_section->output_offset |
| + + offset + INST_WORD_SIZE); |
| + } |
| + unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
| + if (insn == 0xb2000000 || insn == 0xb2ffffff) |
| + { |
| + insn &= ~0x00ffffff; |
| + insn |= (relocation >> 16) & 0xffffff; |
| + bfd_put_32 (input_bfd, insn, |
| contents + offset + endian); |
| + } |
| + else |
| + bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, |
| + contents + offset + endian); |
| bfd_put_16 (input_bfd, relocation & 0xffff, |
| contents + offset + endian + INST_WORD_SIZE); |
| } |
| @@ -1703,9 +1729,19 @@ static void |
| microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
| { |
| unsigned long instr = bfd_get_32 (abfd, bfd_addr); |
| - instr &= ~0x0000ffff; |
| - instr |= (val & 0x0000ffff); |
| - bfd_put_32 (abfd, instr, bfd_addr); |
| + |
| + if (instr == 0xb2000000 || instr == 0xb2ffffff) |
| + { |
| + instr &= ~0x00ffffff; |
| + instr |= (val & 0xffffff); |
| + bfd_put_32 (abfd, instr, bfd_addr); |
| + } |
| + else |
| + { |
| + instr &= ~0x0000ffff; |
| + instr |= (val & 0x0000ffff); |
| + bfd_put_32 (abfd, instr, bfd_addr); |
| + } |
| } |
| |
| /* Read-modify-write into the bfd, an immediate value into appropriate fields of |
| @@ -1717,10 +1753,18 @@ microblaze_bfd_write_imm_value_64 (bfd * |
| unsigned long instr_lo; |
| |
| instr_hi = bfd_get_32 (abfd, bfd_addr); |
| - instr_hi &= ~0x0000ffff; |
| - instr_hi |= ((val >> 16) & 0x0000ffff); |
| - bfd_put_32 (abfd, instr_hi, bfd_addr); |
| - |
| + if (instr_hi == 0xb2000000 || instr_hi == 0xb2ffffff) |
| + { |
| + instr_hi &= ~0x00ffffff; |
| + instr_hi |= (val >> 16) & 0xffffff; |
| + bfd_put_32 (abfd, instr_hi,bfd_addr); |
| + } |
| + else |
| + { |
| + instr_hi &= ~0x0000ffff; |
| + instr_hi |= ((val >> 16) & 0x0000ffff); |
| + bfd_put_32 (abfd, instr_hi, bfd_addr); |
| + } |
| instr_lo = bfd_get_32 (abfd, bfd_addr + INST_WORD_SIZE); |
| instr_lo &= ~0x0000ffff; |
| instr_lo |= (val & 0x0000ffff); |