Add meta-xilinx subtree
Import git://git.yoctoproject.org/meta-xilinx from 5fccc46503 as
meta-xilinx subtree.
Change-Id: I3d59bcf3a57cee588aab7f5cdd0287af66450c8a
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi
new file mode 100644
index 0000000..0f678d3
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi
@@ -0,0 +1,63 @@
+/*
+ * CAUTION: This file is automatically generated by Xilinx.
+ * Version: HSI 2015.4
+ * Today is: Fri Mar 4 15:40:49 2016
+*/
+
+
+/ {
+ cpus {
+ cpu@0 {
+ operating-points = <650000 1000000 325000 1000000>;
+ };
+ };
+};
+&gem0 {
+ phy-mode = "rgmii-id";
+ status = "okay";
+ xlnx,ptp-enet-clock = <0x6750918>;
+};
+&gpio0 {
+ emio-gpio-width = <64>;
+ gpio-mask-high = <0x0>;
+ gpio-mask-low = <0x5600>;
+};
+&i2c0 {
+ clock-frequency = <400000>;
+ status = "okay";
+};
+&i2c1 {
+ clock-frequency = <400000>;
+ status = "okay";
+};
+&intc {
+ num_cpus = <2>;
+ num_interrupts = <96>;
+};
+&qspi {
+ is-dual = <0>;
+ num-cs = <1>;
+ status = "okay";
+};
+&sdhci0 {
+ status = "okay";
+ xlnx,has-cd = <0x1>;
+ xlnx,has-power = <0x0>;
+ xlnx,has-wp = <0x1>;
+};
+&uart1 {
+ current-speed = <115200>;
+ device_type = "serial";
+ port-number = <0>;
+ status = "okay";
+};
+&usb0 {
+ dr_mode = "host";
+ phy_type = "ulpi";
+ status = "okay";
+ usb-reset = <&gpio0 46 0>;
+};
+&clkc {
+ fclk-enable = <0x3>;
+ ps-clk-frequency = <50000000>;
+};