| Brad Bishop | 286d45c | 2018-10-02 15:21:57 -0400 | [diff] [blame^] | 1 | From 2d90c10cf4d95999f68f474305828c7dfc51af18 Mon Sep 17 00:00:00 2001 |
| 2 | From: Nathan Rossi <nathan@nathanrossi.com> |
| 3 | Date: Thu, 12 Nov 2015 16:09:31 +1000 |
| 4 | Subject: [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3' insn definitions |
| 5 | |
| 6 | Change adddi3 to handle DI immediates as the second operand, this |
| 7 | requires modification to the output template however reduces the need to |
| 8 | specify seperate templates for 16-bit positive/negative immediate |
| 9 | operands. The use of 32-bit immediates for the addi and addic |
| 10 | instructions is handled by the assembler, which will emit the imm |
| 11 | instructions when required. This conveniently handles the optimizable |
| 12 | cases where the immediate constant value does not need the higher half |
| 13 | words of the operands upper/lower words. |
| 14 | |
| 15 | Change the constraints of the subdi3 instruction definition such that it |
| 16 | does not match the second operand as an immediate value. This is because |
| 17 | there is no definition to handle this case nor is it possible to |
| 18 | implement purely with instructions as microblaze does not provide an |
| 19 | instruction to perform a forward arithmetic subtraction (it only |
| 20 | provides reverse 'rD = IMM - rA'). |
| 21 | |
| 22 | Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> |
| 23 | Upstream-Status: Unsubmitted |
| 24 | --- |
| 25 | gcc/config/microblaze/microblaze.md | 13 ++++++------- |
| 26 | 1 file changed, 6 insertions(+), 7 deletions(-) |
| 27 | |
| 28 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
| 29 | index b3a0011fd7..8a372d7ebb 100644 |
| 30 | --- a/gcc/config/microblaze/microblaze.md |
| 31 | +++ b/gcc/config/microblaze/microblaze.md |
| 32 | @@ -483,17 +483,16 @@ |
| 33 | ;; Adding 2 DI operands in register or reg/imm |
| 34 | |
| 35 | (define_insn "adddi3" |
| 36 | - [(set (match_operand:DI 0 "register_operand" "=d,d,d") |
| 37 | - (plus:DI (match_operand:DI 1 "register_operand" "%d,d,d") |
| 38 | - (match_operand:DI 2 "arith_operand32" "d,P,N")))] |
| 39 | + [(set (match_operand:DI 0 "register_operand" "=d,d") |
| 40 | + (plus:DI (match_operand:DI 1 "register_operand" "%d,d") |
| 41 | + (match_operand:DI 2 "arith_operand" "d,i")))] |
| 42 | "" |
| 43 | "@ |
| 44 | add\t%L0,%L1,%L2\;addc\t%M0,%M1,%M2 |
| 45 | - addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0 |
| 46 | - addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0\;addi\t%M0,%M0,-1" |
| 47 | + addi\t%L0,%L1,%j2\;addic\t%M0,%M1,%h2" |
| 48 | [(set_attr "type" "darith") |
| 49 | (set_attr "mode" "DI") |
| 50 | - (set_attr "length" "8,8,12")]) |
| 51 | + (set_attr "length" "8,8")]) |
| 52 | |
| 53 | ;;---------------------------------------------------------------- |
| 54 | ;; Subtraction |
| 55 | @@ -530,7 +529,7 @@ |
| 56 | (define_insn "subdi3" |
| 57 | [(set (match_operand:DI 0 "register_operand" "=&d") |
| 58 | (minus:DI (match_operand:DI 1 "register_operand" "d") |
| 59 | - (match_operand:DI 2 "arith_operand32" "d")))] |
| 60 | + (match_operand:DI 2 "register_operand" "d")))] |
| 61 | "" |
| 62 | "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" |
| 63 | [(set_attr "type" "darith") |
| 64 | -- |
| 65 | 2.14.2 |
| 66 | |