PFR Checkpoint register address change
Due to register repurpose PFR proposed to change the
boot checkpoint register address from 0x0F to 0x60 in
latest PFR.
Tested: Tested BMC boot flow on PFR platforms.
Signed-off-by: Vikram Bodireddy <vikram.bodireddy@linux.intel.com>
Change-Id: I9be296efcf60165d2f308c97607581e00140e57f
diff --git a/libpfr/src/pfr.cpp b/libpfr/src/pfr.cpp
index 7a8b136..536abe9 100644
--- a/libpfr/src/pfr.cpp
+++ b/libpfr/src/pfr.cpp
@@ -45,7 +45,8 @@
static constexpr uint8_t majorErrorCode = 0x08;
static constexpr uint8_t minorErrorCode = 0x09;
static constexpr uint8_t provisioningStatus = 0x0A;
-static constexpr uint8_t bmcBootCheckpoint = 0x0F;
+static constexpr uint8_t bmcBootCheckpointRev1 = 0x0F;
+static constexpr uint8_t bmcBootCheckpoint = 0x60;
static constexpr uint8_t pchActiveMajorVersion = 0x15;
static constexpr uint8_t pchActiveMinorVersion = 0x16;
static constexpr uint8_t pchRecoveryMajorVersion = 0x1B;
@@ -436,10 +437,34 @@
int setBMCBootCheckpoint(const uint8_t checkPoint)
{
+ uint8_t bmcBootCheckpointReg = bmcBootCheckpoint;
+
+ // check if reg 0x01(RoTRev) is 1 or 2.
+ // checkpoint register changes for RoT Rev 1 and 2
+ uint8_t cpldRoTRev = 0;
try
{
I2CFile cpldDev(i2cBusNumber, i2cSlaveAddress, O_RDWR | O_CLOEXEC);
- cpldDev.i2cWriteByteData(bmcBootCheckpoint, checkPoint);
+ cpldRoTRev = cpldDev.i2cReadByteData(cpldROTVersion);
+ }
+ catch (const std::exception& e)
+ {
+ phosphor::logging::log<phosphor::logging::level::ERR>(
+ "Exception caught in reading RoT rev.",
+ phosphor::logging::entry("MSG=%s", e.what()));
+ return -1;
+ }
+
+ // latest PFR has different check point register
+ if (cpldRoTRev <= 1)
+ {
+ bmcBootCheckpointReg = bmcBootCheckpointRev1;
+ }
+
+ try
+ {
+ I2CFile cpldDev(i2cBusNumber, i2cSlaveAddress, O_RDWR | O_CLOEXEC);
+ cpldDev.i2cWriteByteData(bmcBootCheckpointReg, checkPoint);
phosphor::logging::log<phosphor::logging::level::INFO>(
"Successfully set the PFR CPLD checkpoint 9.");
return 0;