blob: 7acf3545d61b825e0604a166efbee8c6c12121a9 [file] [log] [blame]
Brad Bishopa948d262016-10-05 19:51:48 -04001description: >
2 Implement to provide CPU attributes.
Cheng C Yang259f49e2020-02-25 10:07:32 +08003properties:
4 - name: Socket
5 type: string
6 description: >
7 Processor Socket designation on MotherBoard.
Brad Bishop6258c4f2022-09-14 10:53:57 -04008 default: ""
Cheng C Yang259f49e2020-02-25 10:07:32 +08009 - name: Family
10 type: string
11 description: >
12 A free form string indicates processor family type.
13 For example, values can be "Intel Xeon
14 processor", "AS400 Family", etc.
Brandon Kim8d3d5a22021-10-06 12:51:31 -070015 - name: EffectiveFamily
16 type: uint16
17 description: >
18 The effective Family information as provided by the
19 manufacturer of this processor in unsigned integer.
20 Default set to 0x02 which is defined as "Unknown" Processor
21 Family in DSP0134 section 7.5.2.
22 default: 0x02
23 - name: EffectiveModel
24 type: uint16
Brandon Kim40a42aa2021-09-09 19:17:04 -070025 description: >
26 The effective Model information as provided by the
Brandon Kim8d3d5a22021-10-06 12:51:31 -070027 manufacturer of this processor in unsigned integer.
28 default: 0
Cheng C Yang259f49e2020-02-25 10:07:32 +080029 - name: Id
30 type: uint64
31 description: >
32 This Processor ID field contains processor-specific information
33 that describes the processor's features. Details depend on
34 processor architecture.
35 For x86 and ARM processors, DMTF DSP0134 Section 7.5.3 is used.
36 default: 0
37 - name: MaxSpeedInMhz
38 type: uint32
39 description: >
40 Max Speed in megahertz the CPU can support.
41 - name: Characteristics
42 type: array[enum[self.Capability]]
43 description: >
44 The set of boolean flags for processor's capability, such as
45 64-bit Capable, Multi-Core, Hardware Thread, Execute Protection,
46 Enhanced Virtualization, Power/Performance Control etc.
47 - name: CoreCount
48 type: uint16
49 description: >
50 The number of cores in the processor.
51 - name: ThreadCount
52 type: uint16
53 description: >
54 The maximum number of threads the processor can support.
Brandon Kimd81cff32021-09-01 10:00:13 -070055 - name: Step
Brandon Kim0170a762021-10-19 18:51:14 -070056 type: uint16
Brandon Kimd81cff32021-09-01 10:00:13 -070057 description: >
58 The step value for this processor
Brandon Kim0170a762021-10-19 18:51:14 -070059 default: 0
Brandon Kimd81cff32021-09-01 10:00:13 -070060 - name: Microcode
Brandon Kim0170a762021-10-19 18:51:14 -070061 type: uint32
Brandon Kimd81cff32021-09-01 10:00:13 -070062 description: >
63 The microcode information for this processor
Brandon Kim0170a762021-10-19 18:51:14 -070064 default: 0
Cheng C Yang259f49e2020-02-25 10:07:32 +080065
66enumerations:
67 - name: Capability
68 description: >
69 List of capabilities that a processor can support.
70 Values are based off DMTF DSP0134 specification.
71 values:
Patrick Williams8da396c2022-03-14 14:21:02 -050072 - name: Capable64bit
73 description: >
74 Capable of 64-bit.
75 - name: MultiCore
76 description: >
77 Support multi-core.
78 - name: HardwareThread
79 description: >
80 Support hardware thread.
81 - name: ExecuteProtection
82 description: >
83 Support execute protection.
84 - name: EnhancedVirtualization
85 description: >
86 Support enhanced virtualization.
87 - name: PowerPerformanceControl
88 description: >
89 Support power/performance control.
Brad Bishopdf557042021-10-04 15:51:11 -040090
91associations:
92 - name: associated_pcie_slots
93 description: >
94 Objects that implement Cpu can optionally implement the
95 associated_pcie_slots association to provide a link to one or more
96 PCIe slots.
Zhenwei Chen453957c2022-03-31 17:54:17 -070097 reverse_names:
98 - upstream_processor
Brad Bishopdf557042021-10-04 15:51:11 -040099 required_endpoint_interfaces:
Patrick Williams8da396c2022-03-14 14:21:02 -0500100 - xyz.openbmc_project.Inventory.Item.PCIeSlot