Norman James | 6a58a27 | 2015-10-07 14:34:16 -0500 | [diff] [blame] | 1 | #define _GNU_SOURCE /* for strcasestr */
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| 2 | #include <stdio.h>
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| 3 | #include <stdlib.h>
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| 4 | #include <string.h>
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| 5 | #include <fcntl.h>
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| 6 | #include <sys/mman.h>
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| 7 | #include <sys/types.h>
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| 8 | #include <sys/stat.h>
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| 9 | #include <unistd.h>
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| 10 | #include <byteswap.h>
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| 11 | #include <stdint.h>
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| 12 | #include <stdbool.h>
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| 13 | #include <getopt.h>
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| 14 | #include <limits.h>
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| 15 | #include <arpa/inet.h>
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| 16 | #include <assert.h>
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| 17 |
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| 18 | #include "io.h"
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| 19 |
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| 20 | /* Big endian warning/note:
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| 21 | *
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| 22 | * The register accessors return byteswapped data for registers
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| 23 | */
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| 24 | uint32_t (*ast_ahb_readl)(uint32_t offset);
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| 25 | void (*ast_ahb_writel)(uint32_t val, uint32_t offset);
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| 26 | int (*ast_copy_to_ahb)(uint32_t reg, const void *src, uint32_t len);
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| 27 | int (*ast_copy_from_ahb)(void *dst, uint32_t reg, uint32_t len);
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| 28 |
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| 29 | static enum ppc_platform {
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| 30 | plat_unknown,
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| 31 | plat_rhesus,
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| 32 | plat_ast_bmc,
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| 33 | } ppc_platform;
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| 34 |
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| 35 | static int lpc_io_fd = -1, lpc_fw_fd = -1;
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| 36 | static uint32_t lpc_old_flash_reg;
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| 37 | static uint32_t ahb_flash_base, ahb_flash_size, lpc_flash_offset;
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| 38 |
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| 39 | static void lpc_outb(uint8_t val, uint16_t port)
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| 40 | {
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| 41 | int rc;
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| 42 |
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| 43 | lseek(lpc_io_fd, port, SEEK_SET);
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| 44 | rc = write(lpc_io_fd, &val, 1);
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| 45 | if (rc != 1) {
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| 46 | perror("Can't write to LPC IO");
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| 47 | exit(1);
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| 48 | }
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| 49 | }
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| 50 |
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| 51 | static uint8_t lpc_inb(uint16_t port)
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| 52 | {
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| 53 | uint8_t val;
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| 54 | int rc;
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| 55 |
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| 56 | lseek(lpc_io_fd, port, SEEK_SET);
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| 57 | rc = read(lpc_io_fd, &val, 1);
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| 58 | if (rc != 1) {
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| 59 | perror("Can't read from LPC IO");
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| 60 | exit(1);
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| 61 | }
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| 62 | return val;
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| 63 | }
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| 64 |
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| 65 | int lpc_fw_write32(uint32_t val, uint32_t addr)
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| 66 | {
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| 67 | int rc;
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| 68 |
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| 69 | /* The value passed in is in big endian always */
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| 70 | lseek(lpc_fw_fd, addr, SEEK_SET);
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| 71 | rc = write(lpc_fw_fd, &val, 4);
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| 72 | if (rc != 4) {
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| 73 | perror("Can't write to LPC FW");
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| 74 | exit(1);
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| 75 | }
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| 76 | return 0;
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| 77 | }
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| 78 |
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| 79 | int lpc_fw_read32(uint32_t *val, uint32_t addr)
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| 80 | {
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| 81 | int rc;
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| 82 |
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| 83 | lseek(lpc_fw_fd, addr, SEEK_SET);
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| 84 | rc = read(lpc_fw_fd, val, 4);
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| 85 | if (rc != 4) {
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| 86 | perror("Can't read from LPC FW");
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| 87 | exit(1);
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| 88 | }
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| 89 | return 0;
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| 90 | }
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| 91 |
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| 92 | static void lpc_sio_outb(uint8_t val, uint8_t reg)
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| 93 | {
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| 94 | lpc_outb(reg, 0x2e);
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| 95 | lpc_outb(val, 0x2f);
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| 96 | }
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| 97 |
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| 98 | static uint8_t lpc_sio_inb(uint8_t reg)
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| 99 | {
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| 100 | lpc_outb(reg, 0x2e);
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| 101 | return lpc_inb(0x2f);
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| 102 | }
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| 103 |
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| 104 | static void lpc_ahb_prep(uint32_t reg, uint8_t type)
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| 105 | {
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| 106 | /* Address */
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| 107 | lpc_sio_outb((reg >> 24) & 0xff, 0xf0);
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| 108 | lpc_sio_outb((reg >> 16) & 0xff, 0xf1);
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| 109 | lpc_sio_outb((reg >> 8) & 0xff, 0xf2);
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| 110 | lpc_sio_outb((reg ) & 0xff, 0xf3);
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| 111 |
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| 112 | /* 4 bytes cycle */
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| 113 | lpc_sio_outb(type, 0xf8);
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| 114 | }
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| 115 |
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| 116 | static void lpc_ahb_writel(uint32_t val, uint32_t reg)
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| 117 | {
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| 118 | lpc_ahb_prep(reg, 2);
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| 119 |
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| 120 | /* Write data */
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| 121 | lpc_sio_outb(val >> 24, 0xf4);
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| 122 | lpc_sio_outb(val >> 16, 0xf5);
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| 123 | lpc_sio_outb(val >> 8, 0xf6);
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| 124 | lpc_sio_outb(val , 0xf7);
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| 125 |
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| 126 | /* Trigger */
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| 127 | lpc_sio_outb(0xcf, 0xfe);
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| 128 | }
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| 129 |
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| 130 | static uint32_t lpc_ahb_readl(uint32_t reg)
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| 131 | {
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| 132 | uint32_t val = 0;
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| 133 |
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| 134 | lpc_ahb_prep(reg, 2);
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| 135 |
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| 136 | /* Trigger */
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| 137 | lpc_sio_inb(0xfe);
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| 138 |
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| 139 | /* Read results */
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| 140 | val = (val << 8) | lpc_sio_inb(0xf4);
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| 141 | val = (val << 8) | lpc_sio_inb(0xf5);
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| 142 | val = (val << 8) | lpc_sio_inb(0xf6);
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| 143 | val = (val << 8) | lpc_sio_inb(0xf7);
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| 144 |
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| 145 | return val;
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| 146 | }
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| 147 |
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| 148 | static void lpc_ahb_init(bool bmc_flash)
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| 149 | {
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| 150 | uint32_t b;
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| 151 |
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| 152 | /* Send SuperIO password */
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| 153 | lpc_outb(0xa5, 0x2e);
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| 154 | lpc_outb(0xa5, 0x2e);
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| 155 |
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| 156 | /* Select logical dev d */
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| 157 | lpc_sio_outb(0x0d, 0x07);
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| 158 |
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| 159 | /* Enable iLPC->AHB */
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| 160 | lpc_sio_outb(0x01, 0x30);
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| 161 |
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| 162 | /* Save flash base */
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| 163 | lpc_old_flash_reg = b = lpc_ahb_readl(LPC_CTRL_BASE + 0x88);
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| 164 | /* Upate flash base */
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| 165 | if (bmc_flash) {
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| 166 | ahb_flash_base = BMC_FLASH_BASE;
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| 167 | ahb_flash_size = BMC_FLASH_SIZE;
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| 168 | } else {
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| 169 | ahb_flash_base = PNOR_FLASH_BASE;
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| 170 | ahb_flash_size = PNOR_FLASH_SIZE;
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| 171 | }
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| 172 | lpc_flash_offset = 0x0e000000;
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| 173 | b = (b & 0x0000ffff) | ahb_flash_base;
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| 174 | lpc_ahb_writel(b, LPC_CTRL_BASE + 0x88);
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| 175 | b = lpc_ahb_readl(LPC_CTRL_BASE + 0x88);
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| 176 | }
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| 177 |
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| 178 | static int lpc_ast_copy_from_ahb(void *dst, uint32_t reg, uint32_t len)
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| 179 | {
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| 180 | int rc;
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| 181 |
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| 182 | if (reg < ahb_flash_base ||
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| 183 | (reg + len) > (ahb_flash_base + ahb_flash_size))
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| 184 | return -1;
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| 185 | reg = (reg - ahb_flash_base) + lpc_flash_offset;
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| 186 |
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| 187 | lseek(lpc_fw_fd, reg, SEEK_SET);
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| 188 | rc = read(lpc_fw_fd, dst, len);
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| 189 | if (rc != len) {
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| 190 | perror("Can't read bulk from LPC FW");
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| 191 | exit(1);
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| 192 | }
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| 193 | return 0;
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| 194 | }
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| 195 |
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| 196 | static int lpc_ast_copy_to_ahb(uint32_t reg, const void *src, uint32_t len)
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| 197 | {
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| 198 | int rc;
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| 199 |
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| 200 | if (reg < ahb_flash_base ||
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| 201 | (reg + len) > (ahb_flash_base + ahb_flash_size))
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| 202 | return -1;
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| 203 | reg = (reg - ahb_flash_base) + lpc_flash_offset;
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| 204 |
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| 205 | lseek(lpc_fw_fd, reg, SEEK_SET);
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| 206 | rc = write(lpc_fw_fd, src, len);
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| 207 | if (rc != len) {
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| 208 | perror("Can't write bulk from LPC FW");
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| 209 | exit(1);
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| 210 | }
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| 211 | return 0;
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| 212 | }
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| 213 |
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| 214 | /*
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| 215 | * Write protect: TODO use custom IPMI to control lock from BMC
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| 216 | */
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| 217 | static uint32_t lpc_gpio_ctl_readl(uint32_t offset)
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| 218 | {
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| 219 | return lpc_ahb_readl(GPIO_CTRL_BASE + offset);
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| 220 | }
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| 221 |
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| 222 | static void lpc_gpio_ctl_writel(uint32_t val, uint32_t offset)
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| 223 | {
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| 224 | lpc_ahb_writel(val, GPIO_CTRL_BASE + offset);
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| 225 | }
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| 226 |
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| 227 | bool set_wrprotect(bool protect)
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| 228 | {
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| 229 | uint32_t reg;
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| 230 | bool was_protected;
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| 231 |
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| 232 | if (ppc_platform != plat_ast_bmc)
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| 233 | return false;
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| 234 |
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| 235 | reg = lpc_gpio_ctl_readl(0x20);
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| 236 | was_protected = !!(reg & 0x00004000);
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| 237 | if (protect)
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| 238 | reg |= 0x00004000; /* GPIOF[6] value */
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| 239 | else
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| 240 | reg &= ~0x00004000; /* GPIOF[6] value */
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| 241 | lpc_gpio_ctl_writel(reg, 0x20);
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| 242 | reg = lpc_gpio_ctl_readl(0x24);
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| 243 | reg |= 0x00004000; /* GPIOF[6] direction */
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| 244 | lpc_gpio_ctl_writel(reg, 0x24);
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| 245 |
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| 246 | return was_protected;
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| 247 | }
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| 248 |
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| 249 | static void open_lpc(bool bmc_flash)
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| 250 | {
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| 251 | lpc_fw_fd = open("/sys/kernel/debug/powerpc/lpc/fw", O_RDWR);
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| 252 | if (lpc_fw_fd < 0) {
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| 253 | perror("can't open LPC MEM");
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| 254 | exit(1);
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| 255 | }
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| 256 |
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| 257 | if (ppc_platform != plat_ast_bmc)
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| 258 | return;
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| 259 |
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| 260 | lpc_io_fd = open("/sys/kernel/debug/powerpc/lpc/io", O_RDWR);
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| 261 | if (lpc_io_fd < 0) {
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| 262 | perror("can't open LPC IO");
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| 263 | exit(1);
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| 264 | }
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| 265 |
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| 266 | ast_ahb_readl = lpc_ahb_readl;
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| 267 | ast_ahb_writel = lpc_ahb_writel;
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| 268 | ast_copy_to_ahb = lpc_ast_copy_to_ahb;
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| 269 | ast_copy_from_ahb = lpc_ast_copy_from_ahb;
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| 270 |
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| 271 | lpc_ahb_init(bmc_flash);
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| 272 | }
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| 273 |
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| 274 | void close_devs(void)
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| 275 | {
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| 276 | if (lpc_io_fd < 0 || lpc_fw_fd < 0)
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| 277 | return;
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| 278 |
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| 279 | if (ppc_platform != plat_ast_bmc)
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| 280 | return;
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| 281 |
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| 282 | /* Restore flash base */
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| 283 | lpc_ahb_writel(lpc_old_flash_reg, LPC_CTRL_BASE + 0x88);
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| 284 | }
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| 285 |
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| 286 | static void open_pci(bool bmc_flash)
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| 287 | {
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| 288 | /* XXX */
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| 289 | fprintf(stderr, "WARNING: PCI access method not implemented !\n");
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| 290 | fprintf(stderr, " Use -l or --lpc\n");
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| 291 | exit(1);
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| 292 | }
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| 293 |
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| 294 | static void identify_platform(void)
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| 295 | {
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| 296 | FILE *cpuinfo;
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| 297 | char *lptr = NULL;
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| 298 | size_t lsize = 0;
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| 299 | bool found = false;
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| 300 |
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| 301 | ppc_platform = plat_unknown;
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| 302 |
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| 303 | cpuinfo = fopen("/proc/cpuinfo", "r");
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| 304 | if (!cpuinfo) {
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| 305 | perror("Can't open /proc/cpuinfo");
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| 306 | exit(1);
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| 307 | }
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| 308 | while(!found && getline(&lptr, &lsize, cpuinfo) >= 0) {
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| 309 | if (!strncmp(lptr, "model", 5)) {
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| 310 | if (strcasestr(lptr, "rhesus"))
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| 311 | ppc_platform = plat_rhesus;
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| 312 | else if (strcasestr(lptr, "palmetto"))
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| 313 | ppc_platform = plat_ast_bmc;
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| 314 | found = true;
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| 315 | }
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| 316 | free(lptr);
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| 317 | lptr = NULL;
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| 318 | lsize = 0;
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| 319 | }
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| 320 | }
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| 321 |
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| 322 | void open_devs(bool use_lpc, bool bmc_flash)
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| 323 | {
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| 324 | if (ppc_platform == plat_unknown) {
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| 325 | fprintf(stderr, "Unsupported platform !\n");
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| 326 | exit(1);
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| 327 | }
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| 328 |
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| 329 | if (use_lpc)
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| 330 | open_lpc(bmc_flash);
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| 331 | else
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| 332 | open_pci(bmc_flash);
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| 333 | }
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| 334 |
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| 335 | void check_platform(bool *has_sfc, bool *has_ast)
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| 336 | {
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| 337 | identify_platform();
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| 338 |
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| 339 | *has_sfc = ppc_platform == plat_rhesus;
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| 340 | *has_ast = ppc_platform == plat_ast_bmc;
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| 341 | }
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