Norman James | 6a58a27 | 2015-10-07 14:34:16 -0500 | [diff] [blame] | 1 | #include <stdlib.h>
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| 2 | #include <stdio.h>
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| 3 | #include <string.h>
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| 4 |
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| 5 | #include "libflash.h"
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| 6 | #include "libflash-priv.h"
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| 7 |
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| 8 | static const struct flash_info flash_info[] = {
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| 9 | { 0xc22019, 0x02000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL25635F"},
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| 10 | { 0xc2201a, 0x04000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL51235F"},
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| 11 | { 0xef4018, 0x01000000, FL_ERASE_ALL, "Winbond W25Q128BV" },
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Norman James | 52ef068 | 2015-11-11 07:59:04 -0600 | [diff] [blame^] | 12 | { 0x20ba19, 0x02000000, FL_ERASE_ALL | FL_CAN_4B, "Micron W25Q256BV" },
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Norman James | 6a58a27 | 2015-10-07 14:34:16 -0500 | [diff] [blame] | 13 | { 0x20ba20, 0x04000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
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| 14 | FL_ERASE_BULK | FL_MICRON_BUGS,
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| 15 | "Micron N25Qx512Ax" },
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| 16 | { 0x55aa55, 0x00100000, FL_ERASE_ALL | FL_CAN_4B, "TEST_FLASH" },
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Norman James | 6621b94 | 2015-11-11 07:39:23 -0600 | [diff] [blame] | 17 |
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Norman James | 6a58a27 | 2015-10-07 14:34:16 -0500 | [diff] [blame] | 18 | };
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| 19 |
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| 20 | struct flash_chip {
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| 21 | struct spi_flash_ctrl *ctrl; /* Controller */
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| 22 | struct flash_info info; /* Flash info */
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| 23 | uint32_t tsize; /* Corrected flash size */
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| 24 | uint32_t min_erase_mask; /* Minimum erase size */
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| 25 | bool mode_4b; /* Flash currently in 4b mode */
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| 26 | struct flash_req *cur_req; /* Current request */
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| 27 | void *smart_buf; /* Buffer for smart writes */
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| 28 | };
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| 29 |
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| 30 | bool libflash_debug;
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| 31 |
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| 32 | int fl_read_stat(struct spi_flash_ctrl *ct, uint8_t *stat)
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| 33 | {
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| 34 | return ct->cmd_rd(ct, CMD_RDSR, false, 0, stat, 1);
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| 35 | }
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| 36 |
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| 37 | static void fl_micron_status(struct spi_flash_ctrl *ct)
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| 38 | {
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| 39 | uint8_t flst;
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| 40 |
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| 41 | /*
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| 42 | * After a success status on a write or erase, we
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| 43 | * need to do that command or some chip variants will
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| 44 | * lock
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| 45 | */
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| 46 | ct->cmd_rd(ct, CMD_MIC_RDFLST, false, 0, &flst, 1);
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| 47 | }
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| 48 |
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| 49 | /* Synchronous write completion, probably need a yield hook */
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| 50 | int fl_sync_wait_idle(struct spi_flash_ctrl *ct)
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| 51 | {
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| 52 | uint8_t stat;
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| 53 | int rc;
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| 54 |
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| 55 | /* XXX Add timeout */
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| 56 | for (;;) {
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| 57 | rc = fl_read_stat(ct, &stat);
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| 58 | if (rc) return rc;
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| 59 | if (!(stat & STAT_WIP)) {
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| 60 | if (ct->finfo->flags & FL_MICRON_BUGS)
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| 61 | fl_micron_status(ct);
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| 62 | return 0;
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| 63 | }
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| 64 | }
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| 65 | /* return FLASH_ERR_WIP_TIMEOUT; */
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| 66 | }
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| 67 |
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| 68 | /* Exported for internal use */
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| 69 | int fl_wren(struct spi_flash_ctrl *ct)
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| 70 | {
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| 71 | int i, rc;
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| 72 | uint8_t stat;
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| 73 |
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| 74 | /* Some flashes need it to be hammered */
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| 75 | for (i = 0; i < 1000; i++) {
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| 76 | rc = ct->cmd_wr(ct, CMD_WREN, false, 0, NULL, 0);
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| 77 | if (rc) return rc;
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| 78 | rc = fl_read_stat(ct, &stat);
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| 79 | if (rc) return rc;
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| 80 | if (stat & STAT_WIP) {
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| 81 | FL_ERR("LIBFLASH: WREN has WIP status set !\n");
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| 82 | rc = fl_sync_wait_idle(ct);
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| 83 | if (rc)
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| 84 | return rc;
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| 85 | continue;
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| 86 | }
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| 87 | if (stat & STAT_WEN)
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| 88 | return 0;
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| 89 | }
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| 90 | return FLASH_ERR_WREN_TIMEOUT;
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| 91 | }
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| 92 |
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| 93 | int flash_read(struct flash_chip *c, uint32_t pos, void *buf, uint32_t len)
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| 94 | {
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| 95 | struct spi_flash_ctrl *ct = c->ctrl;
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| 96 |
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| 97 | /* XXX Add sanity/bound checking */
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| 98 |
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| 99 | /*
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| 100 | * If the controller supports read and either we are in 3b mode
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| 101 | * or we are in 4b *and* the controller supports it, then do a
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| 102 | * high level read.
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| 103 | */
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| 104 | if ((!c->mode_4b || ct->set_4b) && ct->read)
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| 105 | return ct->read(ct, pos, buf, len);
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| 106 |
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| 107 | /* Otherwise, go manual if supported */
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| 108 | if (!ct->cmd_rd)
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| 109 | return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
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| 110 | return ct->cmd_rd(ct, CMD_READ, true, pos, buf, len);
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| 111 | }
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| 112 |
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| 113 | static void fl_get_best_erase(struct flash_chip *c, uint32_t dst, uint32_t size,
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| 114 | uint32_t *chunk, uint8_t *cmd)
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| 115 | {
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| 116 | /* Smaller than 32k, use 4k */
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| 117 | if ((dst & 0x7fff) || (size < 0x8000)) {
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| 118 | *chunk = 0x1000;
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| 119 | *cmd = CMD_SE;
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| 120 | return;
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| 121 | }
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| 122 | /* Smaller than 64k and 32k is supported, use it */
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| 123 | if ((c->info.flags & FL_ERASE_32K) &&
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| 124 | ((dst & 0xffff) || (size < 0x10000))) {
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| 125 | *chunk = 0x8000;
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| 126 | *cmd = CMD_BE32K;
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| 127 | return;
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| 128 | }
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| 129 | /* If 64K is not supported, use whatever smaller size is */
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| 130 | if (!(c->info.flags & FL_ERASE_64K)) {
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| 131 | if (c->info.flags & FL_ERASE_32K) {
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| 132 | *chunk = 0x8000;
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| 133 | *cmd = CMD_BE32K;
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| 134 | } else {
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| 135 | *chunk = 0x1000;
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| 136 | *cmd = CMD_SE;
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| 137 | }
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| 138 | return;
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| 139 | }
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| 140 | /* Allright, let's go for 64K */
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| 141 | *chunk = 0x10000;
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| 142 | *cmd = CMD_BE;
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| 143 | }
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| 144 |
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| 145 | int flash_erase(struct flash_chip *c, uint32_t dst, uint32_t size)
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| 146 | {
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| 147 | struct spi_flash_ctrl *ct = c->ctrl;
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| 148 | uint32_t chunk;
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| 149 | uint8_t cmd;
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| 150 | int rc;
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| 151 |
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| 152 | /* Some sanity checking */
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| 153 | if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
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| 154 | return FLASH_ERR_PARM_ERROR;
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| 155 |
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| 156 | /* Check boundaries fit erase blocks */
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| 157 | if ((dst | size) & c->min_erase_mask)
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| 158 | return FLASH_ERR_ERASE_BOUNDARY;
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| 159 |
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| 160 | FL_DBG("LIBFLASH: Erasing 0x%08x..0%08x...\n", dst, dst + size);
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| 161 |
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| 162 | /* Use controller erase if supported */
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| 163 | if (ct->erase)
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| 164 | return ct->erase(ct, dst, size);
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| 165 |
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| 166 | /* Allright, loop as long as there's something to erase */
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| 167 | while(size) {
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| 168 | /* How big can we make it based on alignent & size */
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| 169 | fl_get_best_erase(c, dst, size, &chunk, &cmd);
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| 170 |
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| 171 | /* Poke write enable */
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| 172 | rc = fl_wren(ct);
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| 173 | if (rc)
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| 174 | return rc;
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| 175 |
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| 176 | /* Send erase command */
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| 177 | rc = ct->cmd_wr(ct, cmd, true, dst, NULL, 0);
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| 178 | if (rc)
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| 179 | return rc;
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| 180 |
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| 181 | /* Wait for write complete */
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| 182 | rc = fl_sync_wait_idle(ct);
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| 183 | if (rc)
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| 184 | return rc;
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| 185 |
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| 186 | size -= chunk;
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| 187 | dst += chunk;
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| 188 | }
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| 189 | return 0;
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| 190 | }
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| 191 |
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| 192 | int flash_erase_chip(struct flash_chip *c)
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| 193 | {
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| 194 | struct spi_flash_ctrl *ct = c->ctrl;
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| 195 | int rc;
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| 196 |
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| 197 | /* XXX TODO: Fallback to using normal erases */
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| 198 | if (!(c->info.flags & (FL_ERASE_CHIP|FL_ERASE_BULK)))
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| 199 | return FLASH_ERR_CHIP_ER_NOT_SUPPORTED;
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| 200 |
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| 201 | FL_DBG("LIBFLASH: Erasing chip...\n");
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| 202 |
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| 203 | /* Use controller erase if supported */
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| 204 | if (ct->erase)
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| 205 | return ct->erase(ct, 0, 0xffffffff);
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| 206 |
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| 207 | rc = fl_wren(ct);
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| 208 | if (rc) return rc;
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| 209 |
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| 210 | if (c->info.flags & FL_ERASE_CHIP)
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| 211 | rc = ct->cmd_wr(ct, CMD_CE, false, 0, NULL, 0);
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| 212 | else
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| 213 | rc = ct->cmd_wr(ct, CMD_MIC_BULK_ERASE, false, 0, NULL, 0);
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| 214 | if (rc)
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| 215 | return rc;
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| 216 |
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| 217 | /* Wait for write complete */
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| 218 | return fl_sync_wait_idle(ct);
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| 219 | }
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| 220 |
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| 221 | static int fl_wpage(struct flash_chip *c, uint32_t dst, const void *src,
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| 222 | uint32_t size)
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| 223 | {
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| 224 | struct spi_flash_ctrl *ct = c->ctrl;
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| 225 | int rc;
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| 226 |
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| 227 | if (size < 1 || size > 0x100)
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| 228 | return FLASH_ERR_BAD_PAGE_SIZE;
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| 229 |
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| 230 | rc = fl_wren(ct);
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| 231 | if (rc) return rc;
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| 232 |
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| 233 | rc = ct->cmd_wr(ct, CMD_PP, true, dst, src, size);
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| 234 | if (rc)
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| 235 | return rc;
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| 236 |
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| 237 | /* Wait for write complete */
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| 238 | return fl_sync_wait_idle(ct);
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| 239 | }
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| 240 |
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| 241 | int flash_write(struct flash_chip *c, uint32_t dst, const void *src,
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| 242 | uint32_t size, bool verify)
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| 243 | {
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| 244 | struct spi_flash_ctrl *ct = c->ctrl;
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| 245 | uint32_t todo = size;
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| 246 | uint32_t d = dst;
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| 247 | const void *s = src;
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| 248 | uint8_t vbuf[0x100];
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| 249 | int rc;
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| 250 |
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| 251 | /* Some sanity checking */
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| 252 | if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
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| 253 | return FLASH_ERR_PARM_ERROR;
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| 254 |
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| 255 | FL_DBG("LIBFLASH: Writing to 0x%08x..0%08x...\n", dst, dst + size);
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| 256 |
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| 257 | /*
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| 258 | * If the controller supports write and either we are in 3b mode
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| 259 | * or we are in 4b *and* the controller supports it, then do a
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| 260 | * high level write.
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| 261 | */
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| 262 | if ((!c->mode_4b || ct->set_4b) && ct->write) {
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| 263 | rc = ct->write(ct, dst, src, size);
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| 264 | if (rc)
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| 265 | return rc;
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| 266 | goto writing_done;
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| 267 | }
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| 268 |
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| 269 | /* Otherwise, go manual if supported */
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| 270 | if (!ct->cmd_wr)
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| 271 | return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
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| 272 |
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| 273 | /* Iterate for each page to write */
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| 274 | while(todo) {
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| 275 | uint32_t chunk;
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| 276 |
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| 277 | /* Handle misaligned start */
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| 278 | chunk = 0x100 - (d & 0xff);
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| 279 | if (chunk > 0x100)
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| 280 | chunk = 0x100;
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| 281 | if (chunk > todo)
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| 282 | chunk = todo;
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| 283 |
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| 284 | rc = fl_wpage(c, d, s, chunk);
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| 285 | if (rc) return rc;
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| 286 | d += chunk;
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| 287 | s += chunk;
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| 288 | todo -= chunk;
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| 289 | }
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| 290 |
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| 291 | writing_done:
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| 292 | if (!verify)
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| 293 | return 0;
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| 294 |
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| 295 | /* Verify */
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| 296 | FL_DBG("LIBFLASH: Verifying...\n");
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| 297 |
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| 298 | while(size) {
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| 299 | uint32_t chunk;
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| 300 |
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| 301 | chunk = sizeof(vbuf);
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| 302 | if (chunk > size)
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| 303 | chunk = size;
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| 304 | rc = flash_read(c, dst, vbuf, chunk);
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| 305 | if (rc) return rc;
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| 306 | if (memcmp(vbuf, src, chunk)) {
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| 307 | FL_ERR("LIBFLASH: Miscompare at 0x%08x\n", dst);
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| 308 | return FLASH_ERR_VERIFY_FAILURE;
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| 309 | }
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| 310 | dst += chunk;
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| 311 | src += chunk;
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| 312 | size -= chunk;
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| 313 | }
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| 314 | return 0;
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| 315 | }
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| 316 |
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| 317 | enum sm_comp_res {
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| 318 | sm_no_change,
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| 319 | sm_need_write,
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| 320 | sm_need_erase,
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| 321 | };
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| 322 |
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| 323 | static enum sm_comp_res flash_smart_comp(struct flash_chip *c,
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| 324 | const void *src,
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| 325 | uint32_t offset, uint32_t size)
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| 326 | {
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| 327 | uint8_t *b = c->smart_buf + offset;
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| 328 | const uint8_t *s = src;
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| 329 | bool is_same = true;
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| 330 | uint32_t i;
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| 331 |
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| 332 | /* SRC DEST NEED_ERASE
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| 333 | * 0 1 0
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| 334 | * 1 1 0
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| 335 | * 0 0 0
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| 336 | * 1 0 1
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| 337 | */
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| 338 | for (i = 0; i < size; i++) {
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| 339 | /* Any bit need to be set, need erase */
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| 340 | if (s[i] & ~b[i])
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| 341 | return sm_need_erase;
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| 342 | if (is_same && (b[i] != s[i]))
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| 343 | is_same = false;
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| 344 | }
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| 345 | return is_same ? sm_no_change : sm_need_write;
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| 346 | }
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| 347 |
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| 348 | int flash_smart_write(struct flash_chip *c, uint32_t dst, const void *src,
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| 349 | uint32_t size)
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| 350 | {
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| 351 | uint32_t er_size = c->min_erase_mask + 1;
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| 352 | uint32_t end = dst + size;
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| 353 | int rc;
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| 354 |
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| 355 | /* Some sanity checking */
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| 356 | if (end <= dst || !size || end > c->tsize) {
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| 357 | FL_DBG("LIBFLASH: Smart write param error\n");
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| 358 | return FLASH_ERR_PARM_ERROR;
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| 359 | }
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| 360 |
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| 361 | FL_DBG("LIBFLASH: Smart writing to 0x%08x..0%08x...\n",
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| 362 | dst, dst + size);
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| 363 |
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| 364 | /* As long as we have something to write ... */
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| 365 | while(dst < end) {
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| 366 | uint32_t page, off, chunk;
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| 367 | enum sm_comp_res sr;
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| 368 |
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| 369 | /* Figure out which erase page we are in and read it */
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| 370 | page = dst & ~c->min_erase_mask;
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| 371 | off = dst & c->min_erase_mask;
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| 372 | FL_DBG("LIBFLASH: reading page 0x%08x..0x%08x...",
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| 373 | page, page + er_size);
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| 374 | rc = flash_read(c, page, c->smart_buf, er_size);
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| 375 | if (rc) {
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| 376 | FL_DBG(" error %d!\n", rc);
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| 377 | return rc;
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| 378 | }
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| 379 |
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| 380 | /* Locate the chunk of data we are working on */
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| 381 | chunk = er_size - off;
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| 382 | if (size < chunk)
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| 383 | chunk = size;
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| 384 |
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| 385 | /* Compare against what we are writing and ff */
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| 386 | sr = flash_smart_comp(c, src, off, chunk);
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| 387 | switch(sr) {
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| 388 | case sm_no_change:
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| 389 | /* Identical, skip it */
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| 390 | FL_DBG(" same !\n");
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| 391 | break;
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| 392 | case sm_need_write:
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| 393 | /* Just needs writing over */
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| 394 | FL_DBG(" need write !\n");
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| 395 | rc = flash_write(c, dst, src, chunk, true);
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| 396 | if (rc) {
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| 397 | FL_DBG("LIBFLASH: Write error %d !\n", rc);
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| 398 | return rc;
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| 399 | }
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| 400 | break;
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| 401 | case sm_need_erase:
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| 402 | FL_DBG(" need erase !\n");
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| 403 | rc = flash_erase(c, page, er_size);
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| 404 | if (rc) {
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| 405 | FL_DBG("LIBFLASH: erase error %d !\n", rc);
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| 406 | return rc;
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| 407 | }
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| 408 | /* Then update the portion of the buffer and write the block */
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| 409 | memcpy(c->smart_buf + off, src, chunk);
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| 410 | rc = flash_write(c, page, c->smart_buf, er_size, true);
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| 411 | if (rc) {
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| 412 | FL_DBG("LIBFLASH: write error %d !\n", rc);
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| 413 | return rc;
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| 414 | }
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| 415 | break;
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| 416 | }
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| 417 | dst += chunk;
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| 418 | src += chunk;
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| 419 | size -= chunk;
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| 420 | }
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| 421 | return 0;
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| 422 | }
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| 423 |
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| 424 | static int fl_chip_id(struct spi_flash_ctrl *ct, uint8_t *id_buf,
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| 425 | uint32_t *id_size)
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| 426 | {
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| 427 | int rc;
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| 428 | uint8_t stat;
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| 429 |
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| 430 | /* Check initial status */
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| 431 | rc = fl_read_stat(ct, &stat);
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| 432 | if (rc)
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| 433 | return rc;
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| 434 |
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| 435 | /* If stuck writing, wait for idle */
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| 436 | if (stat & STAT_WIP) {
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| 437 | FL_ERR("LIBFLASH: Flash in writing state ! Waiting...\n");
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| 438 | rc = fl_sync_wait_idle(ct);
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| 439 | if (rc)
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| 440 | return rc;
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| 441 | } else
|
| 442 | FL_DBG("LIBFLASH: Init status: %02x\n", stat);
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| 443 |
|
| 444 | /* Fallback to get ID manually */
|
| 445 | rc = ct->cmd_rd(ct, CMD_RDID, false, 0, id_buf, 3);
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| 446 | if (rc)
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| 447 | return rc;
|
| 448 | *id_size = 3;
|
| 449 |
|
| 450 | return 0;
|
| 451 | }
|
| 452 |
|
| 453 | static int flash_identify(struct flash_chip *c)
|
| 454 | {
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| 455 | struct spi_flash_ctrl *ct = c->ctrl;
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| 456 | const struct flash_info *info;
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| 457 | uint32_t iid, id_size;
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| 458 | #define MAX_ID_SIZE 16
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| 459 | uint8_t id[MAX_ID_SIZE];
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| 460 | int rc, i;
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| 461 |
|
| 462 | if (ct->chip_id) {
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| 463 | /* High level controller interface */
|
| 464 | id_size = MAX_ID_SIZE;
|
| 465 | rc = ct->chip_id(ct, id, &id_size);
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| 466 | } else
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| 467 | rc = fl_chip_id(ct, id, &id_size);
|
| 468 | if (rc)
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| 469 | return rc;
|
| 470 | if (id_size < 3)
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| 471 | return FLASH_ERR_CHIP_UNKNOWN;
|
| 472 |
|
| 473 | /* Convert to a dword for lookup */
|
| 474 | iid = id[0];
|
| 475 | iid = (iid << 8) | id[1];
|
| 476 | iid = (iid << 8) | id[2];
|
| 477 |
|
| 478 | FL_DBG("LIBFLASH: Flash ID: %02x.%02x.%02x (%06x)\n",
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| 479 | id[0], id[1], id[2], iid);
|
| 480 |
|
| 481 | /* Lookup in flash_info */
|
| 482 | for (i = 0; i < ARRAY_SIZE(flash_info); i++) {
|
| 483 | info = &flash_info[i];
|
| 484 | if (info->id == iid)
|
| 485 | break;
|
| 486 | }
|
| 487 | if (info->id != iid)
|
| 488 | return FLASH_ERR_CHIP_UNKNOWN;
|
| 489 |
|
| 490 | c->info = *info;
|
| 491 | c->tsize = info->size;
|
| 492 | ct->finfo = &c->info;
|
| 493 |
|
| 494 | /*
|
| 495 | * Let controller know about our settings and possibly
|
| 496 | * override them
|
| 497 | */
|
| 498 | if (ct->setup) {
|
| 499 | rc = ct->setup(ct, &c->tsize);
|
| 500 | if (rc)
|
| 501 | return rc;
|
| 502 | }
|
| 503 |
|
| 504 | /* Calculate min erase granularity */
|
| 505 | if (c->info.flags & FL_ERASE_4K)
|
| 506 | c->min_erase_mask = 0xfff;
|
| 507 | else if (c->info.flags & FL_ERASE_32K)
|
| 508 | c->min_erase_mask = 0x7fff;
|
| 509 | else if (c->info.flags & FL_ERASE_64K)
|
| 510 | c->min_erase_mask = 0xffff;
|
| 511 | else {
|
| 512 | /* No erase size ? oops ... */
|
| 513 | FL_ERR("LIBFLASH: No erase sizes !\n");
|
| 514 | return FLASH_ERR_CTRL_CONFIG_MISMATCH;
|
| 515 | }
|
| 516 |
|
| 517 | FL_DBG("LIBFLASH: Found chip %s size %dM erase granule: %dK\n",
|
| 518 | c->info.name, c->tsize >> 20, (c->min_erase_mask + 1) >> 10);
|
| 519 |
|
| 520 | return 0;
|
| 521 | }
|
| 522 |
|
| 523 | static int flash_set_4b(struct flash_chip *c, bool enable)
|
| 524 | {
|
| 525 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 526 | int rc;
|
| 527 |
|
| 528 | /* Some flash chips want this */
|
| 529 | rc = fl_wren(ct);
|
| 530 | if (rc) {
|
| 531 | FL_ERR("LIBFLASH: Error %d enabling write for set_4b\n", rc);
|
| 532 | /* Ignore the error & move on (could be wrprotect chip) */
|
| 533 | }
|
| 534 |
|
| 535 | /* Ignore error in case chip is write protected */
|
| 536 |
|
| 537 | return ct->cmd_wr(ct, enable ? CMD_EN4B : CMD_EX4B, false, 0, NULL, 0);
|
| 538 | }
|
| 539 |
|
| 540 | int flash_force_4b_mode(struct flash_chip *c, bool enable_4b)
|
| 541 | {
|
| 542 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 543 | int rc;
|
| 544 |
|
| 545 | /*
|
| 546 | * We only allow force 4b if both controller and flash do 4b
|
| 547 | * as this is mainly used if a 3rd party tries to directly
|
| 548 | * access a direct mapped read region
|
| 549 | */
|
| 550 | if (enable_4b && !((c->info.flags & FL_CAN_4B) && ct->set_4b))
|
| 551 | return FLASH_ERR_4B_NOT_SUPPORTED;
|
| 552 |
|
| 553 | /* Only send to flash directly on controllers that implement
|
| 554 | * the low level callbacks
|
| 555 | */
|
| 556 | if (ct->cmd_wr) {
|
| 557 | rc = flash_set_4b(c, enable_4b);
|
| 558 | if (rc)
|
| 559 | return rc;
|
| 560 | }
|
| 561 |
|
| 562 | /* Then inform the controller */
|
| 563 | if (ct->set_4b)
|
| 564 | rc = ct->set_4b(ct, enable_4b);
|
| 565 | return rc;
|
| 566 | }
|
| 567 |
|
| 568 | static int flash_configure(struct flash_chip *c)
|
| 569 | {
|
| 570 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 571 | int rc;
|
| 572 |
|
| 573 | /* Crop flash size if necessary */
|
| 574 | if (c->tsize > 0x01000000 && !(c->info.flags & FL_CAN_4B)) {
|
| 575 | FL_ERR("LIBFLASH: Flash chip cropped to 16M, no 4b mode\n");
|
| 576 | c->tsize = 0x01000000;
|
| 577 | }
|
| 578 |
|
| 579 | /* If flash chip > 16M, enable 4b mode */
|
| 580 | if (c->tsize > 0x01000000) {
|
| 581 | FL_DBG("LIBFLASH: Flash >16MB, enabling 4B mode...\n");
|
| 582 |
|
| 583 | /* Set flash to 4b mode if we can */
|
| 584 | if (ct->cmd_wr) {
|
| 585 | rc = flash_set_4b(c, true);
|
| 586 | if (rc) {
|
| 587 | FL_ERR("LIBFLASH: Failed to set flash 4b mode\n");
|
| 588 | return rc;
|
| 589 | }
|
| 590 | }
|
| 591 |
|
| 592 |
|
| 593 | /* Set controller to 4b mode if supported */
|
| 594 | if (ct->set_4b) {
|
| 595 | FL_DBG("LIBFLASH: Enabling controller 4B mode...\n");
|
| 596 | rc = ct->set_4b(ct, true);
|
| 597 | if (rc) {
|
| 598 | FL_ERR("LIBFLASH: Failed"
|
| 599 | " to set controller 4b mode\n");
|
| 600 | return rc;
|
| 601 | }
|
| 602 | }
|
| 603 | } else {
|
| 604 | FL_DBG("LIBFLASH: Flash <=16MB, disabling 4B mode...\n");
|
| 605 |
|
| 606 | /*
|
| 607 | * If flash chip supports 4b mode, make sure we disable
|
| 608 | * it in case it was left over by the previous user
|
| 609 | */
|
| 610 | if (c->info.flags & FL_CAN_4B) {
|
| 611 | rc = flash_set_4b(c, false);
|
| 612 | if (rc) {
|
| 613 | FL_ERR("LIBFLASH: Failed to"
|
| 614 | " clear flash 4b mode\n");
|
| 615 | return rc;
|
| 616 | }
|
| 617 | }
|
| 618 |
|
| 619 | /* Set controller to 3b mode if mode switch is supported */
|
| 620 | if (ct->set_4b) {
|
| 621 | FL_DBG("LIBFLASH: Disabling controller 4B mode...\n");
|
| 622 | rc = ct->set_4b(ct, false);
|
| 623 | if (rc) {
|
| 624 | FL_ERR("LIBFLASH: Failed to"
|
| 625 | " clear controller 4b mode\n");
|
| 626 | return rc;
|
| 627 | }
|
| 628 | }
|
| 629 | }
|
| 630 | return 0;
|
| 631 | }
|
| 632 |
|
| 633 | int flash_get_info(struct flash_chip *chip, const char **name,
|
| 634 | uint32_t *total_size, uint32_t *erase_granule)
|
| 635 | {
|
| 636 | if (name)
|
| 637 | *name = chip->info.name;
|
| 638 | if (total_size)
|
| 639 | *total_size = chip->tsize;
|
| 640 | if (erase_granule)
|
| 641 | *erase_granule = chip->min_erase_mask + 1;
|
| 642 | return 0;
|
| 643 | }
|
| 644 |
|
| 645 | int flash_init(struct spi_flash_ctrl *ctrl, struct flash_chip **flash)
|
| 646 | {
|
| 647 | struct flash_chip *c;
|
| 648 | int rc;
|
| 649 |
|
| 650 | *flash = NULL;
|
| 651 | c = malloc(sizeof(struct flash_chip));
|
| 652 | if (!c)
|
| 653 | return FLASH_ERR_MALLOC_FAILED;
|
| 654 | memset(c, 0, sizeof(*c));
|
| 655 | c->ctrl = ctrl;
|
| 656 |
|
| 657 | rc = flash_identify(c);
|
| 658 | if (rc) {
|
| 659 | FL_ERR("LIBFLASH: Flash identification failed\n");
|
| 660 | goto bail;
|
| 661 | }
|
| 662 | c->smart_buf = malloc(c->min_erase_mask + 1);
|
| 663 | if (!c->smart_buf) {
|
| 664 | FL_ERR("LIBFLASH: Failed to allocate smart buffer !\n");
|
| 665 | rc = FLASH_ERR_MALLOC_FAILED;
|
| 666 | goto bail;
|
| 667 | }
|
| 668 | rc = flash_configure(c);
|
| 669 | if (rc)
|
| 670 | FL_ERR("LIBFLASH: Flash configuration failed\n");
|
| 671 | bail:
|
| 672 | if (rc) {
|
| 673 | free(c);
|
| 674 | return rc;
|
| 675 | }
|
| 676 | *flash = c;
|
| 677 | return 0;
|
| 678 | }
|
| 679 |
|
| 680 | void flash_exit(struct flash_chip *chip)
|
| 681 | {
|
| 682 | /* XXX Make sure we are idle etc... */
|
| 683 | free(chip);
|
| 684 | }
|
| 685 |
|