blob: e075b89e6fe0b7d7fd9b0b42cc69d1e09aea8658 [file] [log] [blame]
Norman James6a58a272015-10-07 14:34:16 -05001#include <stdlib.h>
2#include <stdio.h>
3#include <string.h>
4
5#include "libflash.h"
6#include "libflash-priv.h"
7
8static const struct flash_info flash_info[] = {
9 { 0xc22019, 0x02000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL25635F"},
10 { 0xc2201a, 0x04000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL51235F"},
11 { 0xef4018, 0x01000000, FL_ERASE_ALL, "Winbond W25Q128BV" },
Norman James52ef0682015-11-11 07:59:04 -060012 { 0x20ba19, 0x02000000, FL_ERASE_ALL | FL_CAN_4B, "Micron W25Q256BV" },
Norman James6a58a272015-10-07 14:34:16 -050013 { 0x20ba20, 0x04000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
14 FL_ERASE_BULK | FL_MICRON_BUGS,
15 "Micron N25Qx512Ax" },
16 { 0x55aa55, 0x00100000, FL_ERASE_ALL | FL_CAN_4B, "TEST_FLASH" },
Norman James6621b942015-11-11 07:39:23 -060017
Norman James6a58a272015-10-07 14:34:16 -050018};
19
20struct flash_chip {
21 struct spi_flash_ctrl *ctrl; /* Controller */
22 struct flash_info info; /* Flash info */
23 uint32_t tsize; /* Corrected flash size */
24 uint32_t min_erase_mask; /* Minimum erase size */
25 bool mode_4b; /* Flash currently in 4b mode */
26 struct flash_req *cur_req; /* Current request */
27 void *smart_buf; /* Buffer for smart writes */
28};
29
30bool libflash_debug;
31
32int fl_read_stat(struct spi_flash_ctrl *ct, uint8_t *stat)
33{
34 return ct->cmd_rd(ct, CMD_RDSR, false, 0, stat, 1);
35}
36
37static void fl_micron_status(struct spi_flash_ctrl *ct)
38{
39 uint8_t flst;
40
41 /*
42 * After a success status on a write or erase, we
43 * need to do that command or some chip variants will
44 * lock
45 */
46 ct->cmd_rd(ct, CMD_MIC_RDFLST, false, 0, &flst, 1);
47}
48
49/* Synchronous write completion, probably need a yield hook */
50int fl_sync_wait_idle(struct spi_flash_ctrl *ct)
51{
52 uint8_t stat;
53 int rc;
54
55 /* XXX Add timeout */
56 for (;;) {
57 rc = fl_read_stat(ct, &stat);
58 if (rc) return rc;
59 if (!(stat & STAT_WIP)) {
60 if (ct->finfo->flags & FL_MICRON_BUGS)
61 fl_micron_status(ct);
62 return 0;
63 }
64 }
65 /* return FLASH_ERR_WIP_TIMEOUT; */
66}
67
68/* Exported for internal use */
69int fl_wren(struct spi_flash_ctrl *ct)
70{
71 int i, rc;
72 uint8_t stat;
73
74 /* Some flashes need it to be hammered */
75 for (i = 0; i < 1000; i++) {
76 rc = ct->cmd_wr(ct, CMD_WREN, false, 0, NULL, 0);
77 if (rc) return rc;
78 rc = fl_read_stat(ct, &stat);
79 if (rc) return rc;
80 if (stat & STAT_WIP) {
81 FL_ERR("LIBFLASH: WREN has WIP status set !\n");
82 rc = fl_sync_wait_idle(ct);
83 if (rc)
84 return rc;
85 continue;
86 }
87 if (stat & STAT_WEN)
88 return 0;
89 }
90 return FLASH_ERR_WREN_TIMEOUT;
91}
92
93int flash_read(struct flash_chip *c, uint32_t pos, void *buf, uint32_t len)
94{
95 struct spi_flash_ctrl *ct = c->ctrl;
96
97 /* XXX Add sanity/bound checking */
98
99 /*
100 * If the controller supports read and either we are in 3b mode
101 * or we are in 4b *and* the controller supports it, then do a
102 * high level read.
103 */
104 if ((!c->mode_4b || ct->set_4b) && ct->read)
105 return ct->read(ct, pos, buf, len);
106
107 /* Otherwise, go manual if supported */
108 if (!ct->cmd_rd)
109 return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
110 return ct->cmd_rd(ct, CMD_READ, true, pos, buf, len);
111}
112
113static void fl_get_best_erase(struct flash_chip *c, uint32_t dst, uint32_t size,
114 uint32_t *chunk, uint8_t *cmd)
115{
116 /* Smaller than 32k, use 4k */
117 if ((dst & 0x7fff) || (size < 0x8000)) {
118 *chunk = 0x1000;
119 *cmd = CMD_SE;
120 return;
121 }
122 /* Smaller than 64k and 32k is supported, use it */
123 if ((c->info.flags & FL_ERASE_32K) &&
124 ((dst & 0xffff) || (size < 0x10000))) {
125 *chunk = 0x8000;
126 *cmd = CMD_BE32K;
127 return;
128 }
129 /* If 64K is not supported, use whatever smaller size is */
130 if (!(c->info.flags & FL_ERASE_64K)) {
131 if (c->info.flags & FL_ERASE_32K) {
132 *chunk = 0x8000;
133 *cmd = CMD_BE32K;
134 } else {
135 *chunk = 0x1000;
136 *cmd = CMD_SE;
137 }
138 return;
139 }
140 /* Allright, let's go for 64K */
141 *chunk = 0x10000;
142 *cmd = CMD_BE;
143}
144
145int flash_erase(struct flash_chip *c, uint32_t dst, uint32_t size)
146{
147 struct spi_flash_ctrl *ct = c->ctrl;
148 uint32_t chunk;
149 uint8_t cmd;
150 int rc;
151
152 /* Some sanity checking */
153 if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
154 return FLASH_ERR_PARM_ERROR;
155
156 /* Check boundaries fit erase blocks */
157 if ((dst | size) & c->min_erase_mask)
158 return FLASH_ERR_ERASE_BOUNDARY;
159
160 FL_DBG("LIBFLASH: Erasing 0x%08x..0%08x...\n", dst, dst + size);
161
162 /* Use controller erase if supported */
163 if (ct->erase)
164 return ct->erase(ct, dst, size);
165
166 /* Allright, loop as long as there's something to erase */
167 while(size) {
168 /* How big can we make it based on alignent & size */
169 fl_get_best_erase(c, dst, size, &chunk, &cmd);
170
171 /* Poke write enable */
172 rc = fl_wren(ct);
173 if (rc)
174 return rc;
175
176 /* Send erase command */
177 rc = ct->cmd_wr(ct, cmd, true, dst, NULL, 0);
178 if (rc)
179 return rc;
180
181 /* Wait for write complete */
182 rc = fl_sync_wait_idle(ct);
183 if (rc)
184 return rc;
185
186 size -= chunk;
187 dst += chunk;
188 }
189 return 0;
190}
191
192int flash_erase_chip(struct flash_chip *c)
193{
194 struct spi_flash_ctrl *ct = c->ctrl;
195 int rc;
196
197 /* XXX TODO: Fallback to using normal erases */
198 if (!(c->info.flags & (FL_ERASE_CHIP|FL_ERASE_BULK)))
199 return FLASH_ERR_CHIP_ER_NOT_SUPPORTED;
200
201 FL_DBG("LIBFLASH: Erasing chip...\n");
202
203 /* Use controller erase if supported */
204 if (ct->erase)
205 return ct->erase(ct, 0, 0xffffffff);
206
207 rc = fl_wren(ct);
208 if (rc) return rc;
209
210 if (c->info.flags & FL_ERASE_CHIP)
211 rc = ct->cmd_wr(ct, CMD_CE, false, 0, NULL, 0);
212 else
213 rc = ct->cmd_wr(ct, CMD_MIC_BULK_ERASE, false, 0, NULL, 0);
214 if (rc)
215 return rc;
216
217 /* Wait for write complete */
218 return fl_sync_wait_idle(ct);
219}
220
221static int fl_wpage(struct flash_chip *c, uint32_t dst, const void *src,
222 uint32_t size)
223{
224 struct spi_flash_ctrl *ct = c->ctrl;
225 int rc;
226
227 if (size < 1 || size > 0x100)
228 return FLASH_ERR_BAD_PAGE_SIZE;
229
230 rc = fl_wren(ct);
231 if (rc) return rc;
232
233 rc = ct->cmd_wr(ct, CMD_PP, true, dst, src, size);
234 if (rc)
235 return rc;
236
237 /* Wait for write complete */
238 return fl_sync_wait_idle(ct);
239}
240
241int flash_write(struct flash_chip *c, uint32_t dst, const void *src,
242 uint32_t size, bool verify)
243{
244 struct spi_flash_ctrl *ct = c->ctrl;
245 uint32_t todo = size;
246 uint32_t d = dst;
247 const void *s = src;
248 uint8_t vbuf[0x100];
249 int rc;
250
251 /* Some sanity checking */
252 if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
253 return FLASH_ERR_PARM_ERROR;
254
255 FL_DBG("LIBFLASH: Writing to 0x%08x..0%08x...\n", dst, dst + size);
256
257 /*
258 * If the controller supports write and either we are in 3b mode
259 * or we are in 4b *and* the controller supports it, then do a
260 * high level write.
261 */
262 if ((!c->mode_4b || ct->set_4b) && ct->write) {
263 rc = ct->write(ct, dst, src, size);
264 if (rc)
265 return rc;
266 goto writing_done;
267 }
268
269 /* Otherwise, go manual if supported */
270 if (!ct->cmd_wr)
271 return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
272
273 /* Iterate for each page to write */
274 while(todo) {
275 uint32_t chunk;
276
277 /* Handle misaligned start */
278 chunk = 0x100 - (d & 0xff);
279 if (chunk > 0x100)
280 chunk = 0x100;
281 if (chunk > todo)
282 chunk = todo;
283
284 rc = fl_wpage(c, d, s, chunk);
285 if (rc) return rc;
286 d += chunk;
287 s += chunk;
288 todo -= chunk;
289 }
290
291 writing_done:
292 if (!verify)
293 return 0;
294
295 /* Verify */
296 FL_DBG("LIBFLASH: Verifying...\n");
297
298 while(size) {
299 uint32_t chunk;
300
301 chunk = sizeof(vbuf);
302 if (chunk > size)
303 chunk = size;
304 rc = flash_read(c, dst, vbuf, chunk);
305 if (rc) return rc;
306 if (memcmp(vbuf, src, chunk)) {
307 FL_ERR("LIBFLASH: Miscompare at 0x%08x\n", dst);
308 return FLASH_ERR_VERIFY_FAILURE;
309 }
310 dst += chunk;
311 src += chunk;
312 size -= chunk;
313 }
314 return 0;
315}
316
317enum sm_comp_res {
318 sm_no_change,
319 sm_need_write,
320 sm_need_erase,
321};
322
323static enum sm_comp_res flash_smart_comp(struct flash_chip *c,
324 const void *src,
325 uint32_t offset, uint32_t size)
326{
327 uint8_t *b = c->smart_buf + offset;
328 const uint8_t *s = src;
329 bool is_same = true;
330 uint32_t i;
331
332 /* SRC DEST NEED_ERASE
333 * 0 1 0
334 * 1 1 0
335 * 0 0 0
336 * 1 0 1
337 */
338 for (i = 0; i < size; i++) {
339 /* Any bit need to be set, need erase */
340 if (s[i] & ~b[i])
341 return sm_need_erase;
342 if (is_same && (b[i] != s[i]))
343 is_same = false;
344 }
345 return is_same ? sm_no_change : sm_need_write;
346}
347
348int flash_smart_write(struct flash_chip *c, uint32_t dst, const void *src,
349 uint32_t size)
350{
351 uint32_t er_size = c->min_erase_mask + 1;
352 uint32_t end = dst + size;
353 int rc;
354
355 /* Some sanity checking */
356 if (end <= dst || !size || end > c->tsize) {
357 FL_DBG("LIBFLASH: Smart write param error\n");
358 return FLASH_ERR_PARM_ERROR;
359 }
360
361 FL_DBG("LIBFLASH: Smart writing to 0x%08x..0%08x...\n",
362 dst, dst + size);
363
364 /* As long as we have something to write ... */
365 while(dst < end) {
366 uint32_t page, off, chunk;
367 enum sm_comp_res sr;
368
369 /* Figure out which erase page we are in and read it */
370 page = dst & ~c->min_erase_mask;
371 off = dst & c->min_erase_mask;
372 FL_DBG("LIBFLASH: reading page 0x%08x..0x%08x...",
373 page, page + er_size);
374 rc = flash_read(c, page, c->smart_buf, er_size);
375 if (rc) {
376 FL_DBG(" error %d!\n", rc);
377 return rc;
378 }
379
380 /* Locate the chunk of data we are working on */
381 chunk = er_size - off;
382 if (size < chunk)
383 chunk = size;
384
385 /* Compare against what we are writing and ff */
386 sr = flash_smart_comp(c, src, off, chunk);
387 switch(sr) {
388 case sm_no_change:
389 /* Identical, skip it */
390 FL_DBG(" same !\n");
391 break;
392 case sm_need_write:
393 /* Just needs writing over */
394 FL_DBG(" need write !\n");
395 rc = flash_write(c, dst, src, chunk, true);
396 if (rc) {
397 FL_DBG("LIBFLASH: Write error %d !\n", rc);
398 return rc;
399 }
400 break;
401 case sm_need_erase:
402 FL_DBG(" need erase !\n");
403 rc = flash_erase(c, page, er_size);
404 if (rc) {
405 FL_DBG("LIBFLASH: erase error %d !\n", rc);
406 return rc;
407 }
408 /* Then update the portion of the buffer and write the block */
409 memcpy(c->smart_buf + off, src, chunk);
410 rc = flash_write(c, page, c->smart_buf, er_size, true);
411 if (rc) {
412 FL_DBG("LIBFLASH: write error %d !\n", rc);
413 return rc;
414 }
415 break;
416 }
417 dst += chunk;
418 src += chunk;
419 size -= chunk;
420 }
421 return 0;
422}
423
424static int fl_chip_id(struct spi_flash_ctrl *ct, uint8_t *id_buf,
425 uint32_t *id_size)
426{
427 int rc;
428 uint8_t stat;
429
430 /* Check initial status */
431 rc = fl_read_stat(ct, &stat);
432 if (rc)
433 return rc;
434
435 /* If stuck writing, wait for idle */
436 if (stat & STAT_WIP) {
437 FL_ERR("LIBFLASH: Flash in writing state ! Waiting...\n");
438 rc = fl_sync_wait_idle(ct);
439 if (rc)
440 return rc;
441 } else
442 FL_DBG("LIBFLASH: Init status: %02x\n", stat);
443
444 /* Fallback to get ID manually */
445 rc = ct->cmd_rd(ct, CMD_RDID, false, 0, id_buf, 3);
446 if (rc)
447 return rc;
448 *id_size = 3;
449
450 return 0;
451}
452
453static int flash_identify(struct flash_chip *c)
454{
455 struct spi_flash_ctrl *ct = c->ctrl;
456 const struct flash_info *info;
457 uint32_t iid, id_size;
458#define MAX_ID_SIZE 16
459 uint8_t id[MAX_ID_SIZE];
460 int rc, i;
461
462 if (ct->chip_id) {
463 /* High level controller interface */
464 id_size = MAX_ID_SIZE;
465 rc = ct->chip_id(ct, id, &id_size);
466 } else
467 rc = fl_chip_id(ct, id, &id_size);
468 if (rc)
469 return rc;
470 if (id_size < 3)
471 return FLASH_ERR_CHIP_UNKNOWN;
472
473 /* Convert to a dword for lookup */
474 iid = id[0];
475 iid = (iid << 8) | id[1];
476 iid = (iid << 8) | id[2];
477
478 FL_DBG("LIBFLASH: Flash ID: %02x.%02x.%02x (%06x)\n",
479 id[0], id[1], id[2], iid);
480
481 /* Lookup in flash_info */
482 for (i = 0; i < ARRAY_SIZE(flash_info); i++) {
483 info = &flash_info[i];
484 if (info->id == iid)
485 break;
486 }
487 if (info->id != iid)
488 return FLASH_ERR_CHIP_UNKNOWN;
489
490 c->info = *info;
491 c->tsize = info->size;
492 ct->finfo = &c->info;
493
494 /*
495 * Let controller know about our settings and possibly
496 * override them
497 */
498 if (ct->setup) {
499 rc = ct->setup(ct, &c->tsize);
500 if (rc)
501 return rc;
502 }
503
504 /* Calculate min erase granularity */
505 if (c->info.flags & FL_ERASE_4K)
506 c->min_erase_mask = 0xfff;
507 else if (c->info.flags & FL_ERASE_32K)
508 c->min_erase_mask = 0x7fff;
509 else if (c->info.flags & FL_ERASE_64K)
510 c->min_erase_mask = 0xffff;
511 else {
512 /* No erase size ? oops ... */
513 FL_ERR("LIBFLASH: No erase sizes !\n");
514 return FLASH_ERR_CTRL_CONFIG_MISMATCH;
515 }
516
517 FL_DBG("LIBFLASH: Found chip %s size %dM erase granule: %dK\n",
518 c->info.name, c->tsize >> 20, (c->min_erase_mask + 1) >> 10);
519
520 return 0;
521}
522
523static int flash_set_4b(struct flash_chip *c, bool enable)
524{
525 struct spi_flash_ctrl *ct = c->ctrl;
526 int rc;
527
528 /* Some flash chips want this */
529 rc = fl_wren(ct);
530 if (rc) {
531 FL_ERR("LIBFLASH: Error %d enabling write for set_4b\n", rc);
532 /* Ignore the error & move on (could be wrprotect chip) */
533 }
534
535 /* Ignore error in case chip is write protected */
536
537 return ct->cmd_wr(ct, enable ? CMD_EN4B : CMD_EX4B, false, 0, NULL, 0);
538}
539
540int flash_force_4b_mode(struct flash_chip *c, bool enable_4b)
541{
542 struct spi_flash_ctrl *ct = c->ctrl;
543 int rc;
544
545 /*
546 * We only allow force 4b if both controller and flash do 4b
547 * as this is mainly used if a 3rd party tries to directly
548 * access a direct mapped read region
549 */
550 if (enable_4b && !((c->info.flags & FL_CAN_4B) && ct->set_4b))
551 return FLASH_ERR_4B_NOT_SUPPORTED;
552
553 /* Only send to flash directly on controllers that implement
554 * the low level callbacks
555 */
556 if (ct->cmd_wr) {
557 rc = flash_set_4b(c, enable_4b);
558 if (rc)
559 return rc;
560 }
561
562 /* Then inform the controller */
563 if (ct->set_4b)
564 rc = ct->set_4b(ct, enable_4b);
565 return rc;
566}
567
568static int flash_configure(struct flash_chip *c)
569{
570 struct spi_flash_ctrl *ct = c->ctrl;
571 int rc;
572
573 /* Crop flash size if necessary */
574 if (c->tsize > 0x01000000 && !(c->info.flags & FL_CAN_4B)) {
575 FL_ERR("LIBFLASH: Flash chip cropped to 16M, no 4b mode\n");
576 c->tsize = 0x01000000;
577 }
578
579 /* If flash chip > 16M, enable 4b mode */
580 if (c->tsize > 0x01000000) {
581 FL_DBG("LIBFLASH: Flash >16MB, enabling 4B mode...\n");
582
583 /* Set flash to 4b mode if we can */
584 if (ct->cmd_wr) {
585 rc = flash_set_4b(c, true);
586 if (rc) {
587 FL_ERR("LIBFLASH: Failed to set flash 4b mode\n");
588 return rc;
589 }
590 }
591
592
593 /* Set controller to 4b mode if supported */
594 if (ct->set_4b) {
595 FL_DBG("LIBFLASH: Enabling controller 4B mode...\n");
596 rc = ct->set_4b(ct, true);
597 if (rc) {
598 FL_ERR("LIBFLASH: Failed"
599 " to set controller 4b mode\n");
600 return rc;
601 }
602 }
603 } else {
604 FL_DBG("LIBFLASH: Flash <=16MB, disabling 4B mode...\n");
605
606 /*
607 * If flash chip supports 4b mode, make sure we disable
608 * it in case it was left over by the previous user
609 */
610 if (c->info.flags & FL_CAN_4B) {
611 rc = flash_set_4b(c, false);
612 if (rc) {
613 FL_ERR("LIBFLASH: Failed to"
614 " clear flash 4b mode\n");
615 return rc;
616 }
617 }
618
619 /* Set controller to 3b mode if mode switch is supported */
620 if (ct->set_4b) {
621 FL_DBG("LIBFLASH: Disabling controller 4B mode...\n");
622 rc = ct->set_4b(ct, false);
623 if (rc) {
624 FL_ERR("LIBFLASH: Failed to"
625 " clear controller 4b mode\n");
626 return rc;
627 }
628 }
629 }
630 return 0;
631}
632
633int flash_get_info(struct flash_chip *chip, const char **name,
634 uint32_t *total_size, uint32_t *erase_granule)
635{
636 if (name)
637 *name = chip->info.name;
638 if (total_size)
639 *total_size = chip->tsize;
640 if (erase_granule)
641 *erase_granule = chip->min_erase_mask + 1;
642 return 0;
643}
644
645int flash_init(struct spi_flash_ctrl *ctrl, struct flash_chip **flash)
646{
647 struct flash_chip *c;
648 int rc;
649
650 *flash = NULL;
651 c = malloc(sizeof(struct flash_chip));
652 if (!c)
653 return FLASH_ERR_MALLOC_FAILED;
654 memset(c, 0, sizeof(*c));
655 c->ctrl = ctrl;
656
657 rc = flash_identify(c);
658 if (rc) {
659 FL_ERR("LIBFLASH: Flash identification failed\n");
660 goto bail;
661 }
662 c->smart_buf = malloc(c->min_erase_mask + 1);
663 if (!c->smart_buf) {
664 FL_ERR("LIBFLASH: Failed to allocate smart buffer !\n");
665 rc = FLASH_ERR_MALLOC_FAILED;
666 goto bail;
667 }
668 rc = flash_configure(c);
669 if (rc)
670 FL_ERR("LIBFLASH: Flash configuration failed\n");
671 bail:
672 if (rc) {
673 free(c);
674 return rc;
675 }
676 *flash = c;
677 return 0;
678}
679
680void flash_exit(struct flash_chip *chip)
681{
682 /* XXX Make sure we are idle etc... */
683 free(chip);
684}
685