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Xo Wang3f87de82016-09-22 11:17:01 -07001/**
2 * Copyright © 2016 Google Inc.
3 * Copyright © 2016 IBM Corporation
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 */
17
18#ifndef __POWER_GPIO_H__
19#define __POWER_GPIO_H__
20
21#include <stddef.h>
22#include <glib.h>
23#include "gpio.h"
24
25typedef struct PowerGpio {
Xo Wangc1ce68b2016-09-22 16:34:37 -070026 /* Optional active high pin enabling writes to latched power_up pins. */
27 GPIO latch_out; /* NULL name if not used. */
Xo Wang3f87de82016-09-22 11:17:01 -070028 /* Active high pin that is asserted following successful host power up. */
29 GPIO power_good_in;
30 /* Selectable polarity pins enabling host power rails. */
31 size_t num_power_up_outs;
32 GPIO *power_up_outs;
33 /* TRUE for active high */
34 gboolean *power_up_pols;
35 /* Selectable polarity pins holding system complexes in reset. */
36 size_t num_reset_outs;
37 GPIO *reset_outs;
38 /* TRUE for active high */
39 gboolean *reset_pols;
Yi Li0475f652016-10-25 13:19:59 +080040 size_t num_pci_reset_outs;
41 GPIO *pci_reset_outs;
42 /* TRUE for active high */
43 gboolean *pci_reset_pols;
44 gboolean *pci_reset_holds;
Xo Wang3f87de82016-09-22 11:17:01 -070045} PowerGpio;
46
47/* Read system configuration for power GPIOs. */
48gboolean read_power_gpio(GDBusConnection *connection, PowerGpio *power_gpio);
49/* Frees internal buffers. Does not free parameter. Does not close GPIOs. */
50void free_power_gpio(PowerGpio *power_gpio);
51
52#endif