blob: 762d9e7caff7da10ad2fcaefdee71a0bd5ddc592 [file] [log] [blame]
Norman James6a58a272015-10-07 14:34:16 -05001#include <stdlib.h>
2#include <stdio.h>
3#include <string.h>
4
5#include "libflash.h"
6#include "libflash-priv.h"
7
8static const struct flash_info flash_info[] = {
9 { 0xc22019, 0x02000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL25635F"},
10 { 0xc2201a, 0x04000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL51235F"},
11 { 0xef4018, 0x01000000, FL_ERASE_ALL, "Winbond W25Q128BV" },
Chris Austen3939e2d2016-01-11 10:13:28 -060012 { 0xef4019, 0x02000000, FL_ERASE_ALL | FL_CAN_4B | FL_ERASE_64K|FL_ERASE_BULK, "Winbond W25Q256BV"},
Norman James6a58a272015-10-07 14:34:16 -050013 { 0x20ba20, 0x04000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
14 FL_ERASE_BULK | FL_MICRON_BUGS,
15 "Micron N25Qx512Ax" },
Norman Jamesfb06df72015-12-18 14:58:50 -060016 { 0x20ba19, 0x02000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
17 FL_ERASE_BULK | FL_MICRON_BUGS,
18 "Micron N25Q256Ax" },
19 { 0x1940ef, 0x02000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
20 FL_ERASE_BULK | FL_MICRON_BUGS,
21 "Micron N25Qx256Ax" },
Norman James6a58a272015-10-07 14:34:16 -050022 { 0x55aa55, 0x00100000, FL_ERASE_ALL | FL_CAN_4B, "TEST_FLASH" },
Norman James6621b942015-11-11 07:39:23 -060023
Norman James6a58a272015-10-07 14:34:16 -050024};
25
26struct flash_chip {
27 struct spi_flash_ctrl *ctrl; /* Controller */
28 struct flash_info info; /* Flash info */
29 uint32_t tsize; /* Corrected flash size */
30 uint32_t min_erase_mask; /* Minimum erase size */
31 bool mode_4b; /* Flash currently in 4b mode */
32 struct flash_req *cur_req; /* Current request */
33 void *smart_buf; /* Buffer for smart writes */
34};
35
36bool libflash_debug;
37
38int fl_read_stat(struct spi_flash_ctrl *ct, uint8_t *stat)
39{
40 return ct->cmd_rd(ct, CMD_RDSR, false, 0, stat, 1);
41}
42
43static void fl_micron_status(struct spi_flash_ctrl *ct)
44{
45 uint8_t flst;
46
47 /*
48 * After a success status on a write or erase, we
49 * need to do that command or some chip variants will
50 * lock
51 */
52 ct->cmd_rd(ct, CMD_MIC_RDFLST, false, 0, &flst, 1);
53}
54
55/* Synchronous write completion, probably need a yield hook */
56int fl_sync_wait_idle(struct spi_flash_ctrl *ct)
57{
58 uint8_t stat;
59 int rc;
60
61 /* XXX Add timeout */
62 for (;;) {
63 rc = fl_read_stat(ct, &stat);
64 if (rc) return rc;
65 if (!(stat & STAT_WIP)) {
66 if (ct->finfo->flags & FL_MICRON_BUGS)
67 fl_micron_status(ct);
68 return 0;
69 }
70 }
71 /* return FLASH_ERR_WIP_TIMEOUT; */
72}
73
74/* Exported for internal use */
75int fl_wren(struct spi_flash_ctrl *ct)
76{
77 int i, rc;
78 uint8_t stat;
79
80 /* Some flashes need it to be hammered */
81 for (i = 0; i < 1000; i++) {
82 rc = ct->cmd_wr(ct, CMD_WREN, false, 0, NULL, 0);
83 if (rc) return rc;
84 rc = fl_read_stat(ct, &stat);
85 if (rc) return rc;
86 if (stat & STAT_WIP) {
87 FL_ERR("LIBFLASH: WREN has WIP status set !\n");
88 rc = fl_sync_wait_idle(ct);
89 if (rc)
90 return rc;
91 continue;
92 }
93 if (stat & STAT_WEN)
94 return 0;
95 }
96 return FLASH_ERR_WREN_TIMEOUT;
97}
98
99int flash_read(struct flash_chip *c, uint32_t pos, void *buf, uint32_t len)
100{
101 struct spi_flash_ctrl *ct = c->ctrl;
102
103 /* XXX Add sanity/bound checking */
104
105 /*
106 * If the controller supports read and either we are in 3b mode
107 * or we are in 4b *and* the controller supports it, then do a
108 * high level read.
109 */
110 if ((!c->mode_4b || ct->set_4b) && ct->read)
111 return ct->read(ct, pos, buf, len);
112
113 /* Otherwise, go manual if supported */
114 if (!ct->cmd_rd)
115 return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
116 return ct->cmd_rd(ct, CMD_READ, true, pos, buf, len);
117}
118
119static void fl_get_best_erase(struct flash_chip *c, uint32_t dst, uint32_t size,
120 uint32_t *chunk, uint8_t *cmd)
121{
122 /* Smaller than 32k, use 4k */
123 if ((dst & 0x7fff) || (size < 0x8000)) {
124 *chunk = 0x1000;
125 *cmd = CMD_SE;
126 return;
127 }
128 /* Smaller than 64k and 32k is supported, use it */
129 if ((c->info.flags & FL_ERASE_32K) &&
130 ((dst & 0xffff) || (size < 0x10000))) {
131 *chunk = 0x8000;
132 *cmd = CMD_BE32K;
133 return;
134 }
135 /* If 64K is not supported, use whatever smaller size is */
136 if (!(c->info.flags & FL_ERASE_64K)) {
137 if (c->info.flags & FL_ERASE_32K) {
138 *chunk = 0x8000;
139 *cmd = CMD_BE32K;
140 } else {
141 *chunk = 0x1000;
142 *cmd = CMD_SE;
143 }
144 return;
145 }
146 /* Allright, let's go for 64K */
147 *chunk = 0x10000;
148 *cmd = CMD_BE;
149}
150
151int flash_erase(struct flash_chip *c, uint32_t dst, uint32_t size)
152{
153 struct spi_flash_ctrl *ct = c->ctrl;
154 uint32_t chunk;
155 uint8_t cmd;
156 int rc;
157
158 /* Some sanity checking */
159 if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
160 return FLASH_ERR_PARM_ERROR;
161
162 /* Check boundaries fit erase blocks */
163 if ((dst | size) & c->min_erase_mask)
164 return FLASH_ERR_ERASE_BOUNDARY;
165
166 FL_DBG("LIBFLASH: Erasing 0x%08x..0%08x...\n", dst, dst + size);
167
168 /* Use controller erase if supported */
169 if (ct->erase)
170 return ct->erase(ct, dst, size);
171
172 /* Allright, loop as long as there's something to erase */
173 while(size) {
174 /* How big can we make it based on alignent & size */
175 fl_get_best_erase(c, dst, size, &chunk, &cmd);
176
177 /* Poke write enable */
178 rc = fl_wren(ct);
179 if (rc)
180 return rc;
181
182 /* Send erase command */
183 rc = ct->cmd_wr(ct, cmd, true, dst, NULL, 0);
184 if (rc)
185 return rc;
186
187 /* Wait for write complete */
188 rc = fl_sync_wait_idle(ct);
189 if (rc)
190 return rc;
191
192 size -= chunk;
193 dst += chunk;
194 }
195 return 0;
196}
197
198int flash_erase_chip(struct flash_chip *c)
199{
200 struct spi_flash_ctrl *ct = c->ctrl;
201 int rc;
202
203 /* XXX TODO: Fallback to using normal erases */
204 if (!(c->info.flags & (FL_ERASE_CHIP|FL_ERASE_BULK)))
205 return FLASH_ERR_CHIP_ER_NOT_SUPPORTED;
206
207 FL_DBG("LIBFLASH: Erasing chip...\n");
208
209 /* Use controller erase if supported */
210 if (ct->erase)
211 return ct->erase(ct, 0, 0xffffffff);
212
213 rc = fl_wren(ct);
214 if (rc) return rc;
215
216 if (c->info.flags & FL_ERASE_CHIP)
217 rc = ct->cmd_wr(ct, CMD_CE, false, 0, NULL, 0);
218 else
219 rc = ct->cmd_wr(ct, CMD_MIC_BULK_ERASE, false, 0, NULL, 0);
220 if (rc)
221 return rc;
222
223 /* Wait for write complete */
224 return fl_sync_wait_idle(ct);
225}
226
227static int fl_wpage(struct flash_chip *c, uint32_t dst, const void *src,
228 uint32_t size)
229{
230 struct spi_flash_ctrl *ct = c->ctrl;
231 int rc;
232
233 if (size < 1 || size > 0x100)
234 return FLASH_ERR_BAD_PAGE_SIZE;
235
236 rc = fl_wren(ct);
237 if (rc) return rc;
238
239 rc = ct->cmd_wr(ct, CMD_PP, true, dst, src, size);
240 if (rc)
241 return rc;
242
243 /* Wait for write complete */
244 return fl_sync_wait_idle(ct);
245}
246
247int flash_write(struct flash_chip *c, uint32_t dst, const void *src,
248 uint32_t size, bool verify)
249{
250 struct spi_flash_ctrl *ct = c->ctrl;
251 uint32_t todo = size;
252 uint32_t d = dst;
253 const void *s = src;
254 uint8_t vbuf[0x100];
255 int rc;
256
257 /* Some sanity checking */
258 if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
259 return FLASH_ERR_PARM_ERROR;
260
261 FL_DBG("LIBFLASH: Writing to 0x%08x..0%08x...\n", dst, dst + size);
262
263 /*
264 * If the controller supports write and either we are in 3b mode
265 * or we are in 4b *and* the controller supports it, then do a
266 * high level write.
267 */
268 if ((!c->mode_4b || ct->set_4b) && ct->write) {
269 rc = ct->write(ct, dst, src, size);
270 if (rc)
271 return rc;
272 goto writing_done;
273 }
274
275 /* Otherwise, go manual if supported */
276 if (!ct->cmd_wr)
277 return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
278
279 /* Iterate for each page to write */
280 while(todo) {
281 uint32_t chunk;
282
283 /* Handle misaligned start */
284 chunk = 0x100 - (d & 0xff);
285 if (chunk > 0x100)
286 chunk = 0x100;
287 if (chunk > todo)
288 chunk = todo;
289
290 rc = fl_wpage(c, d, s, chunk);
291 if (rc) return rc;
292 d += chunk;
293 s += chunk;
294 todo -= chunk;
295 }
296
297 writing_done:
298 if (!verify)
299 return 0;
300
301 /* Verify */
302 FL_DBG("LIBFLASH: Verifying...\n");
303
304 while(size) {
305 uint32_t chunk;
306
307 chunk = sizeof(vbuf);
308 if (chunk > size)
309 chunk = size;
310 rc = flash_read(c, dst, vbuf, chunk);
311 if (rc) return rc;
312 if (memcmp(vbuf, src, chunk)) {
313 FL_ERR("LIBFLASH: Miscompare at 0x%08x\n", dst);
314 return FLASH_ERR_VERIFY_FAILURE;
315 }
316 dst += chunk;
317 src += chunk;
318 size -= chunk;
319 }
320 return 0;
321}
322
323enum sm_comp_res {
324 sm_no_change,
325 sm_need_write,
326 sm_need_erase,
327};
328
329static enum sm_comp_res flash_smart_comp(struct flash_chip *c,
330 const void *src,
331 uint32_t offset, uint32_t size)
332{
333 uint8_t *b = c->smart_buf + offset;
334 const uint8_t *s = src;
335 bool is_same = true;
336 uint32_t i;
337
338 /* SRC DEST NEED_ERASE
339 * 0 1 0
340 * 1 1 0
341 * 0 0 0
342 * 1 0 1
343 */
344 for (i = 0; i < size; i++) {
345 /* Any bit need to be set, need erase */
346 if (s[i] & ~b[i])
347 return sm_need_erase;
348 if (is_same && (b[i] != s[i]))
349 is_same = false;
350 }
351 return is_same ? sm_no_change : sm_need_write;
352}
353
354int flash_smart_write(struct flash_chip *c, uint32_t dst, const void *src,
355 uint32_t size)
356{
357 uint32_t er_size = c->min_erase_mask + 1;
358 uint32_t end = dst + size;
359 int rc;
360
361 /* Some sanity checking */
362 if (end <= dst || !size || end > c->tsize) {
363 FL_DBG("LIBFLASH: Smart write param error\n");
364 return FLASH_ERR_PARM_ERROR;
365 }
366
367 FL_DBG("LIBFLASH: Smart writing to 0x%08x..0%08x...\n",
368 dst, dst + size);
369
370 /* As long as we have something to write ... */
371 while(dst < end) {
372 uint32_t page, off, chunk;
373 enum sm_comp_res sr;
374
375 /* Figure out which erase page we are in and read it */
376 page = dst & ~c->min_erase_mask;
377 off = dst & c->min_erase_mask;
378 FL_DBG("LIBFLASH: reading page 0x%08x..0x%08x...",
379 page, page + er_size);
380 rc = flash_read(c, page, c->smart_buf, er_size);
381 if (rc) {
382 FL_DBG(" error %d!\n", rc);
383 return rc;
384 }
385
386 /* Locate the chunk of data we are working on */
387 chunk = er_size - off;
388 if (size < chunk)
389 chunk = size;
390
391 /* Compare against what we are writing and ff */
392 sr = flash_smart_comp(c, src, off, chunk);
393 switch(sr) {
394 case sm_no_change:
395 /* Identical, skip it */
396 FL_DBG(" same !\n");
397 break;
398 case sm_need_write:
399 /* Just needs writing over */
400 FL_DBG(" need write !\n");
401 rc = flash_write(c, dst, src, chunk, true);
402 if (rc) {
403 FL_DBG("LIBFLASH: Write error %d !\n", rc);
404 return rc;
405 }
406 break;
407 case sm_need_erase:
408 FL_DBG(" need erase !\n");
409 rc = flash_erase(c, page, er_size);
410 if (rc) {
411 FL_DBG("LIBFLASH: erase error %d !\n", rc);
412 return rc;
413 }
414 /* Then update the portion of the buffer and write the block */
415 memcpy(c->smart_buf + off, src, chunk);
416 rc = flash_write(c, page, c->smart_buf, er_size, true);
417 if (rc) {
418 FL_DBG("LIBFLASH: write error %d !\n", rc);
419 return rc;
420 }
421 break;
422 }
423 dst += chunk;
424 src += chunk;
425 size -= chunk;
426 }
427 return 0;
428}
429
430static int fl_chip_id(struct spi_flash_ctrl *ct, uint8_t *id_buf,
431 uint32_t *id_size)
432{
433 int rc;
434 uint8_t stat;
435
436 /* Check initial status */
437 rc = fl_read_stat(ct, &stat);
438 if (rc)
439 return rc;
440
441 /* If stuck writing, wait for idle */
442 if (stat & STAT_WIP) {
443 FL_ERR("LIBFLASH: Flash in writing state ! Waiting...\n");
444 rc = fl_sync_wait_idle(ct);
445 if (rc)
446 return rc;
447 } else
448 FL_DBG("LIBFLASH: Init status: %02x\n", stat);
449
450 /* Fallback to get ID manually */
451 rc = ct->cmd_rd(ct, CMD_RDID, false, 0, id_buf, 3);
452 if (rc)
453 return rc;
454 *id_size = 3;
455
456 return 0;
457}
458
459static int flash_identify(struct flash_chip *c)
460{
461 struct spi_flash_ctrl *ct = c->ctrl;
462 const struct flash_info *info;
463 uint32_t iid, id_size;
464#define MAX_ID_SIZE 16
465 uint8_t id[MAX_ID_SIZE];
466 int rc, i;
467
468 if (ct->chip_id) {
469 /* High level controller interface */
470 id_size = MAX_ID_SIZE;
471 rc = ct->chip_id(ct, id, &id_size);
472 } else
473 rc = fl_chip_id(ct, id, &id_size);
474 if (rc)
475 return rc;
476 if (id_size < 3)
477 return FLASH_ERR_CHIP_UNKNOWN;
478
479 /* Convert to a dword for lookup */
480 iid = id[0];
481 iid = (iid << 8) | id[1];
482 iid = (iid << 8) | id[2];
483
484 FL_DBG("LIBFLASH: Flash ID: %02x.%02x.%02x (%06x)\n",
485 id[0], id[1], id[2], iid);
486
487 /* Lookup in flash_info */
488 for (i = 0; i < ARRAY_SIZE(flash_info); i++) {
489 info = &flash_info[i];
490 if (info->id == iid)
491 break;
492 }
493 if (info->id != iid)
494 return FLASH_ERR_CHIP_UNKNOWN;
495
496 c->info = *info;
497 c->tsize = info->size;
498 ct->finfo = &c->info;
499
500 /*
501 * Let controller know about our settings and possibly
502 * override them
503 */
504 if (ct->setup) {
505 rc = ct->setup(ct, &c->tsize);
506 if (rc)
507 return rc;
508 }
509
510 /* Calculate min erase granularity */
511 if (c->info.flags & FL_ERASE_4K)
512 c->min_erase_mask = 0xfff;
513 else if (c->info.flags & FL_ERASE_32K)
514 c->min_erase_mask = 0x7fff;
515 else if (c->info.flags & FL_ERASE_64K)
516 c->min_erase_mask = 0xffff;
517 else {
518 /* No erase size ? oops ... */
519 FL_ERR("LIBFLASH: No erase sizes !\n");
520 return FLASH_ERR_CTRL_CONFIG_MISMATCH;
521 }
522
523 FL_DBG("LIBFLASH: Found chip %s size %dM erase granule: %dK\n",
524 c->info.name, c->tsize >> 20, (c->min_erase_mask + 1) >> 10);
525
526 return 0;
527}
528
529static int flash_set_4b(struct flash_chip *c, bool enable)
530{
531 struct spi_flash_ctrl *ct = c->ctrl;
532 int rc;
533
534 /* Some flash chips want this */
535 rc = fl_wren(ct);
536 if (rc) {
537 FL_ERR("LIBFLASH: Error %d enabling write for set_4b\n", rc);
538 /* Ignore the error & move on (could be wrprotect chip) */
539 }
540
541 /* Ignore error in case chip is write protected */
542
543 return ct->cmd_wr(ct, enable ? CMD_EN4B : CMD_EX4B, false, 0, NULL, 0);
544}
545
546int flash_force_4b_mode(struct flash_chip *c, bool enable_4b)
547{
548 struct spi_flash_ctrl *ct = c->ctrl;
549 int rc;
550
551 /*
552 * We only allow force 4b if both controller and flash do 4b
553 * as this is mainly used if a 3rd party tries to directly
554 * access a direct mapped read region
555 */
556 if (enable_4b && !((c->info.flags & FL_CAN_4B) && ct->set_4b))
557 return FLASH_ERR_4B_NOT_SUPPORTED;
558
559 /* Only send to flash directly on controllers that implement
560 * the low level callbacks
561 */
562 if (ct->cmd_wr) {
563 rc = flash_set_4b(c, enable_4b);
564 if (rc)
565 return rc;
566 }
567
568 /* Then inform the controller */
569 if (ct->set_4b)
570 rc = ct->set_4b(ct, enable_4b);
571 return rc;
572}
573
574static int flash_configure(struct flash_chip *c)
575{
576 struct spi_flash_ctrl *ct = c->ctrl;
577 int rc;
578
579 /* Crop flash size if necessary */
580 if (c->tsize > 0x01000000 && !(c->info.flags & FL_CAN_4B)) {
581 FL_ERR("LIBFLASH: Flash chip cropped to 16M, no 4b mode\n");
582 c->tsize = 0x01000000;
583 }
584
585 /* If flash chip > 16M, enable 4b mode */
586 if (c->tsize > 0x01000000) {
587 FL_DBG("LIBFLASH: Flash >16MB, enabling 4B mode...\n");
588
589 /* Set flash to 4b mode if we can */
590 if (ct->cmd_wr) {
591 rc = flash_set_4b(c, true);
592 if (rc) {
593 FL_ERR("LIBFLASH: Failed to set flash 4b mode\n");
594 return rc;
595 }
596 }
597
598
599 /* Set controller to 4b mode if supported */
600 if (ct->set_4b) {
601 FL_DBG("LIBFLASH: Enabling controller 4B mode...\n");
602 rc = ct->set_4b(ct, true);
603 if (rc) {
604 FL_ERR("LIBFLASH: Failed"
605 " to set controller 4b mode\n");
606 return rc;
607 }
608 }
609 } else {
610 FL_DBG("LIBFLASH: Flash <=16MB, disabling 4B mode...\n");
611
612 /*
613 * If flash chip supports 4b mode, make sure we disable
614 * it in case it was left over by the previous user
615 */
616 if (c->info.flags & FL_CAN_4B) {
617 rc = flash_set_4b(c, false);
618 if (rc) {
619 FL_ERR("LIBFLASH: Failed to"
620 " clear flash 4b mode\n");
621 return rc;
622 }
623 }
624
625 /* Set controller to 3b mode if mode switch is supported */
626 if (ct->set_4b) {
627 FL_DBG("LIBFLASH: Disabling controller 4B mode...\n");
628 rc = ct->set_4b(ct, false);
629 if (rc) {
630 FL_ERR("LIBFLASH: Failed to"
631 " clear controller 4b mode\n");
632 return rc;
633 }
634 }
635 }
636 return 0;
637}
638
639int flash_get_info(struct flash_chip *chip, const char **name,
640 uint32_t *total_size, uint32_t *erase_granule)
641{
642 if (name)
643 *name = chip->info.name;
644 if (total_size)
645 *total_size = chip->tsize;
646 if (erase_granule)
647 *erase_granule = chip->min_erase_mask + 1;
648 return 0;
649}
650
651int flash_init(struct spi_flash_ctrl *ctrl, struct flash_chip **flash)
652{
653 struct flash_chip *c;
654 int rc;
655
656 *flash = NULL;
657 c = malloc(sizeof(struct flash_chip));
658 if (!c)
659 return FLASH_ERR_MALLOC_FAILED;
660 memset(c, 0, sizeof(*c));
661 c->ctrl = ctrl;
662
663 rc = flash_identify(c);
664 if (rc) {
665 FL_ERR("LIBFLASH: Flash identification failed\n");
666 goto bail;
667 }
668 c->smart_buf = malloc(c->min_erase_mask + 1);
669 if (!c->smart_buf) {
670 FL_ERR("LIBFLASH: Failed to allocate smart buffer !\n");
671 rc = FLASH_ERR_MALLOC_FAILED;
672 goto bail;
673 }
674 rc = flash_configure(c);
675 if (rc)
676 FL_ERR("LIBFLASH: Flash configuration failed\n");
677 bail:
678 if (rc) {
679 free(c);
680 return rc;
681 }
682 *flash = c;
683 return 0;
684}
685
686void flash_exit(struct flash_chip *chip)
687{
688 /* XXX Make sure we are idle etc... */
689 free(chip);
690}
691