Norman James | 6a58a27 | 2015-10-07 14:34:16 -0500 | [diff] [blame] | 1 | #include <stdlib.h>
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| 2 | #include <stdio.h>
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| 3 | #include <string.h>
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| 4 |
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| 5 | #include "libflash.h"
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| 6 | #include "libflash-priv.h"
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| 7 |
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| 8 | static const struct flash_info flash_info[] = {
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| 9 | { 0xc22019, 0x02000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL25635F"},
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| 10 | { 0xc2201a, 0x04000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL51235F"},
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| 11 | { 0xef4018, 0x01000000, FL_ERASE_ALL, "Winbond W25Q128BV" },
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| 12 | { 0x20ba20, 0x04000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
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| 13 | FL_ERASE_BULK | FL_MICRON_BUGS,
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| 14 | "Micron N25Qx512Ax" },
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| 15 | { 0x55aa55, 0x00100000, FL_ERASE_ALL | FL_CAN_4B, "TEST_FLASH" },
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Norman James | ca3f603 | 2015-11-11 07:39:23 -0600 | [diff] [blame^] | 16 | { 0x20ba19, 0x02000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
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| 17 | FL_ERASE_BULK | FL_MICRON_BUGS,
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| 18 | "Micron N25Qx256Ax" },
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| 19 |
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Norman James | 6a58a27 | 2015-10-07 14:34:16 -0500 | [diff] [blame] | 20 | };
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| 21 |
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| 22 | struct flash_chip {
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| 23 | struct spi_flash_ctrl *ctrl; /* Controller */
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| 24 | struct flash_info info; /* Flash info */
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| 25 | uint32_t tsize; /* Corrected flash size */
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| 26 | uint32_t min_erase_mask; /* Minimum erase size */
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| 27 | bool mode_4b; /* Flash currently in 4b mode */
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| 28 | struct flash_req *cur_req; /* Current request */
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| 29 | void *smart_buf; /* Buffer for smart writes */
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| 30 | };
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| 31 |
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| 32 | bool libflash_debug;
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| 33 |
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| 34 | int fl_read_stat(struct spi_flash_ctrl *ct, uint8_t *stat)
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| 35 | {
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| 36 | return ct->cmd_rd(ct, CMD_RDSR, false, 0, stat, 1);
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| 37 | }
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| 38 |
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| 39 | static void fl_micron_status(struct spi_flash_ctrl *ct)
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| 40 | {
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| 41 | uint8_t flst;
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| 42 |
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| 43 | /*
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| 44 | * After a success status on a write or erase, we
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| 45 | * need to do that command or some chip variants will
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| 46 | * lock
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| 47 | */
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| 48 | ct->cmd_rd(ct, CMD_MIC_RDFLST, false, 0, &flst, 1);
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| 49 | }
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| 50 |
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| 51 | /* Synchronous write completion, probably need a yield hook */
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| 52 | int fl_sync_wait_idle(struct spi_flash_ctrl *ct)
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| 53 | {
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| 54 | uint8_t stat;
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| 55 | int rc;
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| 56 |
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| 57 | /* XXX Add timeout */
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| 58 | for (;;) {
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| 59 | rc = fl_read_stat(ct, &stat);
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| 60 | if (rc) return rc;
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| 61 | if (!(stat & STAT_WIP)) {
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| 62 | if (ct->finfo->flags & FL_MICRON_BUGS)
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| 63 | fl_micron_status(ct);
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| 64 | return 0;
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| 65 | }
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| 66 | }
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| 67 | /* return FLASH_ERR_WIP_TIMEOUT; */
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| 68 | }
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| 69 |
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| 70 | /* Exported for internal use */
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| 71 | int fl_wren(struct spi_flash_ctrl *ct)
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| 72 | {
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| 73 | int i, rc;
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| 74 | uint8_t stat;
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| 75 |
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| 76 | /* Some flashes need it to be hammered */
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| 77 | for (i = 0; i < 1000; i++) {
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| 78 | rc = ct->cmd_wr(ct, CMD_WREN, false, 0, NULL, 0);
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| 79 | if (rc) return rc;
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| 80 | rc = fl_read_stat(ct, &stat);
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| 81 | if (rc) return rc;
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| 82 | if (stat & STAT_WIP) {
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| 83 | FL_ERR("LIBFLASH: WREN has WIP status set !\n");
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| 84 | rc = fl_sync_wait_idle(ct);
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| 85 | if (rc)
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| 86 | return rc;
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| 87 | continue;
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| 88 | }
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| 89 | if (stat & STAT_WEN)
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| 90 | return 0;
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| 91 | }
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| 92 | return FLASH_ERR_WREN_TIMEOUT;
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| 93 | }
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| 94 |
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| 95 | int flash_read(struct flash_chip *c, uint32_t pos, void *buf, uint32_t len)
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| 96 | {
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| 97 | struct spi_flash_ctrl *ct = c->ctrl;
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| 98 |
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| 99 | /* XXX Add sanity/bound checking */
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| 100 |
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| 101 | /*
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| 102 | * If the controller supports read and either we are in 3b mode
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| 103 | * or we are in 4b *and* the controller supports it, then do a
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| 104 | * high level read.
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| 105 | */
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| 106 | if ((!c->mode_4b || ct->set_4b) && ct->read)
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| 107 | return ct->read(ct, pos, buf, len);
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| 108 |
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| 109 | /* Otherwise, go manual if supported */
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| 110 | if (!ct->cmd_rd)
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| 111 | return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
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| 112 | return ct->cmd_rd(ct, CMD_READ, true, pos, buf, len);
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| 113 | }
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| 114 |
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| 115 | static void fl_get_best_erase(struct flash_chip *c, uint32_t dst, uint32_t size,
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| 116 | uint32_t *chunk, uint8_t *cmd)
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| 117 | {
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| 118 | /* Smaller than 32k, use 4k */
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| 119 | if ((dst & 0x7fff) || (size < 0x8000)) {
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| 120 | *chunk = 0x1000;
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| 121 | *cmd = CMD_SE;
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| 122 | return;
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| 123 | }
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| 124 | /* Smaller than 64k and 32k is supported, use it */
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| 125 | if ((c->info.flags & FL_ERASE_32K) &&
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| 126 | ((dst & 0xffff) || (size < 0x10000))) {
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| 127 | *chunk = 0x8000;
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| 128 | *cmd = CMD_BE32K;
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| 129 | return;
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| 130 | }
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| 131 | /* If 64K is not supported, use whatever smaller size is */
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| 132 | if (!(c->info.flags & FL_ERASE_64K)) {
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| 133 | if (c->info.flags & FL_ERASE_32K) {
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| 134 | *chunk = 0x8000;
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| 135 | *cmd = CMD_BE32K;
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| 136 | } else {
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| 137 | *chunk = 0x1000;
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| 138 | *cmd = CMD_SE;
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| 139 | }
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| 140 | return;
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| 141 | }
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| 142 | /* Allright, let's go for 64K */
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| 143 | *chunk = 0x10000;
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| 144 | *cmd = CMD_BE;
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| 145 | }
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| 146 |
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| 147 | int flash_erase(struct flash_chip *c, uint32_t dst, uint32_t size)
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| 148 | {
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| 149 | struct spi_flash_ctrl *ct = c->ctrl;
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| 150 | uint32_t chunk;
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| 151 | uint8_t cmd;
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| 152 | int rc;
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| 153 |
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| 154 | /* Some sanity checking */
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| 155 | if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
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| 156 | return FLASH_ERR_PARM_ERROR;
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| 157 |
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| 158 | /* Check boundaries fit erase blocks */
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| 159 | if ((dst | size) & c->min_erase_mask)
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| 160 | return FLASH_ERR_ERASE_BOUNDARY;
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| 161 |
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| 162 | FL_DBG("LIBFLASH: Erasing 0x%08x..0%08x...\n", dst, dst + size);
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| 163 |
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| 164 | /* Use controller erase if supported */
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| 165 | if (ct->erase)
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| 166 | return ct->erase(ct, dst, size);
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| 167 |
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| 168 | /* Allright, loop as long as there's something to erase */
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| 169 | while(size) {
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| 170 | /* How big can we make it based on alignent & size */
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| 171 | fl_get_best_erase(c, dst, size, &chunk, &cmd);
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| 172 |
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| 173 | /* Poke write enable */
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| 174 | rc = fl_wren(ct);
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| 175 | if (rc)
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| 176 | return rc;
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| 177 |
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| 178 | /* Send erase command */
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| 179 | rc = ct->cmd_wr(ct, cmd, true, dst, NULL, 0);
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| 180 | if (rc)
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| 181 | return rc;
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| 182 |
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| 183 | /* Wait for write complete */
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| 184 | rc = fl_sync_wait_idle(ct);
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| 185 | if (rc)
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| 186 | return rc;
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| 187 |
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| 188 | size -= chunk;
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| 189 | dst += chunk;
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| 190 | }
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| 191 | return 0;
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| 192 | }
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| 193 |
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| 194 | int flash_erase_chip(struct flash_chip *c)
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| 195 | {
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| 196 | struct spi_flash_ctrl *ct = c->ctrl;
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| 197 | int rc;
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| 198 |
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| 199 | /* XXX TODO: Fallback to using normal erases */
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| 200 | if (!(c->info.flags & (FL_ERASE_CHIP|FL_ERASE_BULK)))
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| 201 | return FLASH_ERR_CHIP_ER_NOT_SUPPORTED;
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| 202 |
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| 203 | FL_DBG("LIBFLASH: Erasing chip...\n");
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| 204 |
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| 205 | /* Use controller erase if supported */
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| 206 | if (ct->erase)
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| 207 | return ct->erase(ct, 0, 0xffffffff);
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| 208 |
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| 209 | rc = fl_wren(ct);
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| 210 | if (rc) return rc;
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| 211 |
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| 212 | if (c->info.flags & FL_ERASE_CHIP)
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| 213 | rc = ct->cmd_wr(ct, CMD_CE, false, 0, NULL, 0);
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| 214 | else
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| 215 | rc = ct->cmd_wr(ct, CMD_MIC_BULK_ERASE, false, 0, NULL, 0);
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| 216 | if (rc)
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| 217 | return rc;
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| 218 |
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| 219 | /* Wait for write complete */
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| 220 | return fl_sync_wait_idle(ct);
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| 221 | }
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| 222 |
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| 223 | static int fl_wpage(struct flash_chip *c, uint32_t dst, const void *src,
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| 224 | uint32_t size)
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| 225 | {
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| 226 | struct spi_flash_ctrl *ct = c->ctrl;
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| 227 | int rc;
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| 228 |
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| 229 | if (size < 1 || size > 0x100)
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| 230 | return FLASH_ERR_BAD_PAGE_SIZE;
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| 231 |
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| 232 | rc = fl_wren(ct);
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| 233 | if (rc) return rc;
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| 234 |
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| 235 | rc = ct->cmd_wr(ct, CMD_PP, true, dst, src, size);
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| 236 | if (rc)
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| 237 | return rc;
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| 238 |
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| 239 | /* Wait for write complete */
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| 240 | return fl_sync_wait_idle(ct);
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| 241 | }
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| 242 |
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| 243 | int flash_write(struct flash_chip *c, uint32_t dst, const void *src,
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| 244 | uint32_t size, bool verify)
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| 245 | {
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| 246 | struct spi_flash_ctrl *ct = c->ctrl;
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| 247 | uint32_t todo = size;
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| 248 | uint32_t d = dst;
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| 249 | const void *s = src;
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| 250 | uint8_t vbuf[0x100];
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| 251 | int rc;
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| 252 |
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| 253 | /* Some sanity checking */
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| 254 | if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
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| 255 | return FLASH_ERR_PARM_ERROR;
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| 256 |
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| 257 | FL_DBG("LIBFLASH: Writing to 0x%08x..0%08x...\n", dst, dst + size);
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| 258 |
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| 259 | /*
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| 260 | * If the controller supports write and either we are in 3b mode
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| 261 | * or we are in 4b *and* the controller supports it, then do a
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| 262 | * high level write.
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| 263 | */
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| 264 | if ((!c->mode_4b || ct->set_4b) && ct->write) {
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| 265 | rc = ct->write(ct, dst, src, size);
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| 266 | if (rc)
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| 267 | return rc;
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| 268 | goto writing_done;
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| 269 | }
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| 270 |
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| 271 | /* Otherwise, go manual if supported */
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| 272 | if (!ct->cmd_wr)
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| 273 | return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
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| 274 |
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| 275 | /* Iterate for each page to write */
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| 276 | while(todo) {
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| 277 | uint32_t chunk;
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| 278 |
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| 279 | /* Handle misaligned start */
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| 280 | chunk = 0x100 - (d & 0xff);
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| 281 | if (chunk > 0x100)
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| 282 | chunk = 0x100;
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| 283 | if (chunk > todo)
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| 284 | chunk = todo;
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| 285 |
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| 286 | rc = fl_wpage(c, d, s, chunk);
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| 287 | if (rc) return rc;
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| 288 | d += chunk;
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| 289 | s += chunk;
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| 290 | todo -= chunk;
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| 291 | }
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| 292 |
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| 293 | writing_done:
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| 294 | if (!verify)
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| 295 | return 0;
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| 296 |
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| 297 | /* Verify */
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| 298 | FL_DBG("LIBFLASH: Verifying...\n");
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| 299 |
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| 300 | while(size) {
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| 301 | uint32_t chunk;
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| 302 |
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| 303 | chunk = sizeof(vbuf);
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| 304 | if (chunk > size)
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| 305 | chunk = size;
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| 306 | rc = flash_read(c, dst, vbuf, chunk);
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| 307 | if (rc) return rc;
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| 308 | if (memcmp(vbuf, src, chunk)) {
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| 309 | FL_ERR("LIBFLASH: Miscompare at 0x%08x\n", dst);
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| 310 | return FLASH_ERR_VERIFY_FAILURE;
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| 311 | }
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| 312 | dst += chunk;
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| 313 | src += chunk;
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| 314 | size -= chunk;
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| 315 | }
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| 316 | return 0;
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| 317 | }
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| 318 |
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| 319 | enum sm_comp_res {
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| 320 | sm_no_change,
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| 321 | sm_need_write,
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| 322 | sm_need_erase,
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| 323 | };
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| 324 |
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| 325 | static enum sm_comp_res flash_smart_comp(struct flash_chip *c,
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| 326 | const void *src,
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| 327 | uint32_t offset, uint32_t size)
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| 328 | {
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| 329 | uint8_t *b = c->smart_buf + offset;
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| 330 | const uint8_t *s = src;
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| 331 | bool is_same = true;
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| 332 | uint32_t i;
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| 333 |
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| 334 | /* SRC DEST NEED_ERASE
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| 335 | * 0 1 0
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| 336 | * 1 1 0
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| 337 | * 0 0 0
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| 338 | * 1 0 1
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| 339 | */
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| 340 | for (i = 0; i < size; i++) {
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| 341 | /* Any bit need to be set, need erase */
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| 342 | if (s[i] & ~b[i])
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| 343 | return sm_need_erase;
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| 344 | if (is_same && (b[i] != s[i]))
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| 345 | is_same = false;
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| 346 | }
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| 347 | return is_same ? sm_no_change : sm_need_write;
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| 348 | }
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| 349 |
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| 350 | int flash_smart_write(struct flash_chip *c, uint32_t dst, const void *src,
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| 351 | uint32_t size)
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| 352 | {
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| 353 | uint32_t er_size = c->min_erase_mask + 1;
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| 354 | uint32_t end = dst + size;
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| 355 | int rc;
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| 356 |
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| 357 | /* Some sanity checking */
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| 358 | if (end <= dst || !size || end > c->tsize) {
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| 359 | FL_DBG("LIBFLASH: Smart write param error\n");
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| 360 | return FLASH_ERR_PARM_ERROR;
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| 361 | }
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| 362 |
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| 363 | FL_DBG("LIBFLASH: Smart writing to 0x%08x..0%08x...\n",
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| 364 | dst, dst + size);
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| 365 |
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| 366 | /* As long as we have something to write ... */
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| 367 | while(dst < end) {
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| 368 | uint32_t page, off, chunk;
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| 369 | enum sm_comp_res sr;
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| 370 |
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| 371 | /* Figure out which erase page we are in and read it */
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| 372 | page = dst & ~c->min_erase_mask;
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| 373 | off = dst & c->min_erase_mask;
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| 374 | FL_DBG("LIBFLASH: reading page 0x%08x..0x%08x...",
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| 375 | page, page + er_size);
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| 376 | rc = flash_read(c, page, c->smart_buf, er_size);
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| 377 | if (rc) {
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| 378 | FL_DBG(" error %d!\n", rc);
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| 379 | return rc;
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| 380 | }
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| 381 |
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| 382 | /* Locate the chunk of data we are working on */
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| 383 | chunk = er_size - off;
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| 384 | if (size < chunk)
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| 385 | chunk = size;
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| 386 |
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| 387 | /* Compare against what we are writing and ff */
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| 388 | sr = flash_smart_comp(c, src, off, chunk);
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| 389 | switch(sr) {
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| 390 | case sm_no_change:
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| 391 | /* Identical, skip it */
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| 392 | FL_DBG(" same !\n");
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| 393 | break;
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| 394 | case sm_need_write:
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| 395 | /* Just needs writing over */
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| 396 | FL_DBG(" need write !\n");
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| 397 | rc = flash_write(c, dst, src, chunk, true);
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| 398 | if (rc) {
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| 399 | FL_DBG("LIBFLASH: Write error %d !\n", rc);
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| 400 | return rc;
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| 401 | }
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| 402 | break;
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| 403 | case sm_need_erase:
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| 404 | FL_DBG(" need erase !\n");
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| 405 | rc = flash_erase(c, page, er_size);
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| 406 | if (rc) {
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| 407 | FL_DBG("LIBFLASH: erase error %d !\n", rc);
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| 408 | return rc;
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| 409 | }
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| 410 | /* Then update the portion of the buffer and write the block */
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| 411 | memcpy(c->smart_buf + off, src, chunk);
|
| 412 | rc = flash_write(c, page, c->smart_buf, er_size, true);
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| 413 | if (rc) {
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| 414 | FL_DBG("LIBFLASH: write error %d !\n", rc);
|
| 415 | return rc;
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| 416 | }
|
| 417 | break;
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| 418 | }
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| 419 | dst += chunk;
|
| 420 | src += chunk;
|
| 421 | size -= chunk;
|
| 422 | }
|
| 423 | return 0;
|
| 424 | }
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| 425 |
|
| 426 | static int fl_chip_id(struct spi_flash_ctrl *ct, uint8_t *id_buf,
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| 427 | uint32_t *id_size)
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| 428 | {
|
| 429 | int rc;
|
| 430 | uint8_t stat;
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| 431 |
|
| 432 | /* Check initial status */
|
| 433 | rc = fl_read_stat(ct, &stat);
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| 434 | if (rc)
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| 435 | return rc;
|
| 436 |
|
| 437 | /* If stuck writing, wait for idle */
|
| 438 | if (stat & STAT_WIP) {
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| 439 | FL_ERR("LIBFLASH: Flash in writing state ! Waiting...\n");
|
| 440 | rc = fl_sync_wait_idle(ct);
|
| 441 | if (rc)
|
| 442 | return rc;
|
| 443 | } else
|
| 444 | FL_DBG("LIBFLASH: Init status: %02x\n", stat);
|
| 445 |
|
| 446 | /* Fallback to get ID manually */
|
| 447 | rc = ct->cmd_rd(ct, CMD_RDID, false, 0, id_buf, 3);
|
| 448 | if (rc)
|
| 449 | return rc;
|
| 450 | *id_size = 3;
|
| 451 |
|
| 452 | return 0;
|
| 453 | }
|
| 454 |
|
| 455 | static int flash_identify(struct flash_chip *c)
|
| 456 | {
|
| 457 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 458 | const struct flash_info *info;
|
| 459 | uint32_t iid, id_size;
|
| 460 | #define MAX_ID_SIZE 16
|
| 461 | uint8_t id[MAX_ID_SIZE];
|
| 462 | int rc, i;
|
| 463 |
|
| 464 | if (ct->chip_id) {
|
| 465 | /* High level controller interface */
|
| 466 | id_size = MAX_ID_SIZE;
|
| 467 | rc = ct->chip_id(ct, id, &id_size);
|
| 468 | } else
|
| 469 | rc = fl_chip_id(ct, id, &id_size);
|
| 470 | if (rc)
|
| 471 | return rc;
|
| 472 | if (id_size < 3)
|
| 473 | return FLASH_ERR_CHIP_UNKNOWN;
|
| 474 |
|
| 475 | /* Convert to a dword for lookup */
|
| 476 | iid = id[0];
|
| 477 | iid = (iid << 8) | id[1];
|
| 478 | iid = (iid << 8) | id[2];
|
| 479 |
|
| 480 | FL_DBG("LIBFLASH: Flash ID: %02x.%02x.%02x (%06x)\n",
|
| 481 | id[0], id[1], id[2], iid);
|
| 482 |
|
| 483 | /* Lookup in flash_info */
|
| 484 | for (i = 0; i < ARRAY_SIZE(flash_info); i++) {
|
| 485 | info = &flash_info[i];
|
| 486 | if (info->id == iid)
|
| 487 | break;
|
| 488 | }
|
| 489 | if (info->id != iid)
|
| 490 | return FLASH_ERR_CHIP_UNKNOWN;
|
| 491 |
|
| 492 | c->info = *info;
|
| 493 | c->tsize = info->size;
|
| 494 | ct->finfo = &c->info;
|
| 495 |
|
| 496 | /*
|
| 497 | * Let controller know about our settings and possibly
|
| 498 | * override them
|
| 499 | */
|
| 500 | if (ct->setup) {
|
| 501 | rc = ct->setup(ct, &c->tsize);
|
| 502 | if (rc)
|
| 503 | return rc;
|
| 504 | }
|
| 505 |
|
| 506 | /* Calculate min erase granularity */
|
| 507 | if (c->info.flags & FL_ERASE_4K)
|
| 508 | c->min_erase_mask = 0xfff;
|
| 509 | else if (c->info.flags & FL_ERASE_32K)
|
| 510 | c->min_erase_mask = 0x7fff;
|
| 511 | else if (c->info.flags & FL_ERASE_64K)
|
| 512 | c->min_erase_mask = 0xffff;
|
| 513 | else {
|
| 514 | /* No erase size ? oops ... */
|
| 515 | FL_ERR("LIBFLASH: No erase sizes !\n");
|
| 516 | return FLASH_ERR_CTRL_CONFIG_MISMATCH;
|
| 517 | }
|
| 518 |
|
| 519 | FL_DBG("LIBFLASH: Found chip %s size %dM erase granule: %dK\n",
|
| 520 | c->info.name, c->tsize >> 20, (c->min_erase_mask + 1) >> 10);
|
| 521 |
|
| 522 | return 0;
|
| 523 | }
|
| 524 |
|
| 525 | static int flash_set_4b(struct flash_chip *c, bool enable)
|
| 526 | {
|
| 527 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 528 | int rc;
|
| 529 |
|
| 530 | /* Some flash chips want this */
|
| 531 | rc = fl_wren(ct);
|
| 532 | if (rc) {
|
| 533 | FL_ERR("LIBFLASH: Error %d enabling write for set_4b\n", rc);
|
| 534 | /* Ignore the error & move on (could be wrprotect chip) */
|
| 535 | }
|
| 536 |
|
| 537 | /* Ignore error in case chip is write protected */
|
| 538 |
|
| 539 | return ct->cmd_wr(ct, enable ? CMD_EN4B : CMD_EX4B, false, 0, NULL, 0);
|
| 540 | }
|
| 541 |
|
| 542 | int flash_force_4b_mode(struct flash_chip *c, bool enable_4b)
|
| 543 | {
|
| 544 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 545 | int rc;
|
| 546 |
|
| 547 | /*
|
| 548 | * We only allow force 4b if both controller and flash do 4b
|
| 549 | * as this is mainly used if a 3rd party tries to directly
|
| 550 | * access a direct mapped read region
|
| 551 | */
|
| 552 | if (enable_4b && !((c->info.flags & FL_CAN_4B) && ct->set_4b))
|
| 553 | return FLASH_ERR_4B_NOT_SUPPORTED;
|
| 554 |
|
| 555 | /* Only send to flash directly on controllers that implement
|
| 556 | * the low level callbacks
|
| 557 | */
|
| 558 | if (ct->cmd_wr) {
|
| 559 | rc = flash_set_4b(c, enable_4b);
|
| 560 | if (rc)
|
| 561 | return rc;
|
| 562 | }
|
| 563 |
|
| 564 | /* Then inform the controller */
|
| 565 | if (ct->set_4b)
|
| 566 | rc = ct->set_4b(ct, enable_4b);
|
| 567 | return rc;
|
| 568 | }
|
| 569 |
|
| 570 | static int flash_configure(struct flash_chip *c)
|
| 571 | {
|
| 572 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 573 | int rc;
|
| 574 |
|
| 575 | /* Crop flash size if necessary */
|
| 576 | if (c->tsize > 0x01000000 && !(c->info.flags & FL_CAN_4B)) {
|
| 577 | FL_ERR("LIBFLASH: Flash chip cropped to 16M, no 4b mode\n");
|
| 578 | c->tsize = 0x01000000;
|
| 579 | }
|
| 580 |
|
| 581 | /* If flash chip > 16M, enable 4b mode */
|
| 582 | if (c->tsize > 0x01000000) {
|
| 583 | FL_DBG("LIBFLASH: Flash >16MB, enabling 4B mode...\n");
|
| 584 |
|
| 585 | /* Set flash to 4b mode if we can */
|
| 586 | if (ct->cmd_wr) {
|
| 587 | rc = flash_set_4b(c, true);
|
| 588 | if (rc) {
|
| 589 | FL_ERR("LIBFLASH: Failed to set flash 4b mode\n");
|
| 590 | return rc;
|
| 591 | }
|
| 592 | }
|
| 593 |
|
| 594 |
|
| 595 | /* Set controller to 4b mode if supported */
|
| 596 | if (ct->set_4b) {
|
| 597 | FL_DBG("LIBFLASH: Enabling controller 4B mode...\n");
|
| 598 | rc = ct->set_4b(ct, true);
|
| 599 | if (rc) {
|
| 600 | FL_ERR("LIBFLASH: Failed"
|
| 601 | " to set controller 4b mode\n");
|
| 602 | return rc;
|
| 603 | }
|
| 604 | }
|
| 605 | } else {
|
| 606 | FL_DBG("LIBFLASH: Flash <=16MB, disabling 4B mode...\n");
|
| 607 |
|
| 608 | /*
|
| 609 | * If flash chip supports 4b mode, make sure we disable
|
| 610 | * it in case it was left over by the previous user
|
| 611 | */
|
| 612 | if (c->info.flags & FL_CAN_4B) {
|
| 613 | rc = flash_set_4b(c, false);
|
| 614 | if (rc) {
|
| 615 | FL_ERR("LIBFLASH: Failed to"
|
| 616 | " clear flash 4b mode\n");
|
| 617 | return rc;
|
| 618 | }
|
| 619 | }
|
| 620 |
|
| 621 | /* Set controller to 3b mode if mode switch is supported */
|
| 622 | if (ct->set_4b) {
|
| 623 | FL_DBG("LIBFLASH: Disabling controller 4B mode...\n");
|
| 624 | rc = ct->set_4b(ct, false);
|
| 625 | if (rc) {
|
| 626 | FL_ERR("LIBFLASH: Failed to"
|
| 627 | " clear controller 4b mode\n");
|
| 628 | return rc;
|
| 629 | }
|
| 630 | }
|
| 631 | }
|
| 632 | return 0;
|
| 633 | }
|
| 634 |
|
| 635 | int flash_get_info(struct flash_chip *chip, const char **name,
|
| 636 | uint32_t *total_size, uint32_t *erase_granule)
|
| 637 | {
|
| 638 | if (name)
|
| 639 | *name = chip->info.name;
|
| 640 | if (total_size)
|
| 641 | *total_size = chip->tsize;
|
| 642 | if (erase_granule)
|
| 643 | *erase_granule = chip->min_erase_mask + 1;
|
| 644 | return 0;
|
| 645 | }
|
| 646 |
|
| 647 | int flash_init(struct spi_flash_ctrl *ctrl, struct flash_chip **flash)
|
| 648 | {
|
| 649 | struct flash_chip *c;
|
| 650 | int rc;
|
| 651 |
|
| 652 | *flash = NULL;
|
| 653 | c = malloc(sizeof(struct flash_chip));
|
| 654 | if (!c)
|
| 655 | return FLASH_ERR_MALLOC_FAILED;
|
| 656 | memset(c, 0, sizeof(*c));
|
| 657 | c->ctrl = ctrl;
|
| 658 |
|
| 659 | rc = flash_identify(c);
|
| 660 | if (rc) {
|
| 661 | FL_ERR("LIBFLASH: Flash identification failed\n");
|
| 662 | goto bail;
|
| 663 | }
|
| 664 | c->smart_buf = malloc(c->min_erase_mask + 1);
|
| 665 | if (!c->smart_buf) {
|
| 666 | FL_ERR("LIBFLASH: Failed to allocate smart buffer !\n");
|
| 667 | rc = FLASH_ERR_MALLOC_FAILED;
|
| 668 | goto bail;
|
| 669 | }
|
| 670 | rc = flash_configure(c);
|
| 671 | if (rc)
|
| 672 | FL_ERR("LIBFLASH: Flash configuration failed\n");
|
| 673 | bail:
|
| 674 | if (rc) {
|
| 675 | free(c);
|
| 676 | return rc;
|
| 677 | }
|
| 678 | *flash = c;
|
| 679 | return 0;
|
| 680 | }
|
| 681 |
|
| 682 | void flash_exit(struct flash_chip *chip)
|
| 683 | {
|
| 684 | /* XXX Make sure we are idle etc... */
|
| 685 | free(chip);
|
| 686 | }
|
| 687 |
|