Norman James | 6a58a27 | 2015-10-07 14:34:16 -0500 | [diff] [blame] | 1 | #include <stdlib.h>
|
| 2 | #include <stdio.h>
|
| 3 | #include <string.h>
|
| 4 |
|
| 5 | #include "libflash.h"
|
| 6 | #include "libflash-priv.h"
|
| 7 |
|
| 8 | static const struct flash_info flash_info[] = {
|
| 9 | { 0xc22019, 0x02000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL25635F"},
|
| 10 | { 0xc2201a, 0x04000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL51235F"},
|
| 11 | { 0xef4018, 0x01000000, FL_ERASE_ALL, "Winbond W25Q128BV" },
|
| 12 | { 0x20ba20, 0x04000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
|
| 13 | FL_ERASE_BULK | FL_MICRON_BUGS,
|
| 14 | "Micron N25Qx512Ax" },
|
Norman James | fb06df7 | 2015-12-18 14:58:50 -0600 | [diff] [blame] | 15 | { 0x20ba19, 0x02000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
|
| 16 | FL_ERASE_BULK | FL_MICRON_BUGS,
|
| 17 | "Micron N25Q256Ax" },
|
| 18 | { 0x1940ef, 0x02000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
|
| 19 | FL_ERASE_BULK | FL_MICRON_BUGS,
|
| 20 | "Micron N25Qx256Ax" },
|
Norman James | 6a58a27 | 2015-10-07 14:34:16 -0500 | [diff] [blame] | 21 | { 0x55aa55, 0x00100000, FL_ERASE_ALL | FL_CAN_4B, "TEST_FLASH" },
|
Norman James | 6621b94 | 2015-11-11 07:39:23 -0600 | [diff] [blame] | 22 |
|
Norman James | 6a58a27 | 2015-10-07 14:34:16 -0500 | [diff] [blame] | 23 | };
|
| 24 |
|
| 25 | struct flash_chip {
|
| 26 | struct spi_flash_ctrl *ctrl; /* Controller */
|
| 27 | struct flash_info info; /* Flash info */
|
| 28 | uint32_t tsize; /* Corrected flash size */
|
| 29 | uint32_t min_erase_mask; /* Minimum erase size */
|
| 30 | bool mode_4b; /* Flash currently in 4b mode */
|
| 31 | struct flash_req *cur_req; /* Current request */
|
| 32 | void *smart_buf; /* Buffer for smart writes */
|
| 33 | };
|
| 34 |
|
| 35 | bool libflash_debug;
|
| 36 |
|
| 37 | int fl_read_stat(struct spi_flash_ctrl *ct, uint8_t *stat)
|
| 38 | {
|
| 39 | return ct->cmd_rd(ct, CMD_RDSR, false, 0, stat, 1);
|
| 40 | }
|
| 41 |
|
| 42 | static void fl_micron_status(struct spi_flash_ctrl *ct)
|
| 43 | {
|
| 44 | uint8_t flst;
|
| 45 |
|
| 46 | /*
|
| 47 | * After a success status on a write or erase, we
|
| 48 | * need to do that command or some chip variants will
|
| 49 | * lock
|
| 50 | */
|
| 51 | ct->cmd_rd(ct, CMD_MIC_RDFLST, false, 0, &flst, 1);
|
| 52 | }
|
| 53 |
|
| 54 | /* Synchronous write completion, probably need a yield hook */
|
| 55 | int fl_sync_wait_idle(struct spi_flash_ctrl *ct)
|
| 56 | {
|
| 57 | uint8_t stat;
|
| 58 | int rc;
|
| 59 |
|
| 60 | /* XXX Add timeout */
|
| 61 | for (;;) {
|
| 62 | rc = fl_read_stat(ct, &stat);
|
| 63 | if (rc) return rc;
|
| 64 | if (!(stat & STAT_WIP)) {
|
| 65 | if (ct->finfo->flags & FL_MICRON_BUGS)
|
| 66 | fl_micron_status(ct);
|
| 67 | return 0;
|
| 68 | }
|
| 69 | }
|
| 70 | /* return FLASH_ERR_WIP_TIMEOUT; */
|
| 71 | }
|
| 72 |
|
| 73 | /* Exported for internal use */
|
| 74 | int fl_wren(struct spi_flash_ctrl *ct)
|
| 75 | {
|
| 76 | int i, rc;
|
| 77 | uint8_t stat;
|
| 78 |
|
| 79 | /* Some flashes need it to be hammered */
|
| 80 | for (i = 0; i < 1000; i++) {
|
| 81 | rc = ct->cmd_wr(ct, CMD_WREN, false, 0, NULL, 0);
|
| 82 | if (rc) return rc;
|
| 83 | rc = fl_read_stat(ct, &stat);
|
| 84 | if (rc) return rc;
|
| 85 | if (stat & STAT_WIP) {
|
| 86 | FL_ERR("LIBFLASH: WREN has WIP status set !\n");
|
| 87 | rc = fl_sync_wait_idle(ct);
|
| 88 | if (rc)
|
| 89 | return rc;
|
| 90 | continue;
|
| 91 | }
|
| 92 | if (stat & STAT_WEN)
|
| 93 | return 0;
|
| 94 | }
|
| 95 | return FLASH_ERR_WREN_TIMEOUT;
|
| 96 | }
|
| 97 |
|
| 98 | int flash_read(struct flash_chip *c, uint32_t pos, void *buf, uint32_t len)
|
| 99 | {
|
| 100 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 101 |
|
| 102 | /* XXX Add sanity/bound checking */
|
| 103 |
|
| 104 | /*
|
| 105 | * If the controller supports read and either we are in 3b mode
|
| 106 | * or we are in 4b *and* the controller supports it, then do a
|
| 107 | * high level read.
|
| 108 | */
|
| 109 | if ((!c->mode_4b || ct->set_4b) && ct->read)
|
| 110 | return ct->read(ct, pos, buf, len);
|
| 111 |
|
| 112 | /* Otherwise, go manual if supported */
|
| 113 | if (!ct->cmd_rd)
|
| 114 | return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
|
| 115 | return ct->cmd_rd(ct, CMD_READ, true, pos, buf, len);
|
| 116 | }
|
| 117 |
|
| 118 | static void fl_get_best_erase(struct flash_chip *c, uint32_t dst, uint32_t size,
|
| 119 | uint32_t *chunk, uint8_t *cmd)
|
| 120 | {
|
| 121 | /* Smaller than 32k, use 4k */
|
| 122 | if ((dst & 0x7fff) || (size < 0x8000)) {
|
| 123 | *chunk = 0x1000;
|
| 124 | *cmd = CMD_SE;
|
| 125 | return;
|
| 126 | }
|
| 127 | /* Smaller than 64k and 32k is supported, use it */
|
| 128 | if ((c->info.flags & FL_ERASE_32K) &&
|
| 129 | ((dst & 0xffff) || (size < 0x10000))) {
|
| 130 | *chunk = 0x8000;
|
| 131 | *cmd = CMD_BE32K;
|
| 132 | return;
|
| 133 | }
|
| 134 | /* If 64K is not supported, use whatever smaller size is */
|
| 135 | if (!(c->info.flags & FL_ERASE_64K)) {
|
| 136 | if (c->info.flags & FL_ERASE_32K) {
|
| 137 | *chunk = 0x8000;
|
| 138 | *cmd = CMD_BE32K;
|
| 139 | } else {
|
| 140 | *chunk = 0x1000;
|
| 141 | *cmd = CMD_SE;
|
| 142 | }
|
| 143 | return;
|
| 144 | }
|
| 145 | /* Allright, let's go for 64K */
|
| 146 | *chunk = 0x10000;
|
| 147 | *cmd = CMD_BE;
|
| 148 | }
|
| 149 |
|
| 150 | int flash_erase(struct flash_chip *c, uint32_t dst, uint32_t size)
|
| 151 | {
|
| 152 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 153 | uint32_t chunk;
|
| 154 | uint8_t cmd;
|
| 155 | int rc;
|
| 156 |
|
| 157 | /* Some sanity checking */
|
| 158 | if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
|
| 159 | return FLASH_ERR_PARM_ERROR;
|
| 160 |
|
| 161 | /* Check boundaries fit erase blocks */
|
| 162 | if ((dst | size) & c->min_erase_mask)
|
| 163 | return FLASH_ERR_ERASE_BOUNDARY;
|
| 164 |
|
| 165 | FL_DBG("LIBFLASH: Erasing 0x%08x..0%08x...\n", dst, dst + size);
|
| 166 |
|
| 167 | /* Use controller erase if supported */
|
| 168 | if (ct->erase)
|
| 169 | return ct->erase(ct, dst, size);
|
| 170 |
|
| 171 | /* Allright, loop as long as there's something to erase */
|
| 172 | while(size) {
|
| 173 | /* How big can we make it based on alignent & size */
|
| 174 | fl_get_best_erase(c, dst, size, &chunk, &cmd);
|
| 175 |
|
| 176 | /* Poke write enable */
|
| 177 | rc = fl_wren(ct);
|
| 178 | if (rc)
|
| 179 | return rc;
|
| 180 |
|
| 181 | /* Send erase command */
|
| 182 | rc = ct->cmd_wr(ct, cmd, true, dst, NULL, 0);
|
| 183 | if (rc)
|
| 184 | return rc;
|
| 185 |
|
| 186 | /* Wait for write complete */
|
| 187 | rc = fl_sync_wait_idle(ct);
|
| 188 | if (rc)
|
| 189 | return rc;
|
| 190 |
|
| 191 | size -= chunk;
|
| 192 | dst += chunk;
|
| 193 | }
|
| 194 | return 0;
|
| 195 | }
|
| 196 |
|
| 197 | int flash_erase_chip(struct flash_chip *c)
|
| 198 | {
|
| 199 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 200 | int rc;
|
| 201 |
|
| 202 | /* XXX TODO: Fallback to using normal erases */
|
| 203 | if (!(c->info.flags & (FL_ERASE_CHIP|FL_ERASE_BULK)))
|
| 204 | return FLASH_ERR_CHIP_ER_NOT_SUPPORTED;
|
| 205 |
|
| 206 | FL_DBG("LIBFLASH: Erasing chip...\n");
|
| 207 |
|
| 208 | /* Use controller erase if supported */
|
| 209 | if (ct->erase)
|
| 210 | return ct->erase(ct, 0, 0xffffffff);
|
| 211 |
|
| 212 | rc = fl_wren(ct);
|
| 213 | if (rc) return rc;
|
| 214 |
|
| 215 | if (c->info.flags & FL_ERASE_CHIP)
|
| 216 | rc = ct->cmd_wr(ct, CMD_CE, false, 0, NULL, 0);
|
| 217 | else
|
| 218 | rc = ct->cmd_wr(ct, CMD_MIC_BULK_ERASE, false, 0, NULL, 0);
|
| 219 | if (rc)
|
| 220 | return rc;
|
| 221 |
|
| 222 | /* Wait for write complete */
|
| 223 | return fl_sync_wait_idle(ct);
|
| 224 | }
|
| 225 |
|
| 226 | static int fl_wpage(struct flash_chip *c, uint32_t dst, const void *src,
|
| 227 | uint32_t size)
|
| 228 | {
|
| 229 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 230 | int rc;
|
| 231 |
|
| 232 | if (size < 1 || size > 0x100)
|
| 233 | return FLASH_ERR_BAD_PAGE_SIZE;
|
| 234 |
|
| 235 | rc = fl_wren(ct);
|
| 236 | if (rc) return rc;
|
| 237 |
|
| 238 | rc = ct->cmd_wr(ct, CMD_PP, true, dst, src, size);
|
| 239 | if (rc)
|
| 240 | return rc;
|
| 241 |
|
| 242 | /* Wait for write complete */
|
| 243 | return fl_sync_wait_idle(ct);
|
| 244 | }
|
| 245 |
|
| 246 | int flash_write(struct flash_chip *c, uint32_t dst, const void *src,
|
| 247 | uint32_t size, bool verify)
|
| 248 | {
|
| 249 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 250 | uint32_t todo = size;
|
| 251 | uint32_t d = dst;
|
| 252 | const void *s = src;
|
| 253 | uint8_t vbuf[0x100];
|
| 254 | int rc;
|
| 255 |
|
| 256 | /* Some sanity checking */
|
| 257 | if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
|
| 258 | return FLASH_ERR_PARM_ERROR;
|
| 259 |
|
| 260 | FL_DBG("LIBFLASH: Writing to 0x%08x..0%08x...\n", dst, dst + size);
|
| 261 |
|
| 262 | /*
|
| 263 | * If the controller supports write and either we are in 3b mode
|
| 264 | * or we are in 4b *and* the controller supports it, then do a
|
| 265 | * high level write.
|
| 266 | */
|
| 267 | if ((!c->mode_4b || ct->set_4b) && ct->write) {
|
| 268 | rc = ct->write(ct, dst, src, size);
|
| 269 | if (rc)
|
| 270 | return rc;
|
| 271 | goto writing_done;
|
| 272 | }
|
| 273 |
|
| 274 | /* Otherwise, go manual if supported */
|
| 275 | if (!ct->cmd_wr)
|
| 276 | return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
|
| 277 |
|
| 278 | /* Iterate for each page to write */
|
| 279 | while(todo) {
|
| 280 | uint32_t chunk;
|
| 281 |
|
| 282 | /* Handle misaligned start */
|
| 283 | chunk = 0x100 - (d & 0xff);
|
| 284 | if (chunk > 0x100)
|
| 285 | chunk = 0x100;
|
| 286 | if (chunk > todo)
|
| 287 | chunk = todo;
|
| 288 |
|
| 289 | rc = fl_wpage(c, d, s, chunk);
|
| 290 | if (rc) return rc;
|
| 291 | d += chunk;
|
| 292 | s += chunk;
|
| 293 | todo -= chunk;
|
| 294 | }
|
| 295 |
|
| 296 | writing_done:
|
| 297 | if (!verify)
|
| 298 | return 0;
|
| 299 |
|
| 300 | /* Verify */
|
| 301 | FL_DBG("LIBFLASH: Verifying...\n");
|
| 302 |
|
| 303 | while(size) {
|
| 304 | uint32_t chunk;
|
| 305 |
|
| 306 | chunk = sizeof(vbuf);
|
| 307 | if (chunk > size)
|
| 308 | chunk = size;
|
| 309 | rc = flash_read(c, dst, vbuf, chunk);
|
| 310 | if (rc) return rc;
|
| 311 | if (memcmp(vbuf, src, chunk)) {
|
| 312 | FL_ERR("LIBFLASH: Miscompare at 0x%08x\n", dst);
|
| 313 | return FLASH_ERR_VERIFY_FAILURE;
|
| 314 | }
|
| 315 | dst += chunk;
|
| 316 | src += chunk;
|
| 317 | size -= chunk;
|
| 318 | }
|
| 319 | return 0;
|
| 320 | }
|
| 321 |
|
| 322 | enum sm_comp_res {
|
| 323 | sm_no_change,
|
| 324 | sm_need_write,
|
| 325 | sm_need_erase,
|
| 326 | };
|
| 327 |
|
| 328 | static enum sm_comp_res flash_smart_comp(struct flash_chip *c,
|
| 329 | const void *src,
|
| 330 | uint32_t offset, uint32_t size)
|
| 331 | {
|
| 332 | uint8_t *b = c->smart_buf + offset;
|
| 333 | const uint8_t *s = src;
|
| 334 | bool is_same = true;
|
| 335 | uint32_t i;
|
| 336 |
|
| 337 | /* SRC DEST NEED_ERASE
|
| 338 | * 0 1 0
|
| 339 | * 1 1 0
|
| 340 | * 0 0 0
|
| 341 | * 1 0 1
|
| 342 | */
|
| 343 | for (i = 0; i < size; i++) {
|
| 344 | /* Any bit need to be set, need erase */
|
| 345 | if (s[i] & ~b[i])
|
| 346 | return sm_need_erase;
|
| 347 | if (is_same && (b[i] != s[i]))
|
| 348 | is_same = false;
|
| 349 | }
|
| 350 | return is_same ? sm_no_change : sm_need_write;
|
| 351 | }
|
| 352 |
|
| 353 | int flash_smart_write(struct flash_chip *c, uint32_t dst, const void *src,
|
| 354 | uint32_t size)
|
| 355 | {
|
| 356 | uint32_t er_size = c->min_erase_mask + 1;
|
| 357 | uint32_t end = dst + size;
|
| 358 | int rc;
|
| 359 |
|
| 360 | /* Some sanity checking */
|
| 361 | if (end <= dst || !size || end > c->tsize) {
|
| 362 | FL_DBG("LIBFLASH: Smart write param error\n");
|
| 363 | return FLASH_ERR_PARM_ERROR;
|
| 364 | }
|
| 365 |
|
| 366 | FL_DBG("LIBFLASH: Smart writing to 0x%08x..0%08x...\n",
|
| 367 | dst, dst + size);
|
| 368 |
|
| 369 | /* As long as we have something to write ... */
|
| 370 | while(dst < end) {
|
| 371 | uint32_t page, off, chunk;
|
| 372 | enum sm_comp_res sr;
|
| 373 |
|
| 374 | /* Figure out which erase page we are in and read it */
|
| 375 | page = dst & ~c->min_erase_mask;
|
| 376 | off = dst & c->min_erase_mask;
|
| 377 | FL_DBG("LIBFLASH: reading page 0x%08x..0x%08x...",
|
| 378 | page, page + er_size);
|
| 379 | rc = flash_read(c, page, c->smart_buf, er_size);
|
| 380 | if (rc) {
|
| 381 | FL_DBG(" error %d!\n", rc);
|
| 382 | return rc;
|
| 383 | }
|
| 384 |
|
| 385 | /* Locate the chunk of data we are working on */
|
| 386 | chunk = er_size - off;
|
| 387 | if (size < chunk)
|
| 388 | chunk = size;
|
| 389 |
|
| 390 | /* Compare against what we are writing and ff */
|
| 391 | sr = flash_smart_comp(c, src, off, chunk);
|
| 392 | switch(sr) {
|
| 393 | case sm_no_change:
|
| 394 | /* Identical, skip it */
|
| 395 | FL_DBG(" same !\n");
|
| 396 | break;
|
| 397 | case sm_need_write:
|
| 398 | /* Just needs writing over */
|
| 399 | FL_DBG(" need write !\n");
|
| 400 | rc = flash_write(c, dst, src, chunk, true);
|
| 401 | if (rc) {
|
| 402 | FL_DBG("LIBFLASH: Write error %d !\n", rc);
|
| 403 | return rc;
|
| 404 | }
|
| 405 | break;
|
| 406 | case sm_need_erase:
|
| 407 | FL_DBG(" need erase !\n");
|
| 408 | rc = flash_erase(c, page, er_size);
|
| 409 | if (rc) {
|
| 410 | FL_DBG("LIBFLASH: erase error %d !\n", rc);
|
| 411 | return rc;
|
| 412 | }
|
| 413 | /* Then update the portion of the buffer and write the block */
|
| 414 | memcpy(c->smart_buf + off, src, chunk);
|
| 415 | rc = flash_write(c, page, c->smart_buf, er_size, true);
|
| 416 | if (rc) {
|
| 417 | FL_DBG("LIBFLASH: write error %d !\n", rc);
|
| 418 | return rc;
|
| 419 | }
|
| 420 | break;
|
| 421 | }
|
| 422 | dst += chunk;
|
| 423 | src += chunk;
|
| 424 | size -= chunk;
|
| 425 | }
|
| 426 | return 0;
|
| 427 | }
|
| 428 |
|
| 429 | static int fl_chip_id(struct spi_flash_ctrl *ct, uint8_t *id_buf,
|
| 430 | uint32_t *id_size)
|
| 431 | {
|
| 432 | int rc;
|
| 433 | uint8_t stat;
|
| 434 |
|
| 435 | /* Check initial status */
|
| 436 | rc = fl_read_stat(ct, &stat);
|
| 437 | if (rc)
|
| 438 | return rc;
|
| 439 |
|
| 440 | /* If stuck writing, wait for idle */
|
| 441 | if (stat & STAT_WIP) {
|
| 442 | FL_ERR("LIBFLASH: Flash in writing state ! Waiting...\n");
|
| 443 | rc = fl_sync_wait_idle(ct);
|
| 444 | if (rc)
|
| 445 | return rc;
|
| 446 | } else
|
| 447 | FL_DBG("LIBFLASH: Init status: %02x\n", stat);
|
| 448 |
|
| 449 | /* Fallback to get ID manually */
|
| 450 | rc = ct->cmd_rd(ct, CMD_RDID, false, 0, id_buf, 3);
|
| 451 | if (rc)
|
| 452 | return rc;
|
| 453 | *id_size = 3;
|
| 454 |
|
| 455 | return 0;
|
| 456 | }
|
| 457 |
|
| 458 | static int flash_identify(struct flash_chip *c)
|
| 459 | {
|
| 460 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 461 | const struct flash_info *info;
|
| 462 | uint32_t iid, id_size;
|
| 463 | #define MAX_ID_SIZE 16
|
| 464 | uint8_t id[MAX_ID_SIZE];
|
| 465 | int rc, i;
|
| 466 |
|
| 467 | if (ct->chip_id) {
|
| 468 | /* High level controller interface */
|
| 469 | id_size = MAX_ID_SIZE;
|
| 470 | rc = ct->chip_id(ct, id, &id_size);
|
| 471 | } else
|
| 472 | rc = fl_chip_id(ct, id, &id_size);
|
| 473 | if (rc)
|
| 474 | return rc;
|
| 475 | if (id_size < 3)
|
| 476 | return FLASH_ERR_CHIP_UNKNOWN;
|
| 477 |
|
| 478 | /* Convert to a dword for lookup */
|
| 479 | iid = id[0];
|
| 480 | iid = (iid << 8) | id[1];
|
| 481 | iid = (iid << 8) | id[2];
|
| 482 |
|
| 483 | FL_DBG("LIBFLASH: Flash ID: %02x.%02x.%02x (%06x)\n",
|
| 484 | id[0], id[1], id[2], iid);
|
| 485 |
|
| 486 | /* Lookup in flash_info */
|
| 487 | for (i = 0; i < ARRAY_SIZE(flash_info); i++) {
|
| 488 | info = &flash_info[i];
|
| 489 | if (info->id == iid)
|
| 490 | break;
|
| 491 | }
|
| 492 | if (info->id != iid)
|
| 493 | return FLASH_ERR_CHIP_UNKNOWN;
|
| 494 |
|
| 495 | c->info = *info;
|
| 496 | c->tsize = info->size;
|
| 497 | ct->finfo = &c->info;
|
| 498 |
|
| 499 | /*
|
| 500 | * Let controller know about our settings and possibly
|
| 501 | * override them
|
| 502 | */
|
| 503 | if (ct->setup) {
|
| 504 | rc = ct->setup(ct, &c->tsize);
|
| 505 | if (rc)
|
| 506 | return rc;
|
| 507 | }
|
| 508 |
|
| 509 | /* Calculate min erase granularity */
|
| 510 | if (c->info.flags & FL_ERASE_4K)
|
| 511 | c->min_erase_mask = 0xfff;
|
| 512 | else if (c->info.flags & FL_ERASE_32K)
|
| 513 | c->min_erase_mask = 0x7fff;
|
| 514 | else if (c->info.flags & FL_ERASE_64K)
|
| 515 | c->min_erase_mask = 0xffff;
|
| 516 | else {
|
| 517 | /* No erase size ? oops ... */
|
| 518 | FL_ERR("LIBFLASH: No erase sizes !\n");
|
| 519 | return FLASH_ERR_CTRL_CONFIG_MISMATCH;
|
| 520 | }
|
| 521 |
|
| 522 | FL_DBG("LIBFLASH: Found chip %s size %dM erase granule: %dK\n",
|
| 523 | c->info.name, c->tsize >> 20, (c->min_erase_mask + 1) >> 10);
|
| 524 |
|
| 525 | return 0;
|
| 526 | }
|
| 527 |
|
| 528 | static int flash_set_4b(struct flash_chip *c, bool enable)
|
| 529 | {
|
| 530 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 531 | int rc;
|
| 532 |
|
| 533 | /* Some flash chips want this */
|
| 534 | rc = fl_wren(ct);
|
| 535 | if (rc) {
|
| 536 | FL_ERR("LIBFLASH: Error %d enabling write for set_4b\n", rc);
|
| 537 | /* Ignore the error & move on (could be wrprotect chip) */
|
| 538 | }
|
| 539 |
|
| 540 | /* Ignore error in case chip is write protected */
|
| 541 |
|
| 542 | return ct->cmd_wr(ct, enable ? CMD_EN4B : CMD_EX4B, false, 0, NULL, 0);
|
| 543 | }
|
| 544 |
|
| 545 | int flash_force_4b_mode(struct flash_chip *c, bool enable_4b)
|
| 546 | {
|
| 547 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 548 | int rc;
|
| 549 |
|
| 550 | /*
|
| 551 | * We only allow force 4b if both controller and flash do 4b
|
| 552 | * as this is mainly used if a 3rd party tries to directly
|
| 553 | * access a direct mapped read region
|
| 554 | */
|
| 555 | if (enable_4b && !((c->info.flags & FL_CAN_4B) && ct->set_4b))
|
| 556 | return FLASH_ERR_4B_NOT_SUPPORTED;
|
| 557 |
|
| 558 | /* Only send to flash directly on controllers that implement
|
| 559 | * the low level callbacks
|
| 560 | */
|
| 561 | if (ct->cmd_wr) {
|
| 562 | rc = flash_set_4b(c, enable_4b);
|
| 563 | if (rc)
|
| 564 | return rc;
|
| 565 | }
|
| 566 |
|
| 567 | /* Then inform the controller */
|
| 568 | if (ct->set_4b)
|
| 569 | rc = ct->set_4b(ct, enable_4b);
|
| 570 | return rc;
|
| 571 | }
|
| 572 |
|
| 573 | static int flash_configure(struct flash_chip *c)
|
| 574 | {
|
| 575 | struct spi_flash_ctrl *ct = c->ctrl;
|
| 576 | int rc;
|
| 577 |
|
| 578 | /* Crop flash size if necessary */
|
| 579 | if (c->tsize > 0x01000000 && !(c->info.flags & FL_CAN_4B)) {
|
| 580 | FL_ERR("LIBFLASH: Flash chip cropped to 16M, no 4b mode\n");
|
| 581 | c->tsize = 0x01000000;
|
| 582 | }
|
| 583 |
|
| 584 | /* If flash chip > 16M, enable 4b mode */
|
| 585 | if (c->tsize > 0x01000000) {
|
| 586 | FL_DBG("LIBFLASH: Flash >16MB, enabling 4B mode...\n");
|
| 587 |
|
| 588 | /* Set flash to 4b mode if we can */
|
| 589 | if (ct->cmd_wr) {
|
| 590 | rc = flash_set_4b(c, true);
|
| 591 | if (rc) {
|
| 592 | FL_ERR("LIBFLASH: Failed to set flash 4b mode\n");
|
| 593 | return rc;
|
| 594 | }
|
| 595 | }
|
| 596 |
|
| 597 |
|
| 598 | /* Set controller to 4b mode if supported */
|
| 599 | if (ct->set_4b) {
|
| 600 | FL_DBG("LIBFLASH: Enabling controller 4B mode...\n");
|
| 601 | rc = ct->set_4b(ct, true);
|
| 602 | if (rc) {
|
| 603 | FL_ERR("LIBFLASH: Failed"
|
| 604 | " to set controller 4b mode\n");
|
| 605 | return rc;
|
| 606 | }
|
| 607 | }
|
| 608 | } else {
|
| 609 | FL_DBG("LIBFLASH: Flash <=16MB, disabling 4B mode...\n");
|
| 610 |
|
| 611 | /*
|
| 612 | * If flash chip supports 4b mode, make sure we disable
|
| 613 | * it in case it was left over by the previous user
|
| 614 | */
|
| 615 | if (c->info.flags & FL_CAN_4B) {
|
| 616 | rc = flash_set_4b(c, false);
|
| 617 | if (rc) {
|
| 618 | FL_ERR("LIBFLASH: Failed to"
|
| 619 | " clear flash 4b mode\n");
|
| 620 | return rc;
|
| 621 | }
|
| 622 | }
|
| 623 |
|
| 624 | /* Set controller to 3b mode if mode switch is supported */
|
| 625 | if (ct->set_4b) {
|
| 626 | FL_DBG("LIBFLASH: Disabling controller 4B mode...\n");
|
| 627 | rc = ct->set_4b(ct, false);
|
| 628 | if (rc) {
|
| 629 | FL_ERR("LIBFLASH: Failed to"
|
| 630 | " clear controller 4b mode\n");
|
| 631 | return rc;
|
| 632 | }
|
| 633 | }
|
| 634 | }
|
| 635 | return 0;
|
| 636 | }
|
| 637 |
|
| 638 | int flash_get_info(struct flash_chip *chip, const char **name,
|
| 639 | uint32_t *total_size, uint32_t *erase_granule)
|
| 640 | {
|
| 641 | if (name)
|
| 642 | *name = chip->info.name;
|
| 643 | if (total_size)
|
| 644 | *total_size = chip->tsize;
|
| 645 | if (erase_granule)
|
| 646 | *erase_granule = chip->min_erase_mask + 1;
|
| 647 | return 0;
|
| 648 | }
|
| 649 |
|
| 650 | int flash_init(struct spi_flash_ctrl *ctrl, struct flash_chip **flash)
|
| 651 | {
|
| 652 | struct flash_chip *c;
|
| 653 | int rc;
|
| 654 |
|
| 655 | *flash = NULL;
|
| 656 | c = malloc(sizeof(struct flash_chip));
|
| 657 | if (!c)
|
| 658 | return FLASH_ERR_MALLOC_FAILED;
|
| 659 | memset(c, 0, sizeof(*c));
|
| 660 | c->ctrl = ctrl;
|
| 661 |
|
| 662 | rc = flash_identify(c);
|
| 663 | if (rc) {
|
| 664 | FL_ERR("LIBFLASH: Flash identification failed\n");
|
| 665 | goto bail;
|
| 666 | }
|
| 667 | c->smart_buf = malloc(c->min_erase_mask + 1);
|
| 668 | if (!c->smart_buf) {
|
| 669 | FL_ERR("LIBFLASH: Failed to allocate smart buffer !\n");
|
| 670 | rc = FLASH_ERR_MALLOC_FAILED;
|
| 671 | goto bail;
|
| 672 | }
|
| 673 | rc = flash_configure(c);
|
| 674 | if (rc)
|
| 675 | FL_ERR("LIBFLASH: Flash configuration failed\n");
|
| 676 | bail:
|
| 677 | if (rc) {
|
| 678 | free(c);
|
| 679 | return rc;
|
| 680 | }
|
| 681 | *flash = c;
|
| 682 | return 0;
|
| 683 | }
|
| 684 |
|
| 685 | void flash_exit(struct flash_chip *chip)
|
| 686 | {
|
| 687 | /* XXX Make sure we are idle etc... */
|
| 688 | free(chip);
|
| 689 | }
|
| 690 |
|