Jie Yang | 08e4a6d | 2021-08-23 13:07:41 -0700 | [diff] [blame] | 1 | #pragma once |
| 2 | #include "smbios_mdrv2.hpp" |
| 3 | |
Jie Yang | e7cf319 | 2021-08-20 11:21:43 -0700 | [diff] [blame] | 4 | #include <xyz/openbmc_project/Association/Definitions/server.hpp> |
Jie Yang | 08e4a6d | 2021-08-23 13:07:41 -0700 | [diff] [blame] | 5 | #include <xyz/openbmc_project/Inventory/Connector/Embedded/server.hpp> |
| 6 | #include <xyz/openbmc_project/Inventory/Decorator/LocationCode/server.hpp> |
| 7 | #include <xyz/openbmc_project/Inventory/Item/PCIeSlot/server.hpp> |
| 8 | #include <xyz/openbmc_project/Inventory/Item/server.hpp> |
| 9 | |
| 10 | #include <cstdint> |
| 11 | #include <map> |
| 12 | #include <unordered_set> |
| 13 | |
| 14 | namespace phosphor |
| 15 | { |
| 16 | |
| 17 | namespace smbios |
| 18 | { |
| 19 | |
| 20 | using PCIeSlot = |
Jason M. Bills | 33ae81f | 2023-04-26 09:06:08 -0700 | [diff] [blame] | 21 | sdbusplus::server::xyz::openbmc_project::inventory::item::PCIeSlot; |
| 22 | using PCIeGeneration = sdbusplus::server::xyz::openbmc_project::inventory:: |
| 23 | item::PCIeSlot::Generations; |
| 24 | using PCIeType = sdbusplus::server::xyz::openbmc_project::inventory::item:: |
Jie Yang | 08e4a6d | 2021-08-23 13:07:41 -0700 | [diff] [blame] | 25 | PCIeSlot::SlotTypes; |
| 26 | using embedded = |
Jason M. Bills | 33ae81f | 2023-04-26 09:06:08 -0700 | [diff] [blame] | 27 | sdbusplus::server::xyz::openbmc_project::inventory::connector::Embedded; |
Jie Yang | 08e4a6d | 2021-08-23 13:07:41 -0700 | [diff] [blame] | 28 | using location = |
Jason M. Bills | 33ae81f | 2023-04-26 09:06:08 -0700 | [diff] [blame] | 29 | sdbusplus::server::xyz::openbmc_project::inventory::decorator::LocationCode; |
| 30 | using item = sdbusplus::server::xyz::openbmc_project::inventory::Item; |
Jie Yang | e7cf319 | 2021-08-20 11:21:43 -0700 | [diff] [blame] | 31 | using association = |
Jason M. Bills | 33ae81f | 2023-04-26 09:06:08 -0700 | [diff] [blame] | 32 | sdbusplus::server::xyz::openbmc_project::association::Definitions; |
Jie Yang | 08e4a6d | 2021-08-23 13:07:41 -0700 | [diff] [blame] | 33 | |
Jie Yang | e7cf319 | 2021-08-20 11:21:43 -0700 | [diff] [blame] | 34 | class Pcie : |
| 35 | sdbusplus::server::object_t<PCIeSlot, location, embedded, item, association> |
Jie Yang | 08e4a6d | 2021-08-23 13:07:41 -0700 | [diff] [blame] | 36 | { |
| 37 | public: |
| 38 | Pcie() = delete; |
| 39 | Pcie(const Pcie&) = delete; |
| 40 | Pcie& operator=(const Pcie&) = delete; |
| 41 | Pcie(Pcie&&) = delete; |
| 42 | Pcie& operator=(Pcie&&) = delete; |
| 43 | ~Pcie() = default; |
| 44 | |
Patrick Williams | 77b9c47 | 2022-07-22 19:26:57 -0500 | [diff] [blame] | 45 | Pcie(sdbusplus::bus_t& bus, const std::string& objPath, |
Jie Yang | e7cf319 | 2021-08-20 11:21:43 -0700 | [diff] [blame] | 46 | const uint8_t& pcieId, uint8_t* smbiosTableStorage, |
| 47 | const std::string& motherboard) : |
| 48 | sdbusplus::server::object_t<PCIeSlot, location, embedded, item, |
| 49 | association>(bus, objPath.c_str()), |
Brandon Kim | 5a122a6 | 2023-05-04 04:25:03 +0000 | [diff] [blame] | 50 | pcieNum(pcieId) |
Jie Yang | 08e4a6d | 2021-08-23 13:07:41 -0700 | [diff] [blame] | 51 | { |
Brandon Kim | 5a122a6 | 2023-05-04 04:25:03 +0000 | [diff] [blame] | 52 | pcieInfoUpdate(smbiosTableStorage, motherboard); |
Jie Yang | 08e4a6d | 2021-08-23 13:07:41 -0700 | [diff] [blame] | 53 | } |
| 54 | |
Brandon Kim | 5a122a6 | 2023-05-04 04:25:03 +0000 | [diff] [blame] | 55 | void pcieInfoUpdate(uint8_t* smbiosTableStorage, |
| 56 | const std::string& motherboard); |
Jie Yang | 08e4a6d | 2021-08-23 13:07:41 -0700 | [diff] [blame] | 57 | |
| 58 | private: |
| 59 | uint8_t pcieNum; |
| 60 | uint8_t* storage; |
Jie Yang | e7cf319 | 2021-08-20 11:21:43 -0700 | [diff] [blame] | 61 | std::string motherboardPath; |
Jie Yang | 08e4a6d | 2021-08-23 13:07:41 -0700 | [diff] [blame] | 62 | |
| 63 | struct SystemSlotInfo |
| 64 | { |
| 65 | uint8_t type; |
| 66 | uint8_t length; |
| 67 | uint16_t handle; |
| 68 | uint8_t slotDesignation; |
| 69 | uint8_t slotType; |
| 70 | uint8_t slotDataBusWidth; |
| 71 | uint8_t currUsage; |
| 72 | uint8_t slotLength; |
| 73 | uint16_t slotID; |
| 74 | uint8_t characteristics1; |
| 75 | uint8_t characteristics2; |
| 76 | uint16_t segGroupNum; |
| 77 | uint8_t busNum; |
| 78 | uint8_t deviceNum; |
| 79 | } __attribute__((packed)); |
| 80 | |
| 81 | void pcieGeneration(const uint8_t type); |
| 82 | void pcieType(const uint8_t type); |
| 83 | void pcieLaneSize(const uint8_t width); |
| 84 | void pcieIsHotPluggable(const uint8_t characteristics); |
| 85 | void pcieLocation(const uint8_t slotDesignation, const uint8_t structLen, |
| 86 | uint8_t* dataIn); |
| 87 | }; |
| 88 | |
| 89 | static const std::unordered_set<uint8_t> pcieSmbiosType = { |
| 90 | 0x09, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1c, |
| 91 | 0x1f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0xa5, |
| 92 | 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, |
| 93 | 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, |
| 94 | 0xbe, 0xbf, 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6}; |
| 95 | |
| 96 | // Definition follow smbios spec DSP0134 3.4.0 |
| 97 | static const std::map<uint8_t, PCIeGeneration> pcieGenerationTable = { |
| 98 | {0x09, PCIeGeneration::Unknown}, {0x14, PCIeGeneration::Gen3}, |
| 99 | {0x15, PCIeGeneration::Gen3}, {0x16, PCIeGeneration::Gen3}, |
| 100 | {0x17, PCIeGeneration::Gen3}, {0x18, PCIeGeneration::Gen1}, |
| 101 | {0x19, PCIeGeneration::Gen1}, {0x1a, PCIeGeneration::Gen1}, |
| 102 | {0x1b, PCIeGeneration::Gen1}, {0x1c, PCIeGeneration::Gen1}, |
| 103 | {0x1d, PCIeGeneration::Gen3}, {0x1e, PCIeGeneration::Gen3}, |
| 104 | {0x1f, PCIeGeneration::Gen2}, {0x20, PCIeGeneration::Gen3}, |
| 105 | {0x21, PCIeGeneration::Gen1}, {0x22, PCIeGeneration::Gen1}, |
| 106 | {0x23, PCIeGeneration::Gen1}, {0x24, PCIeGeneration::Gen4}, |
| 107 | {0x25, PCIeGeneration::Gen5}, {0x26, PCIeGeneration::Unknown}, |
| 108 | {0x27, PCIeGeneration::Unknown}, {0x28, PCIeGeneration::Unknown}, |
| 109 | {0x29, PCIeGeneration::Unknown}, {0xa5, PCIeGeneration::Gen1}, |
| 110 | {0xa6, PCIeGeneration::Gen1}, {0xa7, PCIeGeneration::Gen1}, |
| 111 | {0xa8, PCIeGeneration::Gen1}, {0xa9, PCIeGeneration::Gen1}, |
| 112 | {0xaa, PCIeGeneration::Gen1}, {0xab, PCIeGeneration::Gen2}, |
| 113 | {0xac, PCIeGeneration::Gen2}, {0xad, PCIeGeneration::Gen2}, |
| 114 | {0xae, PCIeGeneration::Gen2}, {0xaf, PCIeGeneration::Gen2}, |
| 115 | {0xb0, PCIeGeneration::Gen2}, {0xb1, PCIeGeneration::Gen3}, |
| 116 | {0xb2, PCIeGeneration::Gen3}, {0xb3, PCIeGeneration::Gen3}, |
| 117 | {0xb4, PCIeGeneration::Gen3}, {0xb5, PCIeGeneration::Gen3}, |
| 118 | {0xb6, PCIeGeneration::Gen3}, {0xb8, PCIeGeneration::Gen4}, |
| 119 | {0xb9, PCIeGeneration::Gen4}, {0xba, PCIeGeneration::Gen4}, |
| 120 | {0xbb, PCIeGeneration::Gen4}, {0xbc, PCIeGeneration::Gen4}, |
| 121 | {0xbd, PCIeGeneration::Gen4}, {0xbe, PCIeGeneration::Gen5}, |
| 122 | {0xbf, PCIeGeneration::Gen5}, {0xc0, PCIeGeneration::Gen5}, |
| 123 | {0xc1, PCIeGeneration::Gen5}, {0xc2, PCIeGeneration::Gen5}, |
| 124 | {0xc3, PCIeGeneration::Gen5}, {0xc4, PCIeGeneration::Unknown}, |
| 125 | {0xc5, PCIeGeneration::Unknown}, {0xc6, PCIeGeneration::Unknown}}; |
| 126 | |
| 127 | static const std::map<uint8_t, PCIeType> pcieTypeTable = { |
| 128 | {0x09, PCIeType::OEM}, {0x14, PCIeType::M_2}, |
| 129 | {0x15, PCIeType::M_2}, {0x16, PCIeType::M_2}, |
| 130 | {0x17, PCIeType::M_2}, {0x18, PCIeType::Unknown}, |
| 131 | {0x19, PCIeType::Unknown}, {0x1a, PCIeType::Unknown}, |
| 132 | {0x1b, PCIeType::Unknown}, {0x1c, PCIeType::Unknown}, |
| 133 | {0x1d, PCIeType::Unknown}, {0x1e, PCIeType::Unknown}, |
| 134 | {0xa8, PCIeType::Unknown}, {0xa9, PCIeType::Unknown}, |
| 135 | {0x1F, PCIeType::U_2}, {0x20, PCIeType::U_2}, |
| 136 | {0x21, PCIeType::Mini}, {0x22, PCIeType::Mini}, |
| 137 | {0x23, PCIeType::Mini}, {0x24, PCIeType::U_2}, |
| 138 | {0x25, PCIeType::U_2}, {0x26, PCIeType::OCP3Small}, |
| 139 | {0x27, PCIeType::OCP3Large}, {0x28, PCIeType::Unknown}, |
| 140 | {0x29, PCIeType::Unknown}, {0xa5, PCIeType::Unknown}, |
| 141 | {0xa6, PCIeType::Unknown}, {0xa7, PCIeType::Unknown}, |
| 142 | {0xa8, PCIeType::Unknown}, {0xa9, PCIeType::Unknown}, |
| 143 | {0xaa, PCIeType::Unknown}, {0xab, PCIeType::Unknown}, |
| 144 | {0xac, PCIeType::Unknown}, {0xad, PCIeType::Unknown}, |
| 145 | {0xae, PCIeType::Unknown}, {0xaf, PCIeType::Unknown}, |
| 146 | {0xb0, PCIeType::Unknown}, {0xb1, PCIeType::Unknown}, |
| 147 | {0xb2, PCIeType::Unknown}, {0xb3, PCIeType::Unknown}, |
| 148 | {0xb4, PCIeType::Unknown}, {0xb5, PCIeType::Unknown}, |
| 149 | {0xb6, PCIeType::Unknown}, {0xb8, PCIeType::Unknown}, |
| 150 | {0xb9, PCIeType::Unknown}, {0xba, PCIeType::Unknown}, |
| 151 | {0xbb, PCIeType::Unknown}, {0xbc, PCIeType::Unknown}, |
| 152 | {0xbd, PCIeType::Unknown}, {0xbe, PCIeType::Unknown}, |
| 153 | {0xbf, PCIeType::Unknown}, {0xc0, PCIeType::Unknown}, |
| 154 | {0xc1, PCIeType::Unknown}, {0xc2, PCIeType::Unknown}, |
| 155 | {0xc3, PCIeType::Unknown}, {0xc4, PCIeType::Unknown}, |
| 156 | {0xc5, PCIeType::Unknown}, {0xc6, PCIeType::Unknown}}; |
| 157 | |
| 158 | const std::map<uint8_t, size_t> pcieLanesTable = { |
| 159 | {0x08, 1}, {0x09, 2}, {0xa, 4}, {0xb, 8}, {0xc, 12}, {0xd, 16}, {0xe, 32}}; |
| 160 | |
| 161 | }; // namespace smbios |
| 162 | |
| 163 | }; // namespace phosphor |