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Cheng C Yang43c6a1d2019-12-19 00:48:34 +08001/*
2// Copyright (c) 2018 Intel Corporation
3//
4// Licensed under the Apache License, Version 2.0 (the "License");
5// you may not use this file except in compliance with the License.
6// You may obtain a copy of the License at
7//
8// http://www.apache.org/licenses/LICENSE-2.0
9//
10// Unless required by applicable law or agreed to in writing, software
11// distributed under the License is distributed on an "AS IS" BASIS,
12// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13// See the License for the specific language governing permissions and
14// limitations under the License.
15*/
16
17#pragma once
Zhikui Ren18a5ab92020-09-01 21:35:20 -070018#include "smbios_mdrv2.hpp"
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080019
20#include <xyz/openbmc_project/Inventory/Decorator/Asset/server.hpp>
Jie Yang31720392021-07-22 21:45:45 -070021#include <xyz/openbmc_project/Inventory/Decorator/LocationCode/server.hpp>
Zhikui Ren18a5ab92020-09-01 21:35:20 -070022#include <xyz/openbmc_project/Inventory/Decorator/Revision/server.hpp>
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080023#include <xyz/openbmc_project/Inventory/Item/Cpu/server.hpp>
Jonathan Doman563570d2021-05-24 10:52:43 -070024#include <xyz/openbmc_project/Inventory/Item/server.hpp>
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080025
26namespace phosphor
27{
28
29namespace smbios
30{
31
Zhikui Ren18a5ab92020-09-01 21:35:20 -070032using rev =
33 sdbusplus::xyz::openbmc_project::Inventory::Decorator::server::Revision;
34using asset =
35 sdbusplus::xyz::openbmc_project::Inventory::Decorator::server::Asset;
Jie Yang31720392021-07-22 21:45:45 -070036using location =
37 sdbusplus::xyz::openbmc_project::Inventory::Decorator::server::LocationCode;
Zhikui Ren18a5ab92020-09-01 21:35:20 -070038using processor = sdbusplus::xyz::openbmc_project::Inventory::Item::server::Cpu;
Jonathan Doman563570d2021-05-24 10:52:43 -070039using Item = sdbusplus::xyz::openbmc_project::Inventory::server::Item;
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080040
41// Definition follow smbios spec DSP0134 3.0.0
Cheng C Yang2ca7a0f2019-12-19 10:46:42 +080042static const std::map<uint8_t, const char*> familyTable = {
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080043 {0x1, "Other"},
44 {0x2, "Unknown"},
45 {0x10, "Pentium II Xeon processor"},
46 {0xa1, "Quad-Core Intel Xeon processor 3200 Series"},
47 {0xa2, "Dual-Core Intel Xeon processor 3000 Series"},
48 {0xa3, "Quad-Core Intel Xeon processor 5300 Series"},
49 {0xa4, "Dual-Core Intel Xeon processor 5100 Series"},
50 {0xa5, "Dual-Core Intel Xeon processor 5000 Series"},
51 {0xa6, "Dual-Core Intel Xeon processor LV"},
52 {0xa7, "Dual-Core Intel Xeon processor ULV"},
53 {0xa8, "Dual-Core Intel Xeon processor 7100 Series"},
54 {0xa9, "Quad-Core Intel Xeon processor 5400 Series"},
55 {0xaa, "Quad-Core Intel Xeon processor"},
56 {0xab, "Dual-Core Intel Xeon processor 5200 Series"},
57 {0xac, "Dual-Core Intel Xeon processor 7200 Series"},
58 {0xad, "Quad-Core Intel Xeon processor 7300 Series"},
59 {0xae, "Quad-Core Intel Xeon processor 7400 Series"},
60 {0xaf, "Multi-Core Intel Xeon processor 7400 Series"},
61 {0xb0, "Pentium III Xeon processor"},
62 {0xb3, "Intel Xeon processor"},
63 {0xb5, "Intel Xeon processor MP"},
64 {0xd6, "Multi-Core Intel Xeon processor"},
65 {0xd7, "Dual-Core Intel Xeon processor 3xxx Series"},
66 {0xd8, "Quad-Core Intel Xeon processor 3xxx Series"},
67 {0xd9, "VIA Nano Processor Family"},
68 {0xda, "Dual-Core Intel Xeon processor 5xxx Series"},
69 {0xdb, "Quad-Core Intel Xeon processor 5xxx Series"},
70 {0xdd, "Dual-Core Intel Xeon processor 7xxx Series"},
71 {0xde, "Quad-Core Intel Xeon processor 7xxx Series"},
72 {0xdf, "Multi-Core Intel Xeon processor 7xxx Series"},
73 {0xe0, "Multi-Core Intel Xeon processor 3400 Series"}
74
75};
76
77// Definition follow smbios spec DSP0134 3.0.0
Zhikui Ren18a5ab92020-09-01 21:35:20 -070078static const std::array<std::optional<processor::Capability>, 16>
79 characteristicsTable{std::nullopt,
80 std::nullopt,
81 processor::Capability::Capable64bit,
82 processor::Capability::MultiCore,
83 processor::Capability::HardwareThread,
84 processor::Capability::ExecuteProtection,
85 processor::Capability::EnhancedVirtualization,
86 processor::Capability::PowerPerformanceControl,
87 std::nullopt,
88 std::nullopt,
89 std::nullopt,
90 std::nullopt,
91 std::nullopt,
92 std::nullopt,
93 std::nullopt,
94 std::nullopt};
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080095
Jie Yang31720392021-07-22 21:45:45 -070096class Cpu : sdbusplus::server::object_t<processor, asset, location, rev, Item>
Cheng C Yang43c6a1d2019-12-19 00:48:34 +080097{
98 public:
99 Cpu() = delete;
Cheng C Yang2ca7a0f2019-12-19 10:46:42 +0800100 Cpu(const Cpu&) = delete;
101 Cpu& operator=(const Cpu&) = delete;
102 Cpu(Cpu&&) = delete;
103 Cpu& operator=(Cpu&&) = delete;
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800104 ~Cpu() = default;
105
Cheng C Yang2ca7a0f2019-12-19 10:46:42 +0800106 Cpu(sdbusplus::bus::bus& bus, const std::string& objPath,
107 const uint8_t& cpuId, uint8_t* smbiosTableStorage) :
Jie Yang31720392021-07-22 21:45:45 -0700108 sdbusplus::server::object_t<processor, asset, location, rev, Item>(
Jonathan Doman563570d2021-05-24 10:52:43 -0700109 bus, objPath.c_str()),
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800110 cpuNum(cpuId), storage(smbiosTableStorage)
111 {
Zhikui Ren18a5ab92020-09-01 21:35:20 -0700112 infoUpdate();
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800113 }
114
Zhikui Ren18a5ab92020-09-01 21:35:20 -0700115 void infoUpdate(void);
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800116
117 private:
118 uint8_t cpuNum;
119
Cheng C Yang2ca7a0f2019-12-19 10:46:42 +0800120 uint8_t* storage;
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800121
122 struct ProcessorInfo
123 {
124 uint8_t type;
125 uint8_t length;
126 uint16_t handle;
127 uint8_t socketDesignation;
128 uint8_t processorType;
129 uint8_t family;
130 uint8_t manufacturer;
131 uint64_t id;
132 uint8_t version;
133 uint8_t voltage;
134 uint16_t exClock;
135 uint16_t maxSpeed;
136 uint16_t currSpeed;
137 uint8_t status;
138 uint8_t upgrade;
139 uint16_t l1Handle;
140 uint16_t l2Handle;
141 uint16_t l3Handle;
142 uint8_t serialNum;
143 uint8_t assetTag;
144 uint8_t partNum;
145 uint8_t coreCount;
146 uint8_t coreEnable;
147 uint8_t threadCount;
148 uint16_t characteristics;
149 uint16_t family2;
150 uint16_t coreCount2;
151 uint16_t coreEnable2;
152 uint16_t threadCount2;
153 } __attribute__((packed));
154
Zhikui Ren18a5ab92020-09-01 21:35:20 -0700155 void socket(const uint8_t positionNum, const uint8_t structLen,
156 uint8_t* dataIn);
157 void family(const uint8_t value);
158 void manufacturer(const uint8_t positionNum, const uint8_t structLen,
159 uint8_t* dataIn);
Charles Boyere6431692021-08-31 16:47:47 -0500160 void serialNumber(const uint8_t positionNum, const uint8_t structLen,
161 uint8_t* dataIn);
162 void partNumber(const uint8_t positionNum, const uint8_t structLen,
163 uint8_t* dataIn);
Zhikui Ren18a5ab92020-09-01 21:35:20 -0700164 void version(const uint8_t positionNum, const uint8_t structLen,
165 uint8_t* dataIn);
166 void characteristics(const uint16_t value);
Cheng C Yang43c6a1d2019-12-19 00:48:34 +0800167};
168
169} // namespace smbios
170
171} // namespace phosphor