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Jie Yang08e4a6d2021-08-23 13:07:41 -07001#include "pcieslot.hpp"
2
3#include <cstdint>
4#include <map>
5
6namespace phosphor
7{
8namespace smbios
9{
10
Brandon Kim5a122a62023-05-04 04:25:03 +000011void Pcie::pcieInfoUpdate(uint8_t* smbiosTableStorage,
12 const std::string& motherboard)
Jie Yang08e4a6d2021-08-23 13:07:41 -070013{
Brandon Kim5a122a62023-05-04 04:25:03 +000014 storage = smbiosTableStorage;
15 motherboardPath = motherboard;
16
Jie Yang08e4a6d2021-08-23 13:07:41 -070017 uint8_t* dataIn = getSMBIOSTypePtr(storage, systemSlots);
18
19 if (dataIn == nullptr)
20 {
21 return;
22 }
23
24 /* offset 5 points to the slot type */
25 for (uint8_t index = 0;
26 index < pcieNum ||
27 pcieSmbiosType.find(*(dataIn + 5)) == pcieSmbiosType.end();)
28 {
29 dataIn = smbiosNextPtr(dataIn);
30 if (dataIn == nullptr)
31 {
32 return;
33 }
34 dataIn = getSMBIOSTypePtr(dataIn, systemSlots);
35 if (dataIn == nullptr)
36 {
37 return;
38 }
39 if (pcieSmbiosType.find(*(dataIn + 5)) != pcieSmbiosType.end())
40 {
41 index++;
42 }
43 }
44
45 auto pcieInfo = reinterpret_cast<struct SystemSlotInfo*>(dataIn);
46
47 pcieGeneration(pcieInfo->slotType);
Manojkiran Edaf3b25e52025-02-07 14:30:06 +053048 pcieType(pcieInfo->slotType, pcieInfo->slotLength);
Jie Yang08e4a6d2021-08-23 13:07:41 -070049 pcieLaneSize(pcieInfo->slotDataBusWidth);
50 pcieIsHotPluggable(pcieInfo->characteristics2);
51 pcieLocation(pcieInfo->slotDesignation, pcieInfo->length, dataIn);
52
53 /* Pcie slot is embedded on the board. Always be true */
54 Item::present(true);
Jie Yange7cf3192021-08-20 11:21:43 -070055
56 if (!motherboardPath.empty())
57 {
58 std::vector<std::tuple<std::string, std::string, std::string>> assocs;
59 assocs.emplace_back("chassis", "pcie_slots", motherboardPath);
60 association::associations(assocs);
61 }
Jie Yang08e4a6d2021-08-23 13:07:41 -070062}
63
64void Pcie::pcieGeneration(const uint8_t type)
65{
66 std::map<uint8_t, PCIeGeneration>::const_iterator it =
67 pcieGenerationTable.find(type);
68 if (it == pcieGenerationTable.end())
69 {
70 PCIeSlot::generation(PCIeGeneration::Unknown);
71 }
72 else
73 {
74 PCIeSlot::generation(it->second);
75 }
76}
77
Manojkiran Edaf3b25e52025-02-07 14:30:06 +053078void Pcie::pcieType(const uint8_t type, const uint8_t slotLength)
Jie Yang08e4a6d2021-08-23 13:07:41 -070079{
Manojkiran Edaf3b25e52025-02-07 14:30:06 +053080 // Try to find PCIeType in the main table
81 auto it = pcieTypeTable.find(type);
82 PCIeType pcieSlotType = PCIeType::Unknown;
83
84 if (it != pcieTypeTable.end())
Jie Yang08e4a6d2021-08-23 13:07:41 -070085 {
Manojkiran Edaf3b25e52025-02-07 14:30:06 +053086 pcieSlotType = it->second;
Jie Yang08e4a6d2021-08-23 13:07:41 -070087 }
88 else
89 {
Manojkiran Edaf3b25e52025-02-07 14:30:06 +053090 // If not found in `pcieTypeTable`, check `PCIeTypeByLength`
91 auto slotIt = PCIeTypeByLength.find(slotLength);
92 if (slotIt != PCIeTypeByLength.end())
93 {
94 pcieSlotType = slotIt->second;
95 }
Jie Yang08e4a6d2021-08-23 13:07:41 -070096 }
Manojkiran Edaf3b25e52025-02-07 14:30:06 +053097
98 // Set the slot type
99 PCIeSlot::slotType(pcieSlotType);
Jie Yang08e4a6d2021-08-23 13:07:41 -0700100}
101
102void Pcie::pcieLaneSize(const uint8_t width)
103{
104 std::map<uint8_t, size_t>::const_iterator it = pcieLanesTable.find(width);
105 if (it == pcieLanesTable.end())
106 {
107 PCIeSlot::lanes(0);
108 }
109 else
110 {
111 PCIeSlot::lanes(it->second);
112 }
113}
114
115void Pcie::pcieIsHotPluggable(const uint8_t characteristics)
116{
117 /* Bit 1 of slot characteristics 2 indicates if slot supports hot-plug
118 * devices
119 */
120 PCIeSlot::hotPluggable(characteristics & 0x2);
121}
122
123void Pcie::pcieLocation(const uint8_t slotDesignation, const uint8_t structLen,
124 uint8_t* dataIn)
125{
126 location::locationCode(
127 positionToString(slotDesignation, structLen, dataIn));
128}
129
130} // namespace smbios
131} // namespace phosphor