| commit | 94ce8ebd53cc116742733c4c9f034b4817e2a26d | [log] [tgz] |
|---|---|---|
| author | Jason M. Bills <jason.m.bills@linux.intel.com> | Mon Sep 30 10:13:25 2019 -0700 |
| committer | Jason Bills <jason.m.bills@linux.intel.com> | Mon Nov 25 19:31:26 2019 +0000 |
| tree | ce3a343d0ec8a0046fda8b381ebde9420559dd83 | |
| parent | e9a9e2d708da97037aba0e37ebf19feae895b8f1 [diff] |
Update the saved power state after checking the restore policy
If the power state changes while power control is not running
(e.g. during BMC boot), the stored state can be left stale
causing it to behave incorrectly on a power-loss.
For example:
1. The system is shut down and the 'Off' state is saved.
2. The BMC is rebooted.
3. The power button is used to boot the system.
4. Power control will start with 'On' as the current state,
but with 'Off' still as the saved state.
5. The system loses power.
6. On restore, the previous state should be detected as 'On',
but is instead detected as 'Off'.
This change updates the saved power state to match the current
state after checking the restore policy.
Tested:
Ran the scenario above and confirmed that the system correctly
detected and restored the 'On' state in step 6.
Change-Id: Ia7b79f58c34150fe15434bb054de815a4f0d85e9
Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>
This repository contains an OpenBMC compliant implementation of power control for x86 servers. It relies on a number of features to do its job. It has several intentional design goals.
At this point in time, this daemon targets Lewisburg based, dual socket x86 server platforms, such as S2600WFT. It is likely that other platforms will work as well.
Because this relies on the hardware passthrough support in the AST2500 to function, it requires a few patches to work correctly.
This patch adds support to UBOOT to keep the passthrough enabled https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-common/ recipes-bsp/u-boot/files/0005-enable-passthrough-in-uboot.patch
The DTS file for your platform will need the following GPIO definitions RESET_BUTTON RESET_OUT POWER_BUTTON POWER_OUT
On an aspeed, these are generally connected to E0, E1, E2, and E3 respecitvely. An example of this is available in the s2600WF config.
This patch allows the passthrough to be reenabled to the default condition when the appropriate pin is released. This allows power control to take control when needed by a user power action, but leave the hardware in control a majority of the time, reducing the possibilty of bricking a system due to a failed BMC.
https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch https://github.com/Intel-BMC/openbmc/blob/intel/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/0006-Allow-monitoring-of-power-control-input-GPIOs.patch
Caveats: This implementation does not currently implement the common targets that other implementations do. There were several attempts to, but all ended in timing issues and boot inconsistencies during stress operations.