| From d2bdfed735f6c5e69b606f0251aba131fec4275d Mon Sep 17 00:00:00 2001 |
| From: Brian Stegmiller <bjs@us.ibm.com> |
| Date: Thu, 14 May 2015 13:47:36 -0500 |
| Subject: [PATCH] ATTN: IPOLL interrupt workaround |
| |
| Circumvents issue where interrupts happen before OPAL is ready |
| to handle them |
| |
| Change-Id: I3d378cd03dac51aaa5b2f77e8940eb63f170016b |
| Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17795 |
| Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> |
| Tested-by: Jenkins Server |
| --- |
| src/usr/diag/attn/common/attnsvc_common.C | 83 +++++++++++++++++++++++++++++-- |
| 1 file changed, 79 insertions(+), 4 deletions(-) |
| |
| diff --git a/src/usr/diag/attn/common/attnsvc_common.C b/src/usr/diag/attn/common/attnsvc_common.C |
| index c56b8a8..5067438 100644 |
| --- a/src/usr/diag/attn/common/attnsvc_common.C |
| +++ b/src/usr/diag/attn/common/attnsvc_common.C |
| @@ -43,6 +43,13 @@ using namespace ERRORLOG; |
| |
| namespace ATTN |
| { |
| +const uint64_t MCIFIRACT0 = 0x02011846; |
| +const uint64_t MCIFIRACT1 = 0x02011847; |
| + |
| +const uint64_t MCIFIRMASK = 0x02011843; |
| +const uint64_t MCIFIRMASK_AND = 0x02011844; |
| +const uint64_t MCIFIRMASK_OR = 0x02011845; |
| + |
| |
| void getPbGp2Mask(uint64_t i_pos, void * i_data) |
| { |
| @@ -104,11 +111,11 @@ errlHndl_t ServiceCommon::configureInterrupts( |
| ConfigureMode i_mode) |
| { |
| errlHndl_t err = NULL; |
| - |
| - TargetHandleList procs; |
| + TargetHandleList procs; |
| getTargetService().getAllChips(procs, TYPE_PROC); |
| TargetHandleList::iterator it = procs.begin(); |
| |
| + |
| while(it != procs.end()) |
| { |
| uint64_t mask = 0; |
| @@ -172,12 +179,10 @@ errlHndl_t ServiceCommon::configureInterrupts( |
| |
| #ifndef __HOSTBOOT_RUNTIME |
| // enable attentions in ipoll mask |
| - |
| mask = HostMask::nonHost(); |
| mask |= HostMask::host(); |
| |
| // this doesn't have an and/or reg for some reason... |
| - |
| err = modifyScom(*it, |
| IPOLL::address, |
| i_mode == UP ? ~mask : mask, |
| @@ -187,6 +192,76 @@ errlHndl_t ServiceCommon::configureInterrupts( |
| { |
| break; |
| } |
| + |
| + #else // HOSTBOOT_RUNTIME |
| + |
| + if (i_mode == UP) |
| + { |
| + HwasState l_functional; |
| + uint64_t l_mciAct0 = 0; |
| + uint64_t l_mciAct1 = 0; |
| + uint64_t l_mciBitMask = 0; |
| + TargetHandleList l_mcsList; |
| + // Get list of MCS units associated with this proc |
| + getTargetService().getMcsList( *it, l_mcsList ); |
| + |
| + // We need to set/clear mask bits in the MCIFIRs that |
| + // are associated with host attentions. This should |
| + // cause interrupts to re-occur if they had happened |
| + // prior to starting the opal-prd application. |
| + TargetHandleList::iterator l_mcsIt = l_mcsList.begin(); |
| + |
| + while(l_mcsIt != l_mcsList.end()) |
| + { |
| + // Make sure functional prior to using |
| + if (!((*l_mcsIt)->tryGetAttr<ATTR_HWAS_STATE>(l_functional))) |
| + { |
| + // Can't tell if functional so skip this MCS |
| + break; |
| + } |
| + |
| + if ( !(l_functional.functional) ) |
| + { |
| + // Not functional MCS so skip it |
| + break; |
| + } |
| + |
| + // Read ACTION registers to see if HOST ATTN |
| + err = getScom(*l_mcsIt, MCIFIRACT0, l_mciAct0); |
| + |
| + if (NULL == err) |
| + { |
| + err = getScom(*l_mcsIt, MCIFIRACT1, l_mciAct1); |
| + } |
| + |
| + if (NULL == err) |
| + { |
| + // Create bit mask we will use to write to MCIFIR |
| + // (ACT0=1, ACT1=0) indicate bits we want |
| + l_mciBitMask = l_mciAct0 & ~l_mciAct1; |
| + // Set mask bits |
| + err = putScom(*l_mcsIt, MCIFIRMASK_OR, l_mciBitMask); |
| + } |
| + |
| + if (NULL == err) |
| + { |
| + // Clear mask bits |
| + err = putScom(*l_mcsIt, MCIFIRMASK_AND, ~l_mciBitMask); |
| + } |
| + |
| + // Commit any failure we had and move to next MCS unit |
| + if (NULL != err) |
| + { |
| + errlCommit(err, ATTN_COMP_ID); |
| + } |
| + |
| + l_mcsIt++; |
| + |
| + } // end while on MCS units |
| + |
| + l_mcsList.clear(); |
| + } // end if UP MODE -- enabling |
| + |
| #endif //__HOSTBOOT_RUNTIME |
| |
| ++it; |
| -- |
| 1.8.2.2 |
| |