blob: c8c34e4f699fa96d95431493fa1bba603d66b26e [file] [log] [blame]
# The HIOMAP protocol is used to access PNOR
unset SFC_IS_AST2500
unset SFC_IS_AST2400
set PNORDD_IS_IPMI
unset PNORDD_IS_SFC
unset ALLOW_MICRON_PNOR
unset ALLOW_MACRONIX_PNOR
# VPD options - Enable EECACHE
set MVPD_READ_FROM_HW
set MVPD_WRITE_TO_HW
unset MVPD_READ_FROM_PNOR
unset MVPD_WRITE_TO_PNOR
set DJVPD_READ_FROM_HW
set DJVPD_WRITE_TO_HW
unset DJVPD_READ_FROM_PNOR
unset DJVPD_WRITE_TO_PNOR
set MEMVPD_READ_FROM_HW
set MEMVPD_WRITE_TO_HW
unset MEMVPD_READ_FROM_PNOR
unset MEMVPD_WRITE_TO_PNOR
# PLDM will be read via PLDM which is not supported yet
#set PVPD_READ_FROM_HW
#set PVPD_WRITE_TO_HW
#unset PVPD_READ_FROM_PNOR
#unset PVPD_WRITE_TO_PNOR
# gpio config
set GPIODD
unset PALMETTO_VDDR
# Disable SBE updates until it is supported
# TODO: Re-enable SBE Updates when supported
unset SBE_UPDATE_CONSECUTIVE
unset SBE_UPDATE_INDEPENDENT
unset SBE_UPDATE_SEQUENTIAL
unset SBE_UPDATE_SIMULTANEOUS
set NO_SBE_UPDATES
#unset PCIE_HOTPLUG_CONTROLLER
# turn on console output
set CONSOLE
set BMC_AST2500
#set DISABLE_HOSTBOOT_RUNTIME
# Compile in hostboot runtime PRD
#unset HBRT_PRD
# Compile in hb rt HTMGT : Load/Start OCC
#unset HTMGT
#unset START_OCC_DURING_BOOT
#unset CONSOLE_OUTPUT_OCC_COMM
# PNOR flags
unset PNOR_TWO_SIDE_SUPPORT
set BMC_BT_LPC_IPMI
# AXONE configs must be set until those flags are reworked in Hostboot
set AXONE
set AXONE_BRINGUP
set SUPPORT_EEPROM_CACHING
# Disable checkstop analysis for IPL and runtime scenarios
unset IPLTIME_CHECKSTOP_ANALYSIS
unset ENABLE_CHECKSTOP_ANALYSIS
# set for trace debug to console
set CONSOLE_OUTPUT_TRACE
# TODO Re-enable when able to compile
#set CONSOLE_OUTPUT_FFDCDISPLAY
# Terminate Hostboot when errors occur in manufacturing mode
# (relies on BMC to not trigger reboot)
#unset HANG_ON_MFG_SRC_TERM
set ENABLE_HDAT_IN_HOSTBOOT