Matt Ploetz | 43c30c9 | 2015-02-18 17:17:44 -0600 | [diff] [blame] | 1 | # The Serial Flash Controller is the AST2400 BMC. |
| 2 | set SFC_IS_AST2400 |
| 3 | set BMC_DOES_SFC_INIT |
| 4 | unset SFC_IS_IBM_DPSS |
| 5 | set ALLOW_MICRON_PNOR |
| 6 | set ALLOW_MACRONIX_PNOR |
| 7 | |
| 8 | # VPD options. |
| 9 | set MVPD_READ_FROM_HW |
Matt Ploetz | 26ccac9 | 2015-04-17 08:40:32 -0500 | [diff] [blame] | 10 | set MVPD_WRITE_TO_HW |
| 11 | set MVPD_READ_FROM_PNOR |
Dan Crowell | 199ddae | 2016-05-20 08:42:45 -0500 | [diff] [blame] | 12 | set MVPD_WRITE_TO_PNOR |
Matt Ploetz | 43c30c9 | 2015-02-18 17:17:44 -0600 | [diff] [blame] | 13 | set DJVPD_READ_FROM_HW |
Matt Ploetz | 26ccac9 | 2015-04-17 08:40:32 -0500 | [diff] [blame] | 14 | set DJVPD_WRITE_TO_HW |
| 15 | set DJVPD_READ_FROM_PNOR |
| 16 | set DJVPD_WRITE_TO_PNOR |
Matt Ploetz | 43c30c9 | 2015-02-18 17:17:44 -0600 | [diff] [blame] | 17 | set CVPD_READ_FROM_HW |
Matt Ploetz | 26ccac9 | 2015-04-17 08:40:32 -0500 | [diff] [blame] | 18 | set CVPD_WRITE_TO_HW |
| 19 | set CVPD_READ_FROM_PNOR |
| 20 | set CVPD_WRITE_TO_PNOR |
Bill Schwartz | 2075be0 | 2015-04-30 14:17:52 -0500 | [diff] [blame] | 21 | set PVPD_READ_FROM_HW |
| 22 | set PVPD_WRITE_TO_HW |
| 23 | set PVPD_READ_FROM_PNOR |
| 24 | set PVPD_WRITE_TO_PNOR |
Matt Ploetz | 43c30c9 | 2015-02-18 17:17:44 -0600 | [diff] [blame] | 25 | set SKIP_RESTRICT_EX_UNITS |
Matt Ploetz | 26ccac9 | 2015-04-17 08:40:32 -0500 | [diff] [blame] | 26 | unset CDIMM_FORMAT_FOR_CVPD |
Matt Ploetz | 43c30c9 | 2015-02-18 17:17:44 -0600 | [diff] [blame] | 27 | |
| 28 | # gpio config |
| 29 | set GPIODD |
| 30 | set PALMETTO_VDDR |
| 31 | |
Jay Azurin | 9ec3164 | 2015-08-13 14:21:23 -0500 | [diff] [blame] | 32 | # Enable SBE updates |
| 33 | set SBE_UPDATE_INDEPENDENT |
Matt Ploetz | 43c30c9 | 2015-02-18 17:17:44 -0600 | [diff] [blame] | 34 | |
| 35 | unset PCIE_HOTPLUG_CONTROLLER |
| 36 | |
| 37 | # turn on console output |
| 38 | set CONSOLE |
Richard J. Knight | 4fe380d | 2015-04-30 13:55:27 -0500 | [diff] [blame] | 39 | set BMC_AST2400 |
Matt Ploetz | 43c30c9 | 2015-02-18 17:17:44 -0600 | [diff] [blame] | 40 | |
| 41 | # Enable Kingston dimm voltage workaround |
| 42 | set KINGSTON_1_35_VOLT |
| 43 | |
Chris Cain | 1dc55a8 | 2015-04-17 15:36:48 -0500 | [diff] [blame] | 44 | unset DISABLE_HOSTBOOT_RUNTIME |
Matt Ploetz | 2df1491 | 2015-06-10 14:34:43 -0500 | [diff] [blame] | 45 | |
| 46 | # Compile in hostboot runtime PRD |
| 47 | set HBRT_PRD |
Chris Cain | 1dc55a8 | 2015-04-17 15:36:48 -0500 | [diff] [blame] | 48 | set HTMGT |
| 49 | set START_OCC_DURING_BOOT |
Matt Ploetz | 2df1491 | 2015-06-10 14:34:43 -0500 | [diff] [blame] | 50 | |
| 51 | #PNOR flags |
| 52 | set PNOR_TWO_SIDE_SUPPORT |
| 53 | |
Matt Ploetz | 9855ea4 | 2015-05-28 10:19:18 -0500 | [diff] [blame] | 54 | set BMC_BT_LPC_IPMI |
| 55 | |
Mike Baiocchi | 6adfe3c | 2015-04-23 17:25:14 -0500 | [diff] [blame] | 56 | # Enable Checktop Analysis |
| 57 | set ENABLE_CHECKSTOP_ANALYSIS |
aalugore | d6d2ddb | 2015-10-30 10:08:33 -0500 | [diff] [blame] | 58 | set IPLTIME_CHECKSTOP_ANALYSIS |
Mike Baiocchi | 6adfe3c | 2015-04-23 17:25:14 -0500 | [diff] [blame] | 59 | |
Bill Hoffa | dab65d9 | 2015-06-02 13:39:03 -0500 | [diff] [blame] | 60 | # Hostboot will detect hardware changes |
| 61 | set HOST_HCDB_SUPPORT |
Matt Ploetz | 9855ea4 | 2015-05-28 10:19:18 -0500 | [diff] [blame] | 62 | |
| 63 | # set for trace debug to console |
| 64 | unset CONSOLE_OUTPUT_TRACE |