blob: eb8d12aae56e5a2eaf302d28efe9b833bdb52156 [file] [log] [blame]
Matt Ploetzc4391712015-05-21 16:27:07 -05001From d2bdfed735f6c5e69b606f0251aba131fec4275d Mon Sep 17 00:00:00 2001
2From: Brian Stegmiller <bjs@us.ibm.com>
3Date: Thu, 14 May 2015 13:47:36 -0500
4Subject: [PATCH] ATTN: IPOLL interrupt workaround
5
6Circumvents issue where interrupts happen before OPAL is ready
7to handle them
8
9Change-Id: I3d378cd03dac51aaa5b2f77e8940eb63f170016b
10Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17795
11Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
12Tested-by: Jenkins Server
13---
14 src/usr/diag/attn/common/attnsvc_common.C | 83 +++++++++++++++++++++++++++++--
15 1 file changed, 79 insertions(+), 4 deletions(-)
16
17diff --git a/src/usr/diag/attn/common/attnsvc_common.C b/src/usr/diag/attn/common/attnsvc_common.C
18index c56b8a8..5067438 100644
19--- a/src/usr/diag/attn/common/attnsvc_common.C
20+++ b/src/usr/diag/attn/common/attnsvc_common.C
21@@ -43,6 +43,13 @@ using namespace ERRORLOG;
22
23 namespace ATTN
24 {
25+const uint64_t MCIFIRACT0 = 0x02011846;
26+const uint64_t MCIFIRACT1 = 0x02011847;
27+
28+const uint64_t MCIFIRMASK = 0x02011843;
29+const uint64_t MCIFIRMASK_AND = 0x02011844;
30+const uint64_t MCIFIRMASK_OR = 0x02011845;
31+
32
33 void getPbGp2Mask(uint64_t i_pos, void * i_data)
34 {
35@@ -104,11 +111,11 @@ errlHndl_t ServiceCommon::configureInterrupts(
36 ConfigureMode i_mode)
37 {
38 errlHndl_t err = NULL;
39-
40- TargetHandleList procs;
41+ TargetHandleList procs;
42 getTargetService().getAllChips(procs, TYPE_PROC);
43 TargetHandleList::iterator it = procs.begin();
44
45+
46 while(it != procs.end())
47 {
48 uint64_t mask = 0;
49@@ -172,12 +179,10 @@ errlHndl_t ServiceCommon::configureInterrupts(
50
51 #ifndef __HOSTBOOT_RUNTIME
52 // enable attentions in ipoll mask
53-
54 mask = HostMask::nonHost();
55 mask |= HostMask::host();
56
57 // this doesn't have an and/or reg for some reason...
58-
59 err = modifyScom(*it,
60 IPOLL::address,
61 i_mode == UP ? ~mask : mask,
62@@ -187,6 +192,76 @@ errlHndl_t ServiceCommon::configureInterrupts(
63 {
64 break;
65 }
66+
67+ #else // HOSTBOOT_RUNTIME
68+
69+ if (i_mode == UP)
70+ {
71+ HwasState l_functional;
72+ uint64_t l_mciAct0 = 0;
73+ uint64_t l_mciAct1 = 0;
74+ uint64_t l_mciBitMask = 0;
75+ TargetHandleList l_mcsList;
76+ // Get list of MCS units associated with this proc
77+ getTargetService().getMcsList( *it, l_mcsList );
78+
79+ // We need to set/clear mask bits in the MCIFIRs that
80+ // are associated with host attentions. This should
81+ // cause interrupts to re-occur if they had happened
82+ // prior to starting the opal-prd application.
83+ TargetHandleList::iterator l_mcsIt = l_mcsList.begin();
84+
85+ while(l_mcsIt != l_mcsList.end())
86+ {
87+ // Make sure functional prior to using
88+ if (!((*l_mcsIt)->tryGetAttr<ATTR_HWAS_STATE>(l_functional)))
89+ {
90+ // Can't tell if functional so skip this MCS
91+ break;
92+ }
93+
94+ if ( !(l_functional.functional) )
95+ {
96+ // Not functional MCS so skip it
97+ break;
98+ }
99+
100+ // Read ACTION registers to see if HOST ATTN
101+ err = getScom(*l_mcsIt, MCIFIRACT0, l_mciAct0);
102+
103+ if (NULL == err)
104+ {
105+ err = getScom(*l_mcsIt, MCIFIRACT1, l_mciAct1);
106+ }
107+
108+ if (NULL == err)
109+ {
110+ // Create bit mask we will use to write to MCIFIR
111+ // (ACT0=1, ACT1=0) indicate bits we want
112+ l_mciBitMask = l_mciAct0 & ~l_mciAct1;
113+ // Set mask bits
114+ err = putScom(*l_mcsIt, MCIFIRMASK_OR, l_mciBitMask);
115+ }
116+
117+ if (NULL == err)
118+ {
119+ // Clear mask bits
120+ err = putScom(*l_mcsIt, MCIFIRMASK_AND, ~l_mciBitMask);
121+ }
122+
123+ // Commit any failure we had and move to next MCS unit
124+ if (NULL != err)
125+ {
126+ errlCommit(err, ATTN_COMP_ID);
127+ }
128+
129+ l_mcsIt++;
130+
131+ } // end while on MCS units
132+
133+ l_mcsList.clear();
134+ } // end if UP MODE -- enabling
135+
136 #endif //__HOSTBOOT_RUNTIME
137
138 ++it;
139--
1401.8.2.2
141