Brian Silver | 137a00a | 2014-11-11 12:09:53 -0600 | [diff] [blame] | 1 | # The Serial Flash Controller is the AST2400 BMC. |
| 2 | set SFC_IS_AST2400 |
| 3 | set BMC_DOES_SFC_INIT |
| 4 | unset SFC_IS_IBM_DPSS |
| 5 | set ALLOW_MICRON_PNOR |
| 6 | set ALLOW_MACRONIX_PNOR |
| 7 | |
| 8 | # VPD options. |
| 9 | set MVPD_READ_FROM_HW |
| 10 | unset MVPD_READ_FROM_PNOR |
| 11 | set DJVPD_READ_FROM_HW |
| 12 | unset DJVPD_READ_FROM_PNOR |
| 13 | set CVPD_READ_FROM_HW |
| 14 | #set CVPD_WRITE_TO_HW |
| 15 | unset CVPD_READ_FROM_PNOR |
| 16 | set SKIP_RESTRICT_EX_UNITS |
| 17 | |
| 18 | # gpio config |
| 19 | set GPIODD |
| 20 | set PALMETTO_VDDR |
| 21 | |
Andrew Geissler | 62864f6 | 2015-02-27 14:49:28 -0600 | [diff] [blame] | 22 | # to disable sbe updates |
Brian Silver | 137a00a | 2014-11-11 12:09:53 -0600 | [diff] [blame] | 23 | set NO_SBE_UPDATES |
| 24 | |
Andrew Geissler | 62864f6 | 2015-02-27 14:49:28 -0600 | [diff] [blame] | 25 | # Enable SBE updates |
| 26 | #set SBE_UPDATE_INDEPENDENT |
| 27 | |
Brian Silver | 137a00a | 2014-11-11 12:09:53 -0600 | [diff] [blame] | 28 | unset PCIE_HOTPLUG_CONTROLLER |
| 29 | |
| 30 | # turn on console output |
| 31 | set CONSOLE |
| 32 | set CONSOLE_AST2400 |
| 33 | |
| 34 | # Enable Kingston dimm voltage workaround |
| 35 | set KINGSTON_1_35_VOLT |
| 36 | |
| 37 | set NO_DMI_EREPAIR |
| 38 | set DISABLE_HOSTBOOT_RUNTIME |
Andrew Geissler | 5a28eaa | 2014-12-18 11:50:42 -0600 | [diff] [blame] | 39 | |
| 40 | # OCC Enablment flags |
Andrew Geissler | 590f263 | 2014-12-18 14:15:01 -0600 | [diff] [blame] | 41 | unset SET_NOMINAL_PSTATE |
| 42 | set HTMGT |
| 43 | set START_OCC_DURING_BOOT |
Matt Ploetz | 19aba25 | 2015-02-24 20:30:13 -0600 | [diff] [blame] | 44 | |
| 45 | #PNOR flags |
| 46 | set PNOR_TWO_SIDE_SUPPORT |
Andrew Geissler | 558fdb6 | 2015-02-26 17:56:14 -0600 | [diff] [blame] | 47 | |
| 48 | set BMC_BT_LPC_IPMI |
| 49 | |
| 50 | # set for trace debug to console |
| 51 | unset CONSOLE_OUTPUT_TRACE |