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gerrit.openbmc.org / premsjha / op-build / 4711f0176938c88932c17ec17618c4b5ccc9998f / . / openpower / package / hostboot / p9Patches / hostboot-0011-Revert-Handling-of-functional-NX-chiplet.patch
blob: 8d642442125a92eb1a42e9d3598f1565a040acd1 [file] [log] [blame]
Bill Hoffa5f0c0c12017-06-02 10:37:32 -0500[diff] [blame]1From 569a650085d4ea7cf87c88ec5542ff31477e8c6d Mon Sep 17 00:00:00 2001
2From: Bill Hoffa <wghoffa@us.ibm.com>
3Date: Fri, 2 Jun 2017 10:32:27 -0500
4Subject: [PATCH] Revert "Handling of functional NX chiplet"
5
6This reverts commit 392272c0247878a832473157e7d2e6023496ca99.
7---
8 src/include/usr/hwas/common/hwas_reasoncodes.H | 1 -
9 src/usr/hwas/common/hwas.C | 51 ------------------------
10 src/usr/isteps/istep10/call_host_rng_bist.C | 53 ++++++-------------------
11 src/usr/isteps/istep16/call_host_secure_rng.C | 55 +++++++-------------------
12 4 files changed, 28 insertions(+), 132 deletions(-)
13
14diff --git a/src/include/usr/hwas/common/hwas_reasoncodes.H b/src/include/usr/hwas/common/hwas_reasoncodes.H
15index 1c3a789..667ac6c 100644
16--- a/src/include/usr/hwas/common/hwas_reasoncodes.H
17+++ b/src/include/usr/hwas/common/hwas_reasoncodes.H
18@@ -55,7 +55,6 @@ namespace HWAS
19 RC_SYSAVAIL_MISSING_CRITICAL_RESOURCE = HWAS_COMP_ID | 0x0B,
20 RC_SYSAVAIL_NO_MCAS_FUNC = HWAS_COMP_ID | 0x0C,
21 RC_SYSAVAIL_NO_MEMORY_FUNC_MASTER = HWAS_COMP_ID | 0x0D,
22- RC_SYSAVAIL_NO_NX_FUNC = HWAS_COMP_ID | 0x0E,
23 };
24 };
25
26diff --git a/src/usr/hwas/common/hwas.C b/src/usr/hwas/common/hwas.C
27index 9908ef8..79d541b 100644
28--- a/src/usr/hwas/common/hwas.C
29+++ b/src/usr/hwas/common/hwas.C
30@@ -1881,57 +1881,6 @@ errlHndl_t checkMinimumHardware(const TARGETING::ConstTargetHandle_t i_nodeOrSys
31 // errl is now NULL
32 }
33 }
34-
35- // check for functional NX chiplets
36- TargetHandleList l_functionalNXChiplets;
37- getChildChiplets(l_functionalNXChiplets, pTop, TYPE_NX, true);
38- HWAS_DBG( "checkMinimumHardware: %d NX chiplets",
39- l_functionalNXChiplets.size());
40-
41- if (l_functionalNXChiplets.empty())
42- {
43- HWAS_ERR( "Insufficient hardware to continue IPL (NX chiplets)");
44-
45- if(o_bootable)
46- {
47- *o_bootable = false;
48- break;
49- }
50- TargetHandleList l_presentNXChiplets;
51- getChildChiplets(l_presentNXChiplets, pTop, TYPE_NX, false);
52- uint32_t nx_present = l_presentNXChiplets.size();
53-
54- /*@
55- * @errortype
56- * @severity ERRL_SEV_UNRECOVERABLE
57- * @moduleid MOD_CHECK_MIN_HW
58- * @reasoncode RC_SYSAVAIL_NO_NX_FUNC
59- * @devdesc checkMinimumHardware found no
60- * functional NX chiplets
61- * @custdesc Insufficient hardware to continue IPL
62- * @userdata1[00:31] HUID of node
63- * @userdata2[00:31] number of present nonfunctional NX chiplets
64- */
65- const uint64_t userdata1 =
66- (static_cast<uint64_t>(get_huid(pTop)) << 32);
67- const uint64_t userdata2 =
68- (static_cast<uint64_t>(nx_present) << 32);
69- l_errl = hwasError(ERRL_SEV_UNRECOVERABLE,
70- MOD_CHECK_MIN_HW,
71- RC_SYSAVAIL_NO_NX_FUNC,
72- userdata1, userdata2);
73-
74- // call out the procedure to find the deconfigured part.
75- hwasErrorAddProcedureCallout( l_errl,
76- EPUB_PRC_FIND_DECONFIGURED_PART,
77- SRCI_PRIORITY_HIGH );
78-
79- // if we already have an error, link this one to the earlier;
80- // if not, set the common plid
81- hwasErrorUpdatePlid( l_errl, l_commonPlid );
82- errlCommit(l_errl, HWAS_COMP_ID);
83- }
84-
85 // ------------------------------------------------------------
86 // Check for Mirrored memory -
87 // If the user requests mirrored memory and we do not have it,
88diff --git a/src/usr/isteps/istep10/call_host_rng_bist.C b/src/usr/isteps/istep10/call_host_rng_bist.C
89index 68d2435..b1ccc51 100644
90--- a/src/usr/isteps/istep10/call_host_rng_bist.C
91+++ b/src/usr/isteps/istep10/call_host_rng_bist.C
92@@ -42,7 +42,6 @@
93
94 #include <isteps/hwpisteperror.H>
95 #include <errl/errludtarget.H>
96-#include <errl/errlreasoncodes.H>
97
98 #include <initservice/isteps_trace.H>
99 #include <initservice/initserviceif.H>
100@@ -87,49 +86,23 @@ void* call_host_rng_bist( void *io_pArgs )
101 // Loop through all processors including master
102 for (const auto & l_cpu_target: l_cpuTargetList)
103 {
104- const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>l_fapi2_proc_target(
105+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>l_fapi2_proc_target(
106 l_cpu_target);
107- // Check for functional NX
108- TARGETING::TargetHandleList l_nxTargetList;
109- getChildChiplets(l_nxTargetList, l_cpu_target, TYPE_NX, true);
110- if (l_nxTargetList.empty())
111- {
112- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
113- "p9_rng_init_phase1: no functional NX found for proc %.8X",
114- TARGETING::get_huid(l_cpu_target));
115- continue;
116- }
117- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
118+
119+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
120 "Running p9_rng_init_phase1 HWP on processor target %.8X",
121 TARGETING::get_huid(l_cpu_target) );
122
123- FAPI_INVOKE_HWP(l_err, p9_rng_init_phase1, l_fapi2_proc_target);
124- if(l_err)
125- {
126- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
127- "ERROR: call p9_rng_init_phase1, PLID=0x%x, rc=0x%.4X",
128- l_err->plid(), l_err->reasonCode());
129-
130- for (const auto l_callout : l_err->getUDSections(
131- HWPF_COMP_ID,
132- ERRORLOG::ERRL_UDT_CALLOUT))
133- {
134- if(reinterpret_cast<HWAS::callout_ud_t*>
135- (l_callout)->type == HWAS::HW_CALLOUT)
136- {
137- for (const auto & l_nxTarget: l_nxTargetList)
138- {
139- l_err->addHwCallout( l_nxTarget,
140- HWAS::SRCI_PRIORITY_HIGH,
141- HWAS::DECONFIG,
142- HWAS::GARD_NULL );
143- }
144- }
145- }
146-
147- l_StepError.addErrorDetails(l_err);
148- errlCommit(l_err, HWPF_COMP_ID);
149- }
150+ FAPI_INVOKE_HWP(l_err, p9_rng_init_phase1, l_fapi2_proc_target);
151+ if(l_err)
152+ {
153+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
154+ "ERROR: call p9_rng_init_phase1, PLID=0x%x",
155+ l_err->plid());
156+ l_StepError.addErrorDetails(l_err);
157+ errlCommit(l_err, HWPF_COMP_ID);
158+ }
159+
160 } // end of going through all processors
161
162 TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
163diff --git a/src/usr/isteps/istep16/call_host_secure_rng.C b/src/usr/isteps/istep16/call_host_secure_rng.C
164index 9ca7e0f..5a51504 100644
165--- a/src/usr/isteps/istep16/call_host_secure_rng.C
166+++ b/src/usr/isteps/istep16/call_host_secure_rng.C
167@@ -45,7 +45,6 @@
168
169 #include <isteps/hwpisteperror.H>
170 #include <errl/errludtarget.H>
171-#include <errl/errlreasoncodes.H>
172
173 #include <initservice/isteps_trace.H>
174 #include <initservice/initserviceif.H>
175@@ -90,47 +89,23 @@ void* call_host_secure_rng( void *io_pArgs )
176 // Loop through all processors including master
177 for (const auto & l_cpu_target: l_cpuTargetList)
178 {
179- const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>l_fapi2_proc_target(
180+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>l_fapi2_proc_target(
181 l_cpu_target);
182
183- // Check for functional NX
184- TARGETING::TargetHandleList l_nxTargetList;
185- getChildChiplets(l_nxTargetList, l_cpu_target, TYPE_NX, true);
186- if (l_nxTargetList.empty())
187- {
188- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
189- "Running host_secure_rng; no functional NX found for proc %.8X",
190- TARGETING::get_huid(l_cpu_target));
191- continue;
192- }
193-
194- FAPI_INVOKE_HWP(l_err, p9_rng_init_phase2, l_fapi2_proc_target);
195- if(l_err)
196- {
197- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
198- "ERROR: call p9_rng_init_phase2, PLID=0x%x, rc=0x%.4X",
199- l_err->plid(), l_err->reasonCode());
200-
201- for (const auto l_callout : l_err->getUDSections(
202- HWPF_COMP_ID,
203- ERRORLOG::ERRL_UDT_CALLOUT))
204- {
205- if(reinterpret_cast<HWAS::callout_ud_t*>
206- (l_callout)->type == HWAS::HW_CALLOUT)
207- {
208- for (const auto & l_nxTarget: l_nxTargetList)
209- {
210- l_err->addHwCallout( l_nxTarget,
211- HWAS::SRCI_PRIORITY_HIGH,
212- HWAS::DECONFIG,
213- HWAS::GARD_NULL );
214- }
215- }
216- }
217-
218- l_StepError.addErrorDetails(l_err);
219- errlCommit(l_err, HWPF_COMP_ID);
220- }
221+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
222+ "Running host_secure_rng HWP on processor target %.8X",
223+ TARGETING::get_huid(l_cpu_target) );
224+
225+ FAPI_INVOKE_HWP(l_err, p9_rng_init_phase2, l_fapi2_proc_target);
226+ if(l_err)
227+ {
228+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
229+ "ERROR: call p9_rng_init_phase2, PLID=0x%x",
230+ l_err->plid());
231+ l_StepError.addErrorDetails(l_err);
232+ errlCommit(l_err, HWPF_COMP_ID);
233+ }
234+
235 } // end of going through all processors
236
237 TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
238--
2391.8.2.2
240