| Bill Hoffa | 5f93f1d | 2014-06-26 21:02:48 -0500 | [diff] [blame] | 1 | # The Serial Flash Controller is the AST2400 BMC. |
| Brian Silver | 131189b | 2014-11-10 08:11:22 -0600 | [diff] [blame] | 2 | set SFC_IS_AST2400 |
| 3 | set BMC_DOES_SFC_INIT | ||||
| Bill Hoffa | 5f93f1d | 2014-06-26 21:02:48 -0500 | [diff] [blame] | 4 | unset SFC_IS_IBM_DPSS |
| Brian Silver | 131189b | 2014-11-10 08:11:22 -0600 | [diff] [blame] | 5 | set ALLOW_MICRON_PNOR |
| 6 | set ALLOW_MACRONIX_PNOR | ||||
| Bill Hoffa | 5f93f1d | 2014-06-26 21:02:48 -0500 | [diff] [blame] | 7 | |
| 8 | # VPD options. | ||||
| Brian Silver | 131189b | 2014-11-10 08:11:22 -0600 | [diff] [blame] | 9 | set MVPD_READ_FROM_HW |
| Andrew Geissler | 19d408c | 2015-02-28 13:51:47 -0600 | [diff] [blame] | 10 | set MVPD_WRITE_TO_HW |
| 11 | set MVPD_READ_FROM_PNOR | ||||
| 12 | set MVPD_WRITE_FROM_PNOR | ||||
| Brian Silver | 131189b | 2014-11-10 08:11:22 -0600 | [diff] [blame] | 13 | set DJVPD_READ_FROM_HW |
| Andrew Geissler | 19d408c | 2015-02-28 13:51:47 -0600 | [diff] [blame] | 14 | set DJVPD_WRITE_TO_HW |
| 15 | set DJVPD_READ_FROM_PNOR | ||||
| 16 | set DJVPD_WRITE_TO_PNOR | ||||
| Brian Silver | 131189b | 2014-11-10 08:11:22 -0600 | [diff] [blame] | 17 | set CVPD_READ_FROM_HW |
| Andrew Geissler | 19d408c | 2015-02-28 13:51:47 -0600 | [diff] [blame] | 18 | set CVPD_WRITE_TO_HW |
| 19 | set CVPD_READ_FROM_PNOR | ||||
| 20 | set CVPD_WRITE_TO_PNOR | ||||
| Bill Hoffa | 5f93f1d | 2014-06-26 21:02:48 -0500 | [diff] [blame] | 21 | set SKIP_RESTRICT_EX_UNITS |
| Andrew Geissler | 19d408c | 2015-02-28 13:51:47 -0600 | [diff] [blame] | 22 | unset CDIMM_FORMAT_FOR_CVPD |
| Bill Hoffa | 5f93f1d | 2014-06-26 21:02:48 -0500 | [diff] [blame] | 23 | |
| 24 | # gpio config | ||||
| 25 | set GPIODD | ||||
| 26 | set PALMETTO_VDDR | ||||
| 27 | |||||
| Andrew Geissler | 62864f6 | 2015-02-27 14:49:28 -0600 | [diff] [blame] | 28 | # to disable sbe updates |
| Andrew Geissler | ff7983f | 2015-03-01 09:39:29 -0600 | [diff] [blame] | 29 | #set NO_SBE_UPDATES |
| Andrew Geissler | 62864f6 | 2015-02-27 14:49:28 -0600 | [diff] [blame] | 30 | # Enable SBE updates |
| Andrew Geissler | ff7983f | 2015-03-01 09:39:29 -0600 | [diff] [blame] | 31 | set SBE_UPDATE_INDEPENDENT |
| Patrick Williams | e092373 | 2014-09-25 17:37:46 -0500 | [diff] [blame] | 32 | |
| Patrick Williams | e092373 | 2014-09-25 17:37:46 -0500 | [diff] [blame] | 33 | unset PCIE_HOTPLUG_CONTROLLER |
| Brian Silver | 131189b | 2014-11-10 08:11:22 -0600 | [diff] [blame] | 34 | |
| 35 | # turn on console output | ||||
| 36 | set CONSOLE | ||||
| 37 | set CONSOLE_AST2400 | ||||
| 38 | |||||
| 39 | set PNOR_IS_32MB | ||||
| 40 | |||||
| 41 | set NO_DMI_EREPAIR | ||||
| Andrew Geissler | 19d408c | 2015-02-28 13:51:47 -0600 | [diff] [blame] | 42 | unset DISABLE_HOSTBOOT_RUNTIME |
| Andrew Geissler | 590f263 | 2014-12-18 14:15:01 -0600 | [diff] [blame] | 43 | |
| Andrew Geissler | b131459 | 2015-03-01 22:11:03 -0600 | [diff] [blame] | 44 | # Compile in hostboot runtime PRD |
| 45 | set HBRT_PRD | ||||
| 46 | |||||
| Andrew Geissler | 590f263 | 2014-12-18 14:15:01 -0600 | [diff] [blame] | 47 | # OCC Enablment flags |
| 48 | unset SET_NOMINAL_PSTATE | ||||
| Andrew Geissler | f14815a | 2014-12-14 18:54:10 -0600 | [diff] [blame] | 49 | set HTMGT |
| 50 | set START_OCC_DURING_BOOT | ||||
| Andrew Geissler | 558fdb6 | 2015-02-26 17:56:14 -0600 | [diff] [blame] | 51 | |
| 52 | set BMC_BT_LPC_IPMI | ||||
| 53 | |||||
| Mike Baiocchi | 6adfe3c | 2015-04-23 17:25:14 -0500 | [diff] [blame^] | 54 | # Enable Checktop Analysis |
| 55 | set ENABLE_CHECKSTOP_ANALYSIS | ||||
| 56 | |||||
| Andrew Geissler | 558fdb6 | 2015-02-26 17:56:14 -0600 | [diff] [blame] | 57 | # set for trace debug to console |
| 58 | unset CONSOLE_OUTPUT_TRACE | ||||