| Joel Stanley | e50183f | 2017-02-28 12:17:46 +1030 | [diff] [blame] | 1 | From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 |
| 2 | From: "Y.C. Chen" <yc_chen@aspeedtech.com> |
| 3 | Date: Thu, 23 Feb 2017 15:52:33 +0800 |
| 4 | Subject: [PATCH 03/15] drm/ast: Fix AST2400 POST failure without BMC FW or |
| 5 | VBIOS |
| 6 | |
| 7 | The current POST code for the AST2300/2400 family doesn't work properly |
| 8 | if the chip hasn't been initialized previously by either the BMC own FW |
| 9 | or the VBIOS. This fixes it. |
| 10 | |
| 11 | Signed-off-by: Y.C. Chen <yc_chen@aspeedtech.com> |
| 12 | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
| 13 | Signed-off-by: Joel Stanley <joel@jms.id.au> |
| 14 | --- |
| 15 | drivers/gpu/drm/ast/ast_post.c | 38 +++++++++++++++++++++++++++++++++++--- |
| 16 | 1 file changed, 35 insertions(+), 3 deletions(-) |
| 17 | |
| 18 | diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c |
| 19 | index 5331ee1df086..6c5391cb90eb 100644 |
| 20 | --- a/drivers/gpu/drm/ast/ast_post.c |
| 21 | +++ b/drivers/gpu/drm/ast/ast_post.c |
| 22 | @@ -1638,12 +1638,44 @@ static void ast_init_dram_2300(struct drm_device *dev) |
| 23 | temp |= 0x73; |
| 24 | ast_write32(ast, 0x12008, temp); |
| 25 | |
| 26 | + param.dram_freq = 396; |
| 27 | param.dram_type = AST_DDR3; |
| 28 | + temp = ast_mindwm(ast, 0x1e6e2070); |
| 29 | if (temp & 0x01000000) |
| 30 | param.dram_type = AST_DDR2; |
| 31 | - param.dram_chipid = ast->dram_type; |
| 32 | - param.dram_freq = ast->mclk; |
| 33 | - param.vram_size = ast->vram_size; |
| 34 | + switch (temp & 0x18000000) { |
| 35 | + case 0: |
| 36 | + param.dram_chipid = AST_DRAM_512Mx16; |
| 37 | + break; |
| 38 | + default: |
| 39 | + case 0x08000000: |
| 40 | + param.dram_chipid = AST_DRAM_1Gx16; |
| 41 | + break; |
| 42 | + case 0x10000000: |
| 43 | + param.dram_chipid = AST_DRAM_2Gx16; |
| 44 | + break; |
| 45 | + case 0x18000000: |
| 46 | + param.dram_chipid = AST_DRAM_4Gx16; |
| 47 | + break; |
| 48 | + } |
| 49 | + switch (temp & 0x0c) { |
| 50 | + default: |
| 51 | + case 0x00: |
| 52 | + param.vram_size = AST_VIDMEM_SIZE_8M; |
| 53 | + break; |
| 54 | + |
| 55 | + case 0x04: |
| 56 | + param.vram_size = AST_VIDMEM_SIZE_16M; |
| 57 | + break; |
| 58 | + |
| 59 | + case 0x08: |
| 60 | + param.vram_size = AST_VIDMEM_SIZE_32M; |
| 61 | + break; |
| 62 | + |
| 63 | + case 0x0c: |
| 64 | + param.vram_size = AST_VIDMEM_SIZE_64M; |
| 65 | + break; |
| 66 | + } |
| 67 | |
| 68 | if (param.dram_type == AST_DDR3) { |
| 69 | get_ddr3_info(ast, ¶m); |
| 70 | -- |
| 71 | 2.11.0 |
| 72 | |