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gerrit.openbmc.org / stefanberger / openbmc / 10fa14942b9cb27780f9496382107516639208b4 / . / meta-xilinx / meta-microblaze / recipes-devtools / gcc / gcc-10 / 0038-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
blob: 57905e66c6600d4405566e633ecf99c7dc2f0f82 [file] [log] [blame]
Andrew Geissler10fa1492020-12-11 16:25:29 -0600[diff] [blame^]1From 10d59c50195cff30c4e74959ef4cebc9065808a4 Mon Sep 17 00:00:00 2001
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]2From: Nagaraju Mekala <nmekala@xilix.com>
3Date: Sat, 13 Oct 2018 21:12:43 +0530
Andrew Geissler10fa1492020-12-11 16:25:29 -0600[diff] [blame^]4Subject: [PATCH 38/54] Fixed the load store issue with the 32bit arith
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]5 libraries
6
7---
8 libgcc/config/microblaze/divsi3.S | 25 ++++++++++++++++++++++++-
9 libgcc/config/microblaze/modsi3.S | 26 +++++++++++++++++++++++++-
10 libgcc/config/microblaze/mulsi3.S | 3 +++
11 libgcc/config/microblaze/udivsi3.S | 24 +++++++++++++++++++++++-
12 libgcc/config/microblaze/umodsi3.S | 24 +++++++++++++++++++++++-
13 5 files changed, 98 insertions(+), 4 deletions(-)
14
15diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S
Andrew Geisslera9ff2b32020-10-16 10:11:54 -0500[diff] [blame]16index bb047094e2f..104243e35fe 100644
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]17--- a/libgcc/config/microblaze/divsi3.S
18+++ b/libgcc/config/microblaze/divsi3.S
19@@ -41,6 +41,17 @@
20 .globl __divsi3
21 .ent __divsi3
22 .type __divsi3,@function
23+#ifdef __arch64__
24+ .align 3
25+__divsi3:
26+ .frame r1,0,r15
27+
28+ ADDIK r1,r1,-32
29+ SLI r28,r1,0
30+ SLI r29,r1,8
31+ SLI r30,r1,16
32+ SLI r31,r1,24
33+#else
34 __divsi3:
35 .frame r1,0,r15
36
37@@ -49,7 +60,7 @@ __divsi3:
38 SWI r29,r1,4
39 SWI r30,r1,8
40 SWI r31,r1,12
41-
42+#endif
43 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
44 BEQI r5,$LaResult_Is_Zero # Result is Zero
45 BGEID r5,$LaR5_Pos
46@@ -89,6 +100,17 @@ $LaLOOP_END:
47 $LaDiv_By_Zero:
48 $LaResult_Is_Zero:
49 OR r3,r0,r0 # set result to 0
50+#ifdef __arch64__
51+$LaRETURN_HERE:
52+# Restore values of CSRs and that of r3 and the divisor and the dividend
53+ LLI r28,r1,0
54+ LLI r29,r1,8
55+ LLI r30,r1,16
56+ LLI r31,r1,24
57+ ADDLIK r1,r1,32
58+ RTSD r15,8
59+ NOP
60+#else
61 $LaRETURN_HERE:
62 # Restore values of CSRs and that of r3 and the divisor and the dividend
63 LWI r28,r1,0
64@@ -97,6 +119,7 @@ $LaRETURN_HERE:
65 LWI r31,r1,12
66 RTSD r15,8
67 ADDIK r1,r1,16
68+#endif
69 .end __divsi3
70 .size __divsi3, . - __divsi3
71
72diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
Andrew Geisslera9ff2b32020-10-16 10:11:54 -0500[diff] [blame]73index 9692ff310ff..9500d64bdc0 100644
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]74--- a/libgcc/config/microblaze/modsi3.S
75+++ b/libgcc/config/microblaze/modsi3.S
76@@ -41,6 +41,17 @@
77 .globl __modsi3
78 .ent __modsi3
79 .type __modsi3,@function
80+#ifdef __arch64__
81+ .align 3
82+__modsi3:
83+ .frame r1,0,r15
84+
85+ addlik r1,r1,-32
86+ sli r28,r1,0
87+ sli r29,r1,8
88+ sli r30,r1,16
89+ sli r31,r1,24
90+#else
91 __modsi3:
92 .frame r1,0,r15
93
94@@ -49,6 +60,7 @@ __modsi3:
95 swi r29,r1,4
96 swi r30,r1,8
97 swi r31,r1,12
98+#endif
99
100 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
101 BEQI r5,$LaResult_Is_Zero # Result is Zero
102@@ -88,6 +100,18 @@ $LaLOOP_END:
103 $LaDiv_By_Zero:
104 $LaResult_Is_Zero:
105 or r3,r0,r0 # set result to 0 [Both mod as well as div are 0]
106+
107+#ifdef __arch64__
108+$LaRETURN_HERE:
109+# Restore values of CSRs and that of r3 and the divisor and the dividend
110+ lli r28,r1,0
111+ lli r29,r1,8
112+ lli r30,r1,16
113+ lli r31,r1,24
114+ addik r1,r1,32
115+ rtsd r15,8
116+ nop
117+#else
118 $LaRETURN_HERE:
119 # Restore values of CSRs and that of r3 and the divisor and the dividend
120 lwi r28,r1,0
121@@ -95,7 +119,7 @@ $LaRETURN_HERE:
122 lwi r30,r1,8
123 lwi r31,r1,12
124 rtsd r15,8
125- addik r1,r1,16
126+#endif
127 .end __modsi3
128 .size __modsi3, . - __modsi3
129
130diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S
Andrew Geisslera9ff2b32020-10-16 10:11:54 -0500[diff] [blame]131index cb3b6b8321f..2044399db4a 100644
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]132--- a/libgcc/config/microblaze/mulsi3.S
133+++ b/libgcc/config/microblaze/mulsi3.S
134@@ -41,6 +41,9 @@
135 .globl __mulsi3
136 .ent __mulsi3
137 .type __mulsi3,@function
138+#ifdef __arch64__
139+ .align 3
140+#endif
141 __mulsi3:
142 .frame r1,0,r15
143 add r3,r0,r0
144diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S
Andrew Geisslera9ff2b32020-10-16 10:11:54 -0500[diff] [blame]145index ee2bdd0950d..d2332bcfe62 100644
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]146--- a/libgcc/config/microblaze/udivsi3.S
147+++ b/libgcc/config/microblaze/udivsi3.S
148@@ -41,6 +41,16 @@
149 .globl __udivsi3
150 .ent __udivsi3
151 .type __udivsi3,@function
152+#ifdef __arch64__
153+ .align 3
154+__udivsi3:
155+ .frame r1,0,r15
156+
157+ ADDLIK r1,r1,-24
158+ SLI r29,r1,0
159+ SLI r30,r1,8
160+ SLI r31,r1,16
161+#else
162 __udivsi3:
163 .frame r1,0,r15
164
165@@ -48,7 +58,7 @@ __udivsi3:
166 SWI r29,r1,0
167 SWI r30,r1,4
168 SWI r31,r1,8
169-
170+#endif
171 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
172 BEQID r5,$LaResult_Is_Zero # Result is Zero
173 ADDIK r30,r0,0 # Clear mod
174@@ -98,6 +108,17 @@ $LaLOOP_END:
175 $LaDiv_By_Zero:
176 $LaResult_Is_Zero:
177 OR r3,r0,r0 # set result to 0
178+
179+#ifdef __arch64__
180+$LaRETURN_HERE:
181+ # Restore values of CSRs and that of r3 and the divisor and the dividend
182+ LLI r29,r1,0
183+ LLI r30,r1,8
184+ LLI r31,r1,16
185+ ADDIK r1,r1,24
186+ RTSD r15,8
187+ NOP
188+#else
189 $LaRETURN_HERE:
190 # Restore values of CSRs and that of r3 and the divisor and the dividend
191 LWI r29,r1,0
192@@ -105,5 +126,6 @@ $LaRETURN_HERE:
193 LWI r31,r1,8
194 RTSD r15,8
195 ADDIK r1,r1,12
196+#endif
197 .end __udivsi3
198 .size __udivsi3, . - __udivsi3
199diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
Andrew Geisslera9ff2b32020-10-16 10:11:54 -0500[diff] [blame]200index 12c082f6417..30bd8c20b58 100644
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]201--- a/libgcc/config/microblaze/umodsi3.S
202+++ b/libgcc/config/microblaze/umodsi3.S
203@@ -41,6 +41,16 @@
204 .globl __umodsi3
205 .ent __umodsi3
206 .type __umodsi3,@function
207+#ifdef __arch64__
208+ .align 3
209+__umodsi3:
210+ .frame r1,0,r15
211+
212+ addik r1,r1,-24
213+ swi r29,r1,0
214+ swi r30,r1,8
215+ swi r31,r1,16
216+#else
217 __umodsi3:
218 .frame r1,0,r15
219
220@@ -48,7 +58,7 @@ __umodsi3:
221 swi r29,r1,0
222 swi r30,r1,4
223 swi r31,r1,8
224-
225+#endif
226 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
227 BEQId r5,$LaResult_Is_Zero # Result is Zero
228 ADDIK r3,r0,0 # Clear div
229@@ -101,6 +111,17 @@ $LaLOOP_END:
230 $LaDiv_By_Zero:
231 $LaResult_Is_Zero:
232 or r3,r0,r0 # set result to 0
233+
234+#ifdef __arch64__
235+$LaRETURN_HERE:
236+# Restore values of CSRs and that of r3 and the divisor and the dividend
237+ lli r29,r1,0
238+ lli r30,r1,8
239+ lli r31,r1,16
240+ addlik r1,r1,24
241+ rtsd r15,8
242+ nop
243+#else
244 $LaRETURN_HERE:
245 # Restore values of CSRs and that of r3 and the divisor and the dividend
246 lwi r29,r1,0
247@@ -108,5 +129,6 @@ $LaRETURN_HERE:
248 lwi r31,r1,8
249 rtsd r15,8
250 addik r1,r1,12
251+#endif
252 .end __umodsi3
253 .size __umodsi3, . - __umodsi3
254--
Andrew Geisslera9ff2b32020-10-16 10:11:54 -0500[diff] [blame]2552.17.1
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame]256