blob: c21ca816f6cfed046d2ea64e6c8d0b4a55458a10 [file] [log] [blame]
Brad Bishop286d45c2018-10-02 15:21:57 -04001From c1e8a1419e8f5d18e7135fb4fe3bf21941125008 Mon Sep 17 00:00:00 2001
2From: Mahesh Bodapati <mbodapat@xilinx.com>
3Date: Sat, 26 Aug 2017 19:21:24 -0700
4Subject: [PATCH] Fix atomic side effects.
5
6In atomic_compare_and_swapsi, add side effects to prevent incorrect
7assumptions during optimization. Previously, the outputs were considered
8unused; this generated assembly code with undefined side effects after
9invocation of the atomic.
10
11Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com>
12Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
13Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com>
14Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
15Upstream-Status: Pending
16---
17 gcc/config/microblaze/microblaze.md | 3 +++
18 gcc/config/microblaze/sync.md | 21 +++++++++++++--------
19 2 files changed, 16 insertions(+), 8 deletions(-)
20
21diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
22index 8a372d7ebb..59d629b559 100644
23--- a/gcc/config/microblaze/microblaze.md
24+++ b/gcc/config/microblaze/microblaze.md
25@@ -41,6 +41,9 @@
26 (UNSPEC_CMP 104) ;; signed compare
27 (UNSPEC_CMPU 105) ;; unsigned compare
28 (UNSPEC_TLS 106) ;; jump table
29+ (UNSPECV_CAS_BOOL 201) ;; compare and swap (bool)
30+ (UNSPECV_CAS_VAL 202) ;; compare and swap (val)
31+ (UNSPECV_CAS_MEM 203) ;; compare and swap (mem)
32 ])
33
34 (define_c_enum "unspec" [
35diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md
36index 8125bd8d63..edf4bdd811 100644
37--- a/gcc/config/microblaze/sync.md
38+++ b/gcc/config/microblaze/sync.md
39@@ -18,14 +18,19 @@
40 ;; <http://www.gnu.org/licenses/>.
41
42 (define_insn "atomic_compare_and_swapsi"
43- [(match_operand:SI 0 "register_operand" "=&d") ;; bool output
44- (match_operand:SI 1 "register_operand" "=&d") ;; val output
45- (match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory
46- (match_operand:SI 3 "register_operand" "d") ;; expected value
47- (match_operand:SI 4 "register_operand" "d") ;; desired value
48- (match_operand:SI 5 "const_int_operand" "") ;; is_weak
49- (match_operand:SI 6 "const_int_operand" "") ;; mod_s
50- (match_operand:SI 7 "const_int_operand" "") ;; mod_f
51+ [(set (match_operand:SI 0 "register_operand" "=&d") ;; bool output
52+ (unspec_volatile:SI
53+ [(match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory
54+ (match_operand:SI 3 "register_operand" "d") ;; expected value
55+ (match_operand:SI 4 "register_operand" "d")] ;; desired value
56+ UNSPECV_CAS_BOOL))
57+ (set (match_operand:SI 1 "register_operand" "=&d") ;; val output
58+ (unspec_volatile:SI [(const_int 0)] UNSPECV_CAS_VAL))
59+ (set (match_dup 2)
60+ (unspec_volatile:SI [(const_int 0)] UNSPECV_CAS_MEM))
61+ (match_operand:SI 5 "const_int_operand" "") ;; is_weak
62+ (match_operand:SI 6 "const_int_operand" "") ;; mod_s
63+ (match_operand:SI 7 "const_int_operand" "") ;; mod_f
64 (clobber (match_scratch:SI 8 "=&d"))]
65 ""
66 {
67--
682.14.2
69