Adriana Kobylak | 6623117 | 2019-02-06 16:24:42 -0600 | [diff] [blame^] | 1 | From a3007793ae0c53b4a39159c6d69502de832a0914 Mon Sep 17 00:00:00 2001 |
| 2 | From: Adriana Kobylak <anoo@us.ibm.com> |
| 3 | Date: Thu, 7 Feb 2019 11:23:00 -0600 |
| 4 | Subject: [PATCH] ARM: dts: Aspeed: Witherspoon-128: Update BMC partitioning |
| 5 | |
| 6 | Create a Witherspoon-128 dts based off Witherspoon but with 128MB |
| 7 | BMC flash chips. |
| 8 | |
| 9 | Signed-off-by: Adriana Kobylak <anoo@us.ibm.com> |
| 10 | --- |
| 11 | arch/arm/boot/dts/Makefile | 1 + |
| 12 | .../boot/dts/aspeed-bmc-opp-witherspoon-128.dts | 712 +++++++++++++++++++++ |
| 13 | 2 files changed, 713 insertions(+) |
| 14 | create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-witherspoon-128.dts |
| 15 | |
| 16 | diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile |
| 17 | index bd40148..2341358 100644 |
| 18 | --- a/arch/arm/boot/dts/Makefile |
| 19 | +++ b/arch/arm/boot/dts/Makefile |
| 20 | @@ -1245,6 +1245,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ |
| 21 | aspeed-bmc-opp-palmetto.dtb \ |
| 22 | aspeed-bmc-opp-romulus.dtb \ |
| 23 | aspeed-bmc-opp-witherspoon.dtb \ |
| 24 | + aspeed-bmc-opp-witherspoon-128.dtb \ |
| 25 | aspeed-bmc-opp-zaius.dtb \ |
| 26 | aspeed-bmc-portwell-neptune.dtb \ |
| 27 | aspeed-bmc-quanta-q71l.dtb |
| 28 | diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon-128.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon-128.dts |
| 29 | new file mode 100644 |
| 30 | index 0000000..db34564 |
| 31 | --- /dev/null |
| 32 | +++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon-128.dts |
| 33 | @@ -0,0 +1,712 @@ |
| 34 | +// SPDX-License-Identifier: GPL-2.0+ |
| 35 | +/dts-v1/; |
| 36 | +#include "aspeed-g5.dtsi" |
| 37 | +#include <dt-bindings/gpio/aspeed-gpio.h> |
| 38 | +#include <dt-bindings/leds/leds-pca955x.h> |
| 39 | + |
| 40 | +/ { |
| 41 | + model = "Witherspoon BMC"; |
| 42 | + compatible = "ibm,witherspoon-bmc", "aspeed,ast2500"; |
| 43 | + |
| 44 | + chosen { |
| 45 | + stdout-path = &uart5; |
| 46 | + bootargs = "console=ttyS4,115200 earlyprintk"; |
| 47 | + }; |
| 48 | + |
| 49 | + memory@80000000 { |
| 50 | + reg = <0x80000000 0x20000000>; |
| 51 | + }; |
| 52 | + |
| 53 | + reserved-memory { |
| 54 | + #address-cells = <1>; |
| 55 | + #size-cells = <1>; |
| 56 | + ranges; |
| 57 | + |
| 58 | + flash_memory: region@98000000 { |
| 59 | + no-map; |
| 60 | + reg = <0x98000000 0x04000000>; /* 64M */ |
| 61 | + }; |
| 62 | + |
| 63 | + gfx_memory: framebuffer { |
| 64 | + size = <0x01000000>; |
| 65 | + alignment = <0x01000000>; |
| 66 | + compatible = "shared-dma-pool"; |
| 67 | + reusable; |
| 68 | + }; |
| 69 | + |
| 70 | + video_engine_memory: jpegbuffer { |
| 71 | + size = <0x02000000>; /* 32MM */ |
| 72 | + alignment = <0x01000000>; |
| 73 | + compatible = "shared-dma-pool"; |
| 74 | + reusable; |
| 75 | + }; |
| 76 | + }; |
| 77 | + |
| 78 | + gpio-keys { |
| 79 | + compatible = "gpio-keys"; |
| 80 | + |
| 81 | + air-water { |
| 82 | + label = "air-water"; |
| 83 | + gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>; |
| 84 | + linux,code = <ASPEED_GPIO(B, 5)>; |
| 85 | + }; |
| 86 | + |
| 87 | + checkstop { |
| 88 | + label = "checkstop"; |
| 89 | + gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; |
| 90 | + linux,code = <ASPEED_GPIO(J, 2)>; |
| 91 | + }; |
| 92 | + |
| 93 | + ps0-presence { |
| 94 | + label = "ps0-presence"; |
| 95 | + gpios = <&gpio ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; |
| 96 | + linux,code = <ASPEED_GPIO(P, 7)>; |
| 97 | + }; |
| 98 | + |
| 99 | + ps1-presence { |
| 100 | + label = "ps1-presence"; |
| 101 | + gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>; |
| 102 | + linux,code = <ASPEED_GPIO(N, 0)>; |
| 103 | + }; |
| 104 | + }; |
| 105 | + |
| 106 | + iio-hwmon-battery { |
| 107 | + compatible = "iio-hwmon"; |
| 108 | + io-channels = <&adc 12>; |
| 109 | + }; |
| 110 | + |
| 111 | + gpio-keys-polled { |
| 112 | + compatible = "gpio-keys-polled"; |
| 113 | + #address-cells = <1>; |
| 114 | + #size-cells = <0>; |
| 115 | + poll-interval = <1000>; |
| 116 | + |
| 117 | + fan0-presence { |
| 118 | + label = "fan0-presence"; |
| 119 | + gpios = <&pca0 4 GPIO_ACTIVE_LOW>; |
| 120 | + linux,code = <4>; |
| 121 | + }; |
| 122 | + |
| 123 | + fan1-presence { |
| 124 | + label = "fan1-presence"; |
| 125 | + gpios = <&pca0 5 GPIO_ACTIVE_LOW>; |
| 126 | + linux,code = <5>; |
| 127 | + }; |
| 128 | + |
| 129 | + fan2-presence { |
| 130 | + label = "fan2-presence"; |
| 131 | + gpios = <&pca0 6 GPIO_ACTIVE_LOW>; |
| 132 | + linux,code = <6>; |
| 133 | + }; |
| 134 | + |
| 135 | + fan3-presence { |
| 136 | + label = "fan3-presence"; |
| 137 | + gpios = <&pca0 7 GPIO_ACTIVE_LOW>; |
| 138 | + linux,code = <7>; |
| 139 | + }; |
| 140 | + }; |
| 141 | + |
| 142 | + leds { |
| 143 | + compatible = "gpio-leds"; |
| 144 | + |
| 145 | + fan0 { |
| 146 | + retain-state-shutdown; |
| 147 | + default-state = "keep"; |
| 148 | + gpios = <&pca0 0 GPIO_ACTIVE_LOW>; |
| 149 | + }; |
| 150 | + |
| 151 | + fan1 { |
| 152 | + retain-state-shutdown; |
| 153 | + default-state = "keep"; |
| 154 | + gpios = <&pca0 1 GPIO_ACTIVE_LOW>; |
| 155 | + }; |
| 156 | + |
| 157 | + fan2 { |
| 158 | + retain-state-shutdown; |
| 159 | + default-state = "keep"; |
| 160 | + gpios = <&pca0 2 GPIO_ACTIVE_LOW>; |
| 161 | + }; |
| 162 | + |
| 163 | + fan3 { |
| 164 | + retain-state-shutdown; |
| 165 | + default-state = "keep"; |
| 166 | + gpios = <&pca0 3 GPIO_ACTIVE_LOW>; |
| 167 | + }; |
| 168 | + |
| 169 | + front-fault { |
| 170 | + retain-state-shutdown; |
| 171 | + default-state = "keep"; |
| 172 | + gpios = <&pca0 13 GPIO_ACTIVE_LOW>; |
| 173 | + }; |
| 174 | + |
| 175 | + front-power { |
| 176 | + retain-state-shutdown; |
| 177 | + default-state = "keep"; |
| 178 | + gpios = <&pca0 14 GPIO_ACTIVE_LOW>; |
| 179 | + }; |
| 180 | + |
| 181 | + front-id { |
| 182 | + retain-state-shutdown; |
| 183 | + default-state = "keep"; |
| 184 | + gpios = <&pca0 15 GPIO_ACTIVE_LOW>; |
| 185 | + }; |
| 186 | + |
| 187 | + rear-fault { |
| 188 | + gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>; |
| 189 | + }; |
| 190 | + |
| 191 | + rear-id { |
| 192 | + gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>; |
| 193 | + }; |
| 194 | + |
| 195 | + rear-power { |
| 196 | + gpios = <&gpio ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>; |
| 197 | + }; |
| 198 | + |
| 199 | + power-button { |
| 200 | + gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>; |
| 201 | + }; |
| 202 | + }; |
| 203 | + |
| 204 | + fsi: gpio-fsi { |
| 205 | + compatible = "fsi-master-gpio", "fsi-master"; |
| 206 | + #address-cells = <2>; |
| 207 | + #size-cells = <0>; |
| 208 | + no-gpio-delays; |
| 209 | + |
| 210 | + clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; |
| 211 | + data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>; |
| 212 | + mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>; |
| 213 | + enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; |
| 214 | + trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>; |
| 215 | + }; |
| 216 | + |
| 217 | + iio-hwmon-dps310 { |
| 218 | + compatible = "iio-hwmon"; |
| 219 | + io-channels = <&dps 0>; |
| 220 | + }; |
| 221 | + |
| 222 | + iio-hwmon-bmp280 { |
| 223 | + compatible = "iio-hwmon"; |
| 224 | + io-channels = <&bmp 1>; |
| 225 | + }; |
| 226 | + |
| 227 | +}; |
| 228 | + |
| 229 | +&fmc { |
| 230 | + status = "okay"; |
| 231 | + |
| 232 | + flash@0 { |
| 233 | + status = "okay"; |
| 234 | + label = "bmc"; |
| 235 | + m25p,fast-read; |
| 236 | + spi-max-frequency = <100000000>; |
| 237 | + partitions { |
| 238 | + #address-cells = < 1 >; |
| 239 | + #size-cells = < 1 >; |
| 240 | + compatible = "fixed-partitions"; |
| 241 | + u-boot@0 { |
| 242 | + reg = < 0 0x60000 >; |
| 243 | + label = "u-boot"; |
| 244 | + }; |
| 245 | + u-boot-env@60000 { |
| 246 | + reg = < 0x60000 0x20000 >; |
| 247 | + label = "u-boot-env"; |
| 248 | + }; |
| 249 | + obmc-ubi@80000 { |
| 250 | + reg = < 0x80000 0x7F80000>; |
| 251 | + label = "obmc-ubi"; |
| 252 | + }; |
| 253 | + }; |
| 254 | + }; |
| 255 | + |
| 256 | + flash@1 { |
| 257 | + status = "okay"; |
| 258 | + label = "alt-bmc"; |
| 259 | + m25p,fast-read; |
| 260 | + spi-max-frequency = <100000000>; |
| 261 | + partitions { |
| 262 | + #address-cells = < 1 >; |
| 263 | + #size-cells = < 1 >; |
| 264 | + compatible = "fixed-partitions"; |
| 265 | + u-boot@0 { |
| 266 | + reg = < 0 0x60000 >; |
| 267 | + label = "alt-u-boot"; |
| 268 | + }; |
| 269 | + u-boot-env@60000 { |
| 270 | + reg = < 0x60000 0x20000 >; |
| 271 | + label = "alt-u-boot-env"; |
| 272 | + }; |
| 273 | + obmc-ubi@80000 { |
| 274 | + reg = < 0x80000 0x7F80000>; |
| 275 | + label = "alt-obmc-ubi"; |
| 276 | + }; |
| 277 | + }; |
| 278 | + }; |
| 279 | +}; |
| 280 | + |
| 281 | +&spi1 { |
| 282 | + status = "okay"; |
| 283 | + pinctrl-names = "default"; |
| 284 | + pinctrl-0 = <&pinctrl_spi1_default>; |
| 285 | + |
| 286 | + flash@0 { |
| 287 | + status = "okay"; |
| 288 | + label = "pnor"; |
| 289 | + m25p,fast-read; |
| 290 | + spi-max-frequency = <100000000>; |
| 291 | + }; |
| 292 | +}; |
| 293 | + |
| 294 | +&uart1 { |
| 295 | + /* Rear RS-232 connector */ |
| 296 | + status = "okay"; |
| 297 | + pinctrl-names = "default"; |
| 298 | + pinctrl-0 = <&pinctrl_txd1_default |
| 299 | + &pinctrl_rxd1_default |
| 300 | + &pinctrl_nrts1_default |
| 301 | + &pinctrl_ndtr1_default |
| 302 | + &pinctrl_ndsr1_default |
| 303 | + &pinctrl_ncts1_default |
| 304 | + &pinctrl_ndcd1_default |
| 305 | + &pinctrl_nri1_default>; |
| 306 | +}; |
| 307 | + |
| 308 | +&uart2 { |
| 309 | + /* APSS */ |
| 310 | + status = "okay"; |
| 311 | + pinctrl-names = "default"; |
| 312 | + pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; |
| 313 | +}; |
| 314 | + |
| 315 | +&uart5 { |
| 316 | + status = "okay"; |
| 317 | +}; |
| 318 | + |
| 319 | +&lpc_ctrl { |
| 320 | + status = "okay"; |
| 321 | + memory-region = <&flash_memory>; |
| 322 | + flash = <&spi1>; |
| 323 | +}; |
| 324 | + |
| 325 | +&mbox { |
| 326 | + status = "okay"; |
| 327 | +}; |
| 328 | + |
| 329 | +&mac0 { |
| 330 | + status = "okay"; |
| 331 | + pinctrl-names = "default"; |
| 332 | + pinctrl-0 = <&pinctrl_rmii1_default>; |
| 333 | + use-ncsi; |
| 334 | +}; |
| 335 | + |
| 336 | +&i2c2 { |
| 337 | + status = "okay"; |
| 338 | + |
| 339 | + /* MUX -> |
| 340 | + * Samtec 1 |
| 341 | + * Samtec 2 |
| 342 | + */ |
| 343 | +}; |
| 344 | + |
| 345 | +&i2c3 { |
| 346 | + status = "okay"; |
| 347 | + |
| 348 | + bmp: bmp280@77 { |
| 349 | + compatible = "bosch,bmp280"; |
| 350 | + reg = <0x77>; |
| 351 | + #io-channel-cells = <1>; |
| 352 | + }; |
| 353 | + |
| 354 | + max31785@52 { |
| 355 | + compatible = "maxim,max31785a"; |
| 356 | + reg = <0x52>; |
| 357 | + #address-cells = <1>; |
| 358 | + #size-cells = <0>; |
| 359 | + |
| 360 | + fan@0 { |
| 361 | + compatible = "pmbus-fan"; |
| 362 | + reg = <0>; |
| 363 | + tach-pulses = <2>; |
| 364 | + maxim,fan-rotor-input = "tach"; |
| 365 | + maxim,fan-pwm-freq = <25000>; |
| 366 | + maxim,fan-dual-tach; |
| 367 | + maxim,fan-no-watchdog; |
| 368 | + maxim,fan-no-fault-ramp; |
| 369 | + maxim,fan-ramp = <2>; |
| 370 | + maxim,fan-fault-pin-mon; |
| 371 | + }; |
| 372 | + |
| 373 | + fan@1 { |
| 374 | + compatible = "pmbus-fan"; |
| 375 | + reg = <1>; |
| 376 | + tach-pulses = <2>; |
| 377 | + maxim,fan-rotor-input = "tach"; |
| 378 | + maxim,fan-pwm-freq = <25000>; |
| 379 | + maxim,fan-dual-tach; |
| 380 | + maxim,fan-no-watchdog; |
| 381 | + maxim,fan-no-fault-ramp; |
| 382 | + maxim,fan-ramp = <2>; |
| 383 | + maxim,fan-fault-pin-mon; |
| 384 | + }; |
| 385 | + |
| 386 | + fan@2 { |
| 387 | + compatible = "pmbus-fan"; |
| 388 | + reg = <2>; |
| 389 | + tach-pulses = <2>; |
| 390 | + maxim,fan-rotor-input = "tach"; |
| 391 | + maxim,fan-pwm-freq = <25000>; |
| 392 | + maxim,fan-dual-tach; |
| 393 | + maxim,fan-no-watchdog; |
| 394 | + maxim,fan-no-fault-ramp; |
| 395 | + maxim,fan-ramp = <2>; |
| 396 | + maxim,fan-fault-pin-mon; |
| 397 | + }; |
| 398 | + |
| 399 | + fan@3 { |
| 400 | + compatible = "pmbus-fan"; |
| 401 | + reg = <3>; |
| 402 | + tach-pulses = <2>; |
| 403 | + maxim,fan-rotor-input = "tach"; |
| 404 | + maxim,fan-pwm-freq = <25000>; |
| 405 | + maxim,fan-dual-tach; |
| 406 | + maxim,fan-no-watchdog; |
| 407 | + maxim,fan-no-fault-ramp; |
| 408 | + maxim,fan-ramp = <2>; |
| 409 | + maxim,fan-fault-pin-mon; |
| 410 | + }; |
| 411 | + }; |
| 412 | + |
| 413 | + dps: dps310@76 { |
| 414 | + compatible = "infineon,dps310"; |
| 415 | + reg = <0x76>; |
| 416 | + #io-channel-cells = <0>; |
| 417 | + }; |
| 418 | + |
| 419 | + pca0: pca9552@60 { |
| 420 | + compatible = "nxp,pca9552"; |
| 421 | + reg = <0x60>; |
| 422 | + #address-cells = <1>; |
| 423 | + #size-cells = <0>; |
| 424 | + |
| 425 | + gpio-controller; |
| 426 | + #gpio-cells = <2>; |
| 427 | + |
| 428 | + gpio@0 { |
| 429 | + reg = <0>; |
| 430 | + type = <PCA955X_TYPE_GPIO>; |
| 431 | + }; |
| 432 | + |
| 433 | + gpio@1 { |
| 434 | + reg = <1>; |
| 435 | + type = <PCA955X_TYPE_GPIO>; |
| 436 | + }; |
| 437 | + |
| 438 | + gpio@2 { |
| 439 | + reg = <2>; |
| 440 | + type = <PCA955X_TYPE_GPIO>; |
| 441 | + }; |
| 442 | + |
| 443 | + gpio@3 { |
| 444 | + reg = <3>; |
| 445 | + type = <PCA955X_TYPE_GPIO>; |
| 446 | + }; |
| 447 | + |
| 448 | + gpio@4 { |
| 449 | + reg = <4>; |
| 450 | + type = <PCA955X_TYPE_GPIO>; |
| 451 | + }; |
| 452 | + |
| 453 | + gpio@5 { |
| 454 | + reg = <5>; |
| 455 | + type = <PCA955X_TYPE_GPIO>; |
| 456 | + }; |
| 457 | + |
| 458 | + gpio@6 { |
| 459 | + reg = <6>; |
| 460 | + type = <PCA955X_TYPE_GPIO>; |
| 461 | + }; |
| 462 | + |
| 463 | + gpio@7 { |
| 464 | + reg = <7>; |
| 465 | + type = <PCA955X_TYPE_GPIO>; |
| 466 | + }; |
| 467 | + |
| 468 | + gpio@8 { |
| 469 | + reg = <8>; |
| 470 | + type = <PCA955X_TYPE_GPIO>; |
| 471 | + }; |
| 472 | + |
| 473 | + gpio@9 { |
| 474 | + reg = <9>; |
| 475 | + type = <PCA955X_TYPE_GPIO>; |
| 476 | + }; |
| 477 | + |
| 478 | + gpio@10 { |
| 479 | + reg = <10>; |
| 480 | + type = <PCA955X_TYPE_GPIO>; |
| 481 | + }; |
| 482 | + |
| 483 | + gpio@11 { |
| 484 | + reg = <11>; |
| 485 | + type = <PCA955X_TYPE_GPIO>; |
| 486 | + }; |
| 487 | + |
| 488 | + gpio@12 { |
| 489 | + reg = <12>; |
| 490 | + type = <PCA955X_TYPE_GPIO>; |
| 491 | + }; |
| 492 | + |
| 493 | + gpio@13 { |
| 494 | + reg = <13>; |
| 495 | + type = <PCA955X_TYPE_GPIO>; |
| 496 | + }; |
| 497 | + |
| 498 | + gpio@14 { |
| 499 | + reg = <14>; |
| 500 | + type = <PCA955X_TYPE_GPIO>; |
| 501 | + }; |
| 502 | + |
| 503 | + gpio@15 { |
| 504 | + reg = <15>; |
| 505 | + type = <PCA955X_TYPE_GPIO>; |
| 506 | + }; |
| 507 | + }; |
| 508 | + |
| 509 | + power-supply@68 { |
| 510 | + compatible = "ibm,cffps1"; |
| 511 | + reg = <0x68>; |
| 512 | + }; |
| 513 | + |
| 514 | + power-supply@69 { |
| 515 | + compatible = "ibm,cffps1"; |
| 516 | + reg = <0x69>; |
| 517 | + }; |
| 518 | +}; |
| 519 | + |
| 520 | +&i2c4 { |
| 521 | + status = "okay"; |
| 522 | + |
| 523 | + tmp423a@4c { |
| 524 | + compatible = "ti,tmp423"; |
| 525 | + reg = <0x4c>; |
| 526 | + }; |
| 527 | + |
| 528 | + ir35221@70 { |
| 529 | + compatible = "infineon,ir35221"; |
| 530 | + reg = <0x70>; |
| 531 | + }; |
| 532 | + |
| 533 | + ir35221@71 { |
| 534 | + compatible = "infineon,ir35221"; |
| 535 | + reg = <0x71>; |
| 536 | + }; |
| 537 | +}; |
| 538 | + |
| 539 | + |
| 540 | +&i2c5 { |
| 541 | + status = "okay"; |
| 542 | + |
| 543 | + tmp423a@4c { |
| 544 | + compatible = "ti,tmp423"; |
| 545 | + reg = <0x4c>; |
| 546 | + }; |
| 547 | + |
| 548 | + ir35221@70 { |
| 549 | + compatible = "infineon,ir35221"; |
| 550 | + reg = <0x70>; |
| 551 | + }; |
| 552 | + |
| 553 | + ir35221@71 { |
| 554 | + compatible = "infineon,ir35221"; |
| 555 | + reg = <0x71>; |
| 556 | + }; |
| 557 | +}; |
| 558 | + |
| 559 | +&i2c9 { |
| 560 | + status = "okay"; |
| 561 | + |
| 562 | + tmp275@4a { |
| 563 | + compatible = "ti,tmp275"; |
| 564 | + reg = <0x4a>; |
| 565 | + }; |
| 566 | +}; |
| 567 | + |
| 568 | +&i2c10 { |
| 569 | + /* MUX |
| 570 | + * -> PCIe Slot 3 |
| 571 | + * -> PCIe Slot 4 |
| 572 | + */ |
| 573 | + status = "okay"; |
| 574 | +}; |
| 575 | + |
| 576 | +&i2c11 { |
| 577 | + status = "okay"; |
| 578 | + |
| 579 | + pca9552: pca9552@60 { |
| 580 | + compatible = "nxp,pca9552"; |
| 581 | + reg = <0x60>; |
| 582 | + #address-cells = <1>; |
| 583 | + #size-cells = <0>; |
| 584 | + gpio-controller; |
| 585 | + #gpio-cells = <2>; |
| 586 | + |
| 587 | + gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N", |
| 588 | + "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF", |
| 589 | + "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF", |
| 590 | + "GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF", |
| 591 | + "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF", |
| 592 | + "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF", |
| 593 | + "GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF", |
| 594 | + "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N"; |
| 595 | + |
| 596 | + gpio@0 { |
| 597 | + reg = <0>; |
| 598 | + type = <PCA955X_TYPE_GPIO>; |
| 599 | + }; |
| 600 | + |
| 601 | + gpio@1 { |
| 602 | + reg = <1>; |
| 603 | + type = <PCA955X_TYPE_GPIO>; |
| 604 | + }; |
| 605 | + |
| 606 | + gpio@2 { |
| 607 | + reg = <2>; |
| 608 | + type = <PCA955X_TYPE_GPIO>; |
| 609 | + }; |
| 610 | + |
| 611 | + gpio@3 { |
| 612 | + reg = <3>; |
| 613 | + type = <PCA955X_TYPE_GPIO>; |
| 614 | + }; |
| 615 | + |
| 616 | + gpio@4 { |
| 617 | + reg = <4>; |
| 618 | + type = <PCA955X_TYPE_GPIO>; |
| 619 | + }; |
| 620 | + |
| 621 | + gpio@5 { |
| 622 | + reg = <5>; |
| 623 | + type = <PCA955X_TYPE_GPIO>; |
| 624 | + }; |
| 625 | + |
| 626 | + gpio@6 { |
| 627 | + reg = <6>; |
| 628 | + type = <PCA955X_TYPE_GPIO>; |
| 629 | + }; |
| 630 | + |
| 631 | + gpio@7 { |
| 632 | + reg = <7>; |
| 633 | + type = <PCA955X_TYPE_GPIO>; |
| 634 | + }; |
| 635 | + |
| 636 | + gpio@8 { |
| 637 | + reg = <8>; |
| 638 | + type = <PCA955X_TYPE_GPIO>; |
| 639 | + }; |
| 640 | + |
| 641 | + gpio@9 { |
| 642 | + reg = <9>; |
| 643 | + type = <PCA955X_TYPE_GPIO>; |
| 644 | + }; |
| 645 | + |
| 646 | + gpio@10 { |
| 647 | + reg = <10>; |
| 648 | + type = <PCA955X_TYPE_GPIO>; |
| 649 | + }; |
| 650 | + |
| 651 | + gpio@11 { |
| 652 | + reg = <11>; |
| 653 | + type = <PCA955X_TYPE_GPIO>; |
| 654 | + }; |
| 655 | + |
| 656 | + gpio@12 { |
| 657 | + reg = <12>; |
| 658 | + type = <PCA955X_TYPE_GPIO>; |
| 659 | + }; |
| 660 | + |
| 661 | + gpio@13 { |
| 662 | + reg = <13>; |
| 663 | + type = <PCA955X_TYPE_GPIO>; |
| 664 | + }; |
| 665 | + |
| 666 | + gpio@14 { |
| 667 | + reg = <14>; |
| 668 | + type = <PCA955X_TYPE_GPIO>; |
| 669 | + }; |
| 670 | + |
| 671 | + gpio@15 { |
| 672 | + reg = <15>; |
| 673 | + type = <PCA955X_TYPE_GPIO>; |
| 674 | + }; |
| 675 | + }; |
| 676 | + |
| 677 | + rtc@32 { |
| 678 | + compatible = "epson,rx8900"; |
| 679 | + reg = <0x32>; |
| 680 | + }; |
| 681 | + |
| 682 | + eeprom@51 { |
| 683 | + compatible = "atmel,24c64"; |
| 684 | + reg = <0x51>; |
| 685 | + }; |
| 686 | + |
| 687 | + ucd90160@64 { |
| 688 | + compatible = "ti,ucd90160"; |
| 689 | + reg = <0x64>; |
| 690 | + }; |
| 691 | +}; |
| 692 | + |
| 693 | +&i2c12 { |
| 694 | + status = "okay"; |
| 695 | +}; |
| 696 | + |
| 697 | +&i2c13 { |
| 698 | + status = "okay"; |
| 699 | +}; |
| 700 | + |
| 701 | +&vuart { |
| 702 | + status = "okay"; |
| 703 | +}; |
| 704 | + |
| 705 | +&gfx { |
| 706 | + status = "okay"; |
| 707 | + memory-region = <&gfx_memory>; |
| 708 | +}; |
| 709 | + |
| 710 | +&pinctrl { |
| 711 | + aspeed,external-nodes = <&gfx &lhc>; |
| 712 | +}; |
| 713 | + |
| 714 | +&wdt1 { |
| 715 | + aspeed,reset-type = "none"; |
| 716 | + aspeed,external-signal; |
| 717 | + aspeed,ext-push-pull; |
| 718 | + aspeed,ext-active-high; |
| 719 | + |
| 720 | + pinctrl-names = "default"; |
| 721 | + pinctrl-0 = <&pinctrl_wdtrst1_default>; |
| 722 | +}; |
| 723 | + |
| 724 | +&wdt2 { |
| 725 | + aspeed,alt-boot; |
| 726 | +}; |
| 727 | + |
| 728 | +&ibt { |
| 729 | + status = "okay"; |
| 730 | +}; |
| 731 | + |
| 732 | +&adc { |
| 733 | + status = "okay"; |
| 734 | +}; |
| 735 | + |
| 736 | +&vhub { |
| 737 | + status = "okay"; |
| 738 | +}; |
| 739 | + |
| 740 | +&video { |
| 741 | + status = "okay"; |
| 742 | + memory-region = <&video_engine_memory>; |
| 743 | +}; |
| 744 | + |
| 745 | +#include "ibm-power9-dual.dtsi" |
| 746 | -- |
| 747 | 1.8.3.1 |
| 748 | |