blob: 92a3dcc710d1b4932fbfb91c19c4ca947994aa67 [file] [log] [blame]
Andrew Geissler7e0e3c02022-02-25 20:34:39 +00001Remove duplicate code for riscv
2
3Upstream-Status: Pending
4Signed-off-by: Khem Raj <raj.khem@gmail.com>
5
6--- a/src/include/storage/s_lock.h
7+++ b/src/include/storage/s_lock.h
8@@ -341,30 +341,6 @@ tas(volatile slock_t *lock)
9 #endif /* HAVE_GCC__SYNC_INT32_TAS */
10 #endif /* __arm__ || __arm || __aarch64__ || __aarch64 || __riscv */
11
12-
13-/*
14- * RISC-V likewise uses __sync_lock_test_and_set(int *, int) if available.
15- */
16-#if defined(__riscv)
17-#ifdef HAVE_GCC__SYNC_INT32_TAS
18-#define HAS_TEST_AND_SET
19-
20-#define TAS(lock) tas(lock)
21-
22-typedef int slock_t;
23-
24-static __inline__ int
25-tas(volatile slock_t *lock)
26-{
27- return __sync_lock_test_and_set(lock, 1);
28-}
29-
30-#define S_UNLOCK(lock) __sync_lock_release(lock)
31-
32-#endif /* HAVE_GCC__SYNC_INT32_TAS */
33-#endif /* __riscv */
34-
35-
36 /* S/390 and S/390x Linux (32- and 64-bit zSeries) */
37 #if defined(__s390__) || defined(__s390x__)
38 #define HAS_TEST_AND_SET