Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 1 | From 3240839197b1c42b3cd6e77c5b3b47aa7a1378a4 Mon Sep 17 00:00:00 2001 |
Brad Bishop | 26bdd44 | 2019-08-16 17:08:17 -0400 | [diff] [blame] | 2 | From: Nagaraju Mekala <nmekala@xilix.com> |
| 3 | Date: Wed, 24 Oct 2018 12:34:37 +0530 |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 4 | Subject: [PATCH 23/43] fixing the .bss relocation issue |
Brad Bishop | 26bdd44 | 2019-08-16 17:08:17 -0400 | [diff] [blame] | 5 | |
| 6 | --- |
| 7 | bfd/elf64-microblaze.c | 18 ++++++++++++------ |
| 8 | 1 file changed, 12 insertions(+), 6 deletions(-) |
| 9 | |
| 10 | diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 11 | index 4d9b90647f..184b7d560d 100644 |
Brad Bishop | 26bdd44 | 2019-08-16 17:08:17 -0400 | [diff] [blame] | 12 | --- a/bfd/elf64-microblaze.c |
| 13 | +++ b/bfd/elf64-microblaze.c |
| 14 | @@ -1480,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
| 15 | + input_section->output_offset |
| 16 | + offset + INST_WORD_SIZE); |
| 17 | unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
| 18 | - if (insn == 0xb2000000 || insn == 0xb2ffffff) |
| 19 | + if ((insn & 0xff000000) == 0xb2000000) |
| 20 | { |
| 21 | insn &= ~0x00ffffff; |
| 22 | insn |= (relocation >> 16) & 0xffffff; |
| 23 | @@ -1593,7 +1593,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, |
| 24 | + offset + INST_WORD_SIZE); |
| 25 | } |
| 26 | unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); |
| 27 | - if (insn == 0xb2000000 || insn == 0xb2ffffff) |
| 28 | + if ((insn & 0xff000000) == 0xb2000000) |
| 29 | { |
| 30 | insn &= ~0x00ffffff; |
| 31 | insn |= (relocation >> 16) & 0xffffff; |
| 32 | @@ -1722,7 +1722,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
| 33 | { |
| 34 | unsigned long instr = bfd_get_32 (abfd, bfd_addr); |
| 35 | |
| 36 | - if (instr == 0xb2000000 || instr == 0xb2ffffff) |
| 37 | + if ((instr & 0xff000000) == 0xb2000000) |
| 38 | { |
| 39 | instr &= ~0x00ffffff; |
| 40 | instr |= (val & 0xffffff); |
| 41 | @@ -1745,7 +1745,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) |
| 42 | unsigned long instr_lo; |
| 43 | |
| 44 | instr_hi = bfd_get_32 (abfd, bfd_addr); |
| 45 | - if (instr_hi == 0xb2000000 || instr_hi == 0xb2ffffff) |
| 46 | + if ((instr_hi & 0xff000000) == 0xb2000000) |
| 47 | { |
| 48 | instr_hi &= ~0x00ffffff; |
| 49 | instr_hi |= (val >> 16) & 0xffffff; |
| 50 | @@ -2238,7 +2238,10 @@ microblaze_elf_relax_section (bfd *abfd, |
| 51 | unsigned long instr_lo = bfd_get_32 (abfd, ocontents |
| 52 | + irelscan->r_offset |
| 53 | + INST_WORD_SIZE); |
| 54 | - immediate = (instr_hi & 0x0000ffff) << 16; |
| 55 | + if ((instr_hi & 0xff000000) == 0xb2000000) |
| 56 | + immediate = (instr_hi & 0x00ffffff) << 24; |
| 57 | + else |
| 58 | + immediate = (instr_hi & 0x0000ffff) << 16; |
| 59 | immediate |= (instr_lo & 0x0000ffff); |
| 60 | offset = calc_fixup (irelscan->r_addend, 0, sec); |
| 61 | immediate -= offset; |
| 62 | @@ -2282,7 +2285,10 @@ microblaze_elf_relax_section (bfd *abfd, |
| 63 | unsigned long instr_lo = bfd_get_32 (abfd, ocontents |
| 64 | + irelscan->r_offset |
| 65 | + INST_WORD_SIZE); |
| 66 | - immediate = (instr_hi & 0x0000ffff) << 16; |
| 67 | + if ((instr_hi & 0xff000000) == 0xb2000000) |
| 68 | + immediate = (instr_hi & 0x00ffffff) << 24; |
| 69 | + else |
| 70 | + immediate = (instr_hi & 0x0000ffff) << 16; |
| 71 | immediate |= (instr_lo & 0x0000ffff); |
| 72 | target_address = immediate; |
| 73 | offset = calc_fixup (target_address, 0, sec); |
Andrew Geissler | 84ad7c5 | 2020-06-27 00:00:16 -0500 | [diff] [blame] | 74 | -- |
| 75 | 2.17.1 |
| 76 | |