| Thang Q. Nguyen | dd68b8b | 2020-12-22 03:33:40 +0000 | [diff] [blame] | 1 | FILESEXTRAPATHS_append_mtjade := "${THISDIR}/${PN}:" |
| 2 | |
| 3 | SRC_URI += " \ |
| 4 | file://0001-aspeed-scu-Switch-PWM-pin-to-GPIO-input-mode.patch \ |
| Thang Q. Nguyen | d76c413 | 2020-12-23 04:45:53 +0000 | [diff] [blame] | 5 | file://0002-aspeed-Disable-internal-PD-resistors-for-GPIOs.patch \ |
| Thang Q. Nguyen | 44cf8fd | 2020-12-22 04:27:36 +0000 | [diff] [blame] | 6 | file://0003-aspeed-support-passing-system-reset-status-to-kernel.patch \ |
| Chanh Nguyen | 89f5976 | 2021-03-09 09:38:56 +0700 | [diff] [blame] | 7 | file://0004-aspeed-add-gpio-support.patch \ |
| Chanh Nguyen | d86e51f | 2021-03-10 10:18:49 +0700 | [diff] [blame] | 8 | file://0005-aspeed-Enable-SPI-master-mode.patch \ |
| Chanh Nguyen | 1019776 | 2021-03-18 00:06:08 +0700 | [diff] [blame] | 9 | file://0006-aspeed-support-Mt.Jade-platform-init.patch \ |
| Thang Q. Nguyen | dd68b8b | 2020-12-22 03:33:40 +0000 | [diff] [blame] | 10 | " |