| Andrew Geissler | 10fa149 | 2020-12-11 16:25:29 -0600 | [diff] [blame] | 1 | From b6298861681965533c9b6dac5e26fbd62b52839d Mon Sep 17 00:00:00 2001 |
| 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
| 3 | Date: Tue, 17 Jan 2017 17:11:04 +0530 |
| 4 | Subject: [PATCH 17/54] [Patch,microblaze]: Inline Expansion of fsqrt builtin. |
| 5 | The changes are made in the patch for the inline expansion of the fsqrt |
| 6 | builtin with fqrt instruction. The sqrt math function takes double as |
| 7 | argument and return double as argument. The pattern is selected while |
| 8 | expanding the unary op through expand_unop which passes DFmode and the DFmode |
| 9 | pattern was not there returning zero. Thus the sqrt math function is not |
| 10 | inlined and expanded. The pattern with DFmode argument is added. Also the |
| 11 | source and destination argument is not same the DF through two different |
| 12 | consecutive registers with lower 32 bit is the argument passed to sqrt and |
| 13 | the higher 32 bit is zero. If the source and destinations are different the |
| 14 | DFmode 64 bits registers is not set properly giving the problem in runtime. |
| 15 | Such changes are taken care in the implementation of the pattern for DFmode |
| 16 | for inline expansion of the sqrt. |
| 17 | |
| 18 | ChangeLog: |
| 19 | 2015-06-16 Ajit Agarwal <ajitkum@xilinx.com> |
| 20 | Nagaraju Mekala <nmekala@xilinx.com> |
| 21 | |
| 22 | * config/microblaze/microblaze.md (sqrtdf2): New |
| 23 | pattern. |
| 24 | |
| 25 | Signed-off-by:Ajit Agarwal ajitkum@xilinx.com |
| 26 | Nagaraju Mekala nmekala@xilinx.com |
| 27 | --- |
| 28 | gcc/config/microblaze/microblaze.md | 14 ++++++++++++++ |
| 29 | 1 file changed, 14 insertions(+) |
| 30 | |
| 31 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
| 32 | index 8f9baec826b..986d9c3aa25 100644 |
| 33 | --- a/gcc/config/microblaze/microblaze.md |
| 34 | +++ b/gcc/config/microblaze/microblaze.md |
| 35 | @@ -451,6 +451,20 @@ |
| 36 | (set_attr "mode" "SF") |
| 37 | (set_attr "length" "4")]) |
| 38 | |
| 39 | +(define_insn "sqrtdf2" |
| 40 | + [(set (match_operand:DF 0 "register_operand" "=d") |
| 41 | + (sqrt:DF (match_operand:DF 1 "register_operand" "dG")))] |
| 42 | + "TARGET_HARD_FLOAT && TARGET_FLOAT_SQRT" |
| 43 | + { |
| 44 | + if (REGNO (operands[0]) == REGNO (operands[1])) |
| 45 | + return "fsqrt\t%0,%1"; |
| 46 | + else |
| 47 | + return "fsqrt\t%0,%1\n\taddk\t%D0,%D1,r0"; |
| 48 | + } |
| 49 | + [(set_attr "type" "fsqrt") |
| 50 | + (set_attr "mode" "SF") |
| 51 | + (set_attr "length" "4")]) |
| 52 | + |
| 53 | (define_insn "fix_truncsfsi2" |
| 54 | [(set (match_operand:SI 0 "register_operand" "=d") |
| 55 | (fix:SI (match_operand:SF 1 "register_operand" "d")))] |
| 56 | -- |
| 57 | 2.17.1 |
| 58 | |