| Brad Bishop | 286d45c | 2018-10-02 15:21:57 -0400 | [diff] [blame] | 1 | /* |
| 2 | * CAUTION: This file is automatically generated by Xilinx. |
| 3 | * Version: HSI 2015.4 |
| 4 | * Today is: Fri Mar 4 15:40:49 2016 |
| 5 | */ |
| 6 | |
| 7 | |
| 8 | / { |
| 9 | amba_pl: amba_pl { |
| 10 | #address-cells = <1>; |
| 11 | #size-cells = <1>; |
| 12 | compatible = "simple-bus"; |
| 13 | ranges ; |
| 14 | axi_dynclk_0: axi_dynclk@43c10000 { |
| 15 | compatible = "xlnx,axi-dynclk-1.0"; |
| 16 | reg = <0x43c10000 0x10000>; |
| 17 | xlnx,s00-axi-addr-width = <0x5>; |
| 18 | xlnx,s00-axi-data-width = <0x20>; |
| 19 | }; |
| 20 | axi_gpio_btn: gpio@41210000 { |
| 21 | #gpio-cells = <2>; |
| 22 | compatible = "xlnx,xps-gpio-1.00.a"; |
| 23 | gpio-controller ; |
| 24 | reg = <0x41210000 0x10000>; |
| 25 | xlnx,all-inputs = <0x1>; |
| 26 | xlnx,all-inputs-2 = <0x0>; |
| 27 | xlnx,all-outputs = <0x0>; |
| 28 | xlnx,all-outputs-2 = <0x0>; |
| 29 | xlnx,dout-default = <0x00000000>; |
| 30 | xlnx,dout-default-2 = <0x00000000>; |
| 31 | xlnx,gpio-width = <0x4>; |
| 32 | xlnx,gpio2-width = <0x20>; |
| 33 | xlnx,interrupt-present = <0x0>; |
| 34 | xlnx,is-dual = <0x0>; |
| 35 | xlnx,tri-default = <0xFFFFFFFF>; |
| 36 | xlnx,tri-default-2 = <0xFFFFFFFF>; |
| 37 | }; |
| 38 | axi_gpio_hdmi: gpio@41230000 { |
| 39 | #gpio-cells = <2>; |
| 40 | compatible = "xlnx,xps-gpio-1.00.a"; |
| 41 | gpio-controller ; |
| 42 | interrupt-parent = <&intc>; |
| 43 | interrupts = <0 29 4>; |
| 44 | reg = <0x41230000 0x10000>; |
| 45 | xlnx,all-inputs = <0x1>; |
| 46 | xlnx,all-inputs-2 = <0x0>; |
| 47 | xlnx,all-outputs = <0x0>; |
| 48 | xlnx,all-outputs-2 = <0x0>; |
| 49 | xlnx,dout-default = <0x00000000>; |
| 50 | xlnx,dout-default-2 = <0x00000000>; |
| 51 | xlnx,gpio-width = <0x1>; |
| 52 | xlnx,gpio2-width = <0x20>; |
| 53 | xlnx,interrupt-present = <0x1>; |
| 54 | xlnx,is-dual = <0x0>; |
| 55 | xlnx,tri-default = <0xFFFFFFFF>; |
| 56 | xlnx,tri-default-2 = <0xFFFFFFFF>; |
| 57 | }; |
| 58 | axi_gpio_led: gpio@41200000 { |
| 59 | #gpio-cells = <2>; |
| 60 | compatible = "xlnx,xps-gpio-1.00.a"; |
| 61 | gpio-controller ; |
| 62 | reg = <0x41200000 0x10000>; |
| 63 | xlnx,all-inputs = <0x0>; |
| 64 | xlnx,all-inputs-2 = <0x0>; |
| 65 | xlnx,all-outputs = <0x1>; |
| 66 | xlnx,all-outputs-2 = <0x0>; |
| 67 | xlnx,dout-default = <0x00000000>; |
| 68 | xlnx,dout-default-2 = <0x00000000>; |
| 69 | xlnx,gpio-width = <0x4>; |
| 70 | xlnx,gpio2-width = <0x20>; |
| 71 | xlnx,interrupt-present = <0x0>; |
| 72 | xlnx,is-dual = <0x0>; |
| 73 | xlnx,tri-default = <0xFFFFFFFF>; |
| 74 | xlnx,tri-default-2 = <0xFFFFFFFF>; |
| 75 | }; |
| 76 | axi_gpio_sw: gpio@41220000 { |
| 77 | #gpio-cells = <2>; |
| 78 | compatible = "xlnx,xps-gpio-1.00.a"; |
| 79 | gpio-controller ; |
| 80 | reg = <0x41220000 0x10000>; |
| 81 | xlnx,all-inputs = <0x1>; |
| 82 | xlnx,all-inputs-2 = <0x0>; |
| 83 | xlnx,all-outputs = <0x0>; |
| 84 | xlnx,all-outputs-2 = <0x0>; |
| 85 | xlnx,dout-default = <0x00000000>; |
| 86 | xlnx,dout-default-2 = <0x00000000>; |
| 87 | xlnx,gpio-width = <0x4>; |
| 88 | xlnx,gpio2-width = <0x20>; |
| 89 | xlnx,interrupt-present = <0x0>; |
| 90 | xlnx,is-dual = <0x0>; |
| 91 | xlnx,tri-default = <0xFFFFFFFF>; |
| 92 | xlnx,tri-default-2 = <0xFFFFFFFF>; |
| 93 | }; |
| 94 | axi_i2s_adi_0: axi_i2s_adi@43c20000 { |
| 95 | compatible = "xlnx,axi-i2s-adi-1.0"; |
| 96 | reg = <0x43c20000 0x10000>; |
| 97 | xlnx,bclk-pol = <0x0>; |
| 98 | xlnx,dma-type = <0x1>; |
| 99 | xlnx,has-rx = <0x1>; |
| 100 | xlnx,has-tx = <0x1>; |
| 101 | xlnx,lrclk-pol = <0x0>; |
| 102 | xlnx,num-ch = <0x1>; |
| 103 | xlnx,s-axi-min-size = <0x000001FF>; |
| 104 | xlnx,slot-width = <0x18>; |
| 105 | }; |
| 106 | axi_vdma_0: dma@43000000 { |
| 107 | #dma-cells = <1>; |
| 108 | compatible = "xlnx,axi-vdma-1.00.a"; |
| 109 | clocks = <&clkc 15>; |
| 110 | clock-names = "s_axi_lite_aclk"; |
| 111 | interrupt-parent = <&intc>; |
| 112 | interrupts = <0 30 4>; |
| 113 | reg = <0x43000000 0x10000>; |
| 114 | xlnx,flush-fsync = <0x1>; |
| 115 | xlnx,num-fstores = <0x1>; |
| 116 | dma-channel@43000000 { |
| 117 | compatible = "xlnx,axi-vdma-mm2s-channel"; |
| 118 | interrupts = <0 30 4>; |
| 119 | xlnx,datawidth = <0x20>; |
| 120 | xlnx,device-id = <0x0>; |
| 121 | }; |
| 122 | }; |
| 123 | v_tc_0: v_tc@43c00000 { |
| 124 | compatible = "xlnx,v-tc-6.1"; |
| 125 | interrupt-parent = <&intc>; |
| 126 | interrupts = <0 31 4>; |
| 127 | reg = <0x43c00000 0x10000>; |
| 128 | xlnx,det-achroma-en = <0x0>; |
| 129 | xlnx,det-avideo-en = <0x1>; |
| 130 | xlnx,det-fieldid-en = <0x0>; |
| 131 | xlnx,det-hblank-en = <0x1>; |
| 132 | xlnx,det-hsync-en = <0x1>; |
| 133 | xlnx,det-vblank-en = <0x1>; |
| 134 | xlnx,det-vsync-en = <0x1>; |
| 135 | xlnx,detect-en = <0x0>; |
| 136 | xlnx,fsync-hstart0 = <0x0>; |
| 137 | xlnx,fsync-hstart1 = <0x0>; |
| 138 | xlnx,fsync-hstart10 = <0x0>; |
| 139 | xlnx,fsync-hstart11 = <0x0>; |
| 140 | xlnx,fsync-hstart12 = <0x0>; |
| 141 | xlnx,fsync-hstart13 = <0x0>; |
| 142 | xlnx,fsync-hstart14 = <0x0>; |
| 143 | xlnx,fsync-hstart15 = <0x0>; |
| 144 | xlnx,fsync-hstart2 = <0x0>; |
| 145 | xlnx,fsync-hstart3 = <0x0>; |
| 146 | xlnx,fsync-hstart4 = <0x0>; |
| 147 | xlnx,fsync-hstart5 = <0x0>; |
| 148 | xlnx,fsync-hstart6 = <0x0>; |
| 149 | xlnx,fsync-hstart7 = <0x0>; |
| 150 | xlnx,fsync-hstart8 = <0x0>; |
| 151 | xlnx,fsync-hstart9 = <0x0>; |
| 152 | xlnx,fsync-vstart0 = <0x0>; |
| 153 | xlnx,fsync-vstart1 = <0x0>; |
| 154 | xlnx,fsync-vstart10 = <0x0>; |
| 155 | xlnx,fsync-vstart11 = <0x0>; |
| 156 | xlnx,fsync-vstart12 = <0x0>; |
| 157 | xlnx,fsync-vstart13 = <0x0>; |
| 158 | xlnx,fsync-vstart14 = <0x0>; |
| 159 | xlnx,fsync-vstart15 = <0x0>; |
| 160 | xlnx,fsync-vstart2 = <0x0>; |
| 161 | xlnx,fsync-vstart3 = <0x0>; |
| 162 | xlnx,fsync-vstart4 = <0x0>; |
| 163 | xlnx,fsync-vstart5 = <0x0>; |
| 164 | xlnx,fsync-vstart6 = <0x0>; |
| 165 | xlnx,fsync-vstart7 = <0x0>; |
| 166 | xlnx,fsync-vstart8 = <0x0>; |
| 167 | xlnx,fsync-vstart9 = <0x0>; |
| 168 | xlnx,gen-achroma-en = <0x0>; |
| 169 | xlnx,gen-achroma-polarity = <0x1>; |
| 170 | xlnx,gen-auto-switch = <0x0>; |
| 171 | xlnx,gen-avideo-en = <0x1>; |
| 172 | xlnx,gen-avideo-polarity = <0x1>; |
| 173 | xlnx,gen-cparity = <0x0>; |
| 174 | xlnx,gen-f0-vblank-hend = <0x500>; |
| 175 | xlnx,gen-f0-vblank-hstart = <0x500>; |
| 176 | xlnx,gen-f0-vframe-size = <0x2ee>; |
| 177 | xlnx,gen-f0-vsync-hend = <0x500>; |
| 178 | xlnx,gen-f0-vsync-hstart = <0x500>; |
| 179 | xlnx,gen-f0-vsync-vend = <0x2d9>; |
| 180 | xlnx,gen-f0-vsync-vstart = <0x2d4>; |
| 181 | xlnx,gen-f1-vblank-hend = <0x500>; |
| 182 | xlnx,gen-f1-vblank-hstart = <0x500>; |
| 183 | xlnx,gen-f1-vframe-size = <0x2ee>; |
| 184 | xlnx,gen-f1-vsync-hend = <0x500>; |
| 185 | xlnx,gen-f1-vsync-hstart = <0x500>; |
| 186 | xlnx,gen-f1-vsync-vend = <0x2d9>; |
| 187 | xlnx,gen-f1-vsync-vstart = <0x2d4>; |
| 188 | xlnx,gen-fieldid-en = <0x0>; |
| 189 | xlnx,gen-fieldid-polarity = <0x1>; |
| 190 | xlnx,gen-hactive-size = <0x500>; |
| 191 | xlnx,gen-hblank-en = <0x1>; |
| 192 | xlnx,gen-hblank-polarity = <0x1>; |
| 193 | xlnx,gen-hframe-size = <0x672>; |
| 194 | xlnx,gen-hsync-en = <0x1>; |
| 195 | xlnx,gen-hsync-end = <0x596>; |
| 196 | xlnx,gen-hsync-polarity = <0x1>; |
| 197 | xlnx,gen-hsync-start = <0x56e>; |
| 198 | xlnx,gen-interlaced = <0x0>; |
| 199 | xlnx,gen-vactive-size = <0x2d0>; |
| 200 | xlnx,gen-vblank-en = <0x1>; |
| 201 | xlnx,gen-vblank-polarity = <0x1>; |
| 202 | xlnx,gen-video-format = <0x2>; |
| 203 | xlnx,gen-vsync-en = <0x1>; |
| 204 | xlnx,gen-vsync-polarity = <0x1>; |
| 205 | xlnx,generate-en = <0x1>; |
| 206 | xlnx,has-axi4-lite = <0x1>; |
| 207 | xlnx,has-intc-if = <0x0>; |
| 208 | xlnx,interlace-en = <0x0>; |
| 209 | xlnx,max-lines = <0x1000>; |
| 210 | xlnx,max-pixels = <0x1000>; |
| 211 | xlnx,num-fsyncs = <0x1>; |
| 212 | xlnx,sync-en = <0x0>; |
| 213 | }; |
| 214 | }; |
| 215 | }; |