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gerrit.openbmc.org / stefanberger / openbmc / e8008b147b5caa7750f08760ae041730765b0244 / . / meta-facebook / meta-yosemitev2 / recipes-bsp / u-boot / u-boot-aspeed / 0002-spl-host-console-handle.patch
blob: 8f01c122c27f863973e50e29374456da87319007 [file] [log] [blame]
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]1From 9c5a3784a68a456cd22e63719917ed79873d0801 Mon Sep 17 00:00:00 2001
2From: Logananth Sundararaj <logananth.s@hcl.com>
3Date: Fri, 3 Dec 2021 16:37:58 +0530
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]4Subject: [PATCH] spl-host-console-handle
5
6This patch adds four 1S server console through debug card
7connected to YosemiteV2 during boot.
8
9Handswitch in the adaptor card connected to AST2500 GPIOs as below,
10GPIOAA7 ---SW_ID8
11GPIOAA6 ---SW_ID4
12GPIOAA5 ---SW_ID2
13GPIOAA4 ---SW_ID1
14
15SW_ID8 SW_ID4 SW_ID2 SW_ID1 Position Descritpion
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]16L L L L 1 1s server slot1 select
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]17
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]18L L L H 2 1s server slot2 select
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]19
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]20L L H L 3 1s server slot3 select
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]21
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]22L L H H 4 1s server slot4 select
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]23
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]24L H L L 5 BMC Debug port select
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]25
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]26L H L H 6 1s server slot1 select
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]27
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]28L H H L 7 1s server slot2 select
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]29
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]30L H H H 8 1s server slot3 select
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]31
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]32H L L L 9 1s server slot4 select
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]33
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]34H L L H 10 BMC Debug port select
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]35
36BMC and Hosts UART control flow
37GPIOE0 --- DEBUG_UART_SEL_0
38GPIOE1 --- DEBUG_UART_SEL_1
39GPIOE2 --- DEBUG_UART_SEL_2
40GPIOE2 --- DEBUG_UART_RX_SEL_N
41
42SEL_2 SEL_1 SEL_0 RX_SEL_N CONSOLE
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]430 0 0 0 SLOT1
440 0 1 0 SLOT2
450 1 0 0 SLOT3
460 1 1 0 SLOT4
471 0 0 1 BMC Debug
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]48
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]49Signed-off-by: Logananth Sundararaj <logananth.s@hcl.com>
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]50---
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]51 arch/arm/mach-aspeed/platform_g5.S | 69 ++++++++++++++++++++++++++----
52 1 file changed, 61 insertions(+), 8 deletions(-)
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]53
54diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]55index e1c17ae4a3..798b9c4337 100644
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]56--- a/arch/arm/mach-aspeed/platform_g5.S
57+++ b/arch/arm/mach-aspeed/platform_g5.S
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]58@@ -315,6 +315,59 @@ TIME_TABLE_DDR4_1600:
59 str r1, [r0]
60 .endm
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]61
62+ .macro console_slot1
63+ ldr r0, =0x1e780024
64+ ldr r1, [r0]
65+ orr r1, r1, #0xF
66+ str r1, [r0]
67+
68+ ldr r0, =0x1e780020
69+ ldr r1, [r0]
70+ and r1, r1, #0xFFFFFFF0
71+ orr r1, r1, #0x0
72+ str r1, [r0]
73+ .endm
74+
75+ .macro console_slot2
76+ ldr r0, =0x1e780024
77+ ldr r1, [r0]
78+ orr r1, r1, #0xF
79+ str r1, [r0]
80+
81+ ldr r0, =0x1e780020
82+ ldr r1, [r0]
83+ and r1, r1, #0xFFFFFFF0
84+ orr r1, r1, #0x1
85+ str r1, [r0]
86+ .endm
87+
88+ .macro console_slot3
89+ ldr r0, =0x1e780024
90+ ldr r1, [r0]
91+ orr r1, r1, #0xF
92+ str r1, [r0]
93+
94+ ldr r0, =0x1e780020
95+ ldr r1, [r0]
96+ and r1, r1, #0xFFFFFFF0
97+ orr r1, r1, #0x2
98+ str r1, [r0]
99+ .endm
100+
101+ .macro console_slot4
102+ ldr r0, =0x1e780024
103+ ldr r1, [r0]
104+ orr r1, r1, #0xF
105+ str r1, [r0]
106+
107+ ldr r0, =0x1e780020
108+ ldr r1, [r0]
109+ and r1, r1, #0xFFFFFFF0
110+ orr r1, r1, #0x3
111+ str r1, [r0]
112+ .endm
113+
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]114+
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]115 .macro console_sel
116
117 // Disable SoL UARTs[1-4]
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]118@@ -354,28 +407,28 @@ dbg_card_pres\@:
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]119 ldr r1, =0x00
120 cmp r0, r1
121 bne case_pos2\@
122- console_bmc
123+ console_slot1
124 b case_end\@
125 case_pos2\@:
126 //Test for position#2
127 ldr r1, =0x01
128 cmp r0, r1
129 bne case_pos3\@
130- console_bmc
131+ console_slot2
132 b case_end\@
133 case_pos3\@:
134 //Test for position#3
135 ldr r1, =0x02
136 cmp r0, r1
137 bne case_pos4\@
138- console_bmc
139+ console_slot3
140 b case_end\@
141 case_pos4\@:
142 //Test for position#4
143 ldr r1, =0x03
144 cmp r0, r1
145 bne case_pos5\@
146- console_bmc
147+ console_slot4
148 b case_end\@
149 case_pos5\@:
150 //Test for position#5
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]151@@ -389,28 +442,28 @@ case_pos6\@:
Manikandan Elumalai9fba3882020-06-10 21:01:15 +0530[diff] [blame]152 ldr r1, =0x05
153 cmp r0, r1
154 bne case_pos7\@
155- console_bmc
156+ console_slot1
157 b case_end\@
158 case_pos7\@:
159 //Test for position#7
160 ldr r1, =0x06
161 cmp r0, r1
162 bne case_pos8\@
163- console_bmc
164+ console_slot2
165 b case_end\@
166 case_pos8\@:
167 //Test for position#8
168 ldr r1, =0x07
169 cmp r0, r1
170 bne case_pos9\@
171- console_bmc
172+ console_slot3
173 b case_end\@
174 case_pos9\@:
175 //Test for position#9
176 ldr r1, =0x08
177 cmp r0, r1
178 bne case_pos10\@
179- console_bmc
180+ console_slot4
181 b case_end\@
182 case_pos10\@:
183 //Test for position#10
184--
Logananth Sundararajf2265622021-12-03 22:31:49 +0530[diff] [blame]1852.17.1