blob: 97a7a40126d133f775d95f20f430a576a151a952 [file] [log] [blame]
Brad Bishop26bdd442019-08-16 17:08:17 -04001SUMMARY = "Xilinx Runtime(XRT) libraries"
2DESCRIPTION = "Xilinx Runtime User Space Libraries and headers"
3
4LICENSE = "GPLv2 & Apache-2.0"
Andrew Geissler84ad7c52020-06-27 00:00:16 -05005LIC_FILES_CHKSUM = "file://../LICENSE;md5=da5408f748bce8a9851dac18e66f4bcf \
6 file://runtime_src/core/edge/drm/zocl/LICENSE;md5=7d040f51aae6ac6208de74e88a3795f8 \
7 file://runtime_src/core/pcie/driver/linux/xocl/LICENSE;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
8 file://runtime_src/core/pcie/linux/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \
9 file://runtime_src/core/pcie/tools/xbutil/LICENSE;md5=d273d63619c9aeaf15cdaf76422c4f87 \
10 file://runtime_src/core/edge/tools/xbutil/LICENSE;md5=d273d63619c9aeaf15cdaf76422c4f87 "
Brad Bishop26bdd442019-08-16 17:08:17 -040011
Andrew Geissler7eb438a2020-11-30 19:53:16 -060012BRANCH ?= "2020.2"
Andrew Geissler84ad7c52020-06-27 00:00:16 -050013REPO ?= "git://github.com/Xilinx/XRT.git;protocol=https"
14BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
15SRC_URI = "${REPO};${BRANCHARG}"
Brad Bishop26bdd442019-08-16 17:08:17 -040016
Andrew Geissler7eb438a2020-11-30 19:53:16 -060017PV = "202020.2.8.0"
18SRCREV ?= "f19a872233fbfe2eb933f25fa3d9a780ced774e5"
Brad Bishop26bdd442019-08-16 17:08:17 -040019
20S = "${WORKDIR}/git/src"
21
22inherit cmake
23
24BBCLASSEXTEND = "native nativesdk"
25
26# util-linux is for libuuid-dev.
Andrew Geissler84ad7c52020-06-27 00:00:16 -050027DEPENDS = "libdrm opencl-headers ocl-icd opencl-clhpp boost util-linux git-replacement-native protobuf-native protobuf"
Brad Bishop26bdd442019-08-16 17:08:17 -040028RDEPENDS_${PN} = "bash ocl-icd boost-system boost-filesystem"
29
30EXTRA_OECMAKE += " \
31 -DCMAKE_BUILD_TYPE=Release \
32 -DCMAKE_EXPORT_COMPILE_COMANDS=ON \
33 "
Andrew Geissler84ad7c52020-06-27 00:00:16 -050034
Andrew Geisslera9ff2b32020-10-16 10:11:54 -050035PACKAGE_ARCH_versal-ai-core = "${SOC_VARIANT_ARCH}"
36EXTRA_OECMAKE_append_versal-ai-core += "-DXRT_AIE_BUILD=true"
37TARGET_CXXFLAGS_append_versal-ai-core += "-DXRT_ENABLE_AIE"
38DEPENDS_append_versal-ai-core += " libmetal libxaiengine"
39RDEPENDS_${PN}_append_versal-ai-core += " libxaiengine"
Andrew Geissler84ad7c52020-06-27 00:00:16 -050040
Andrew Geissler7eb438a2020-11-30 19:53:16 -060041FILES_SOLIBSDEV = ""
42FILES_${PN} += "\
43 ${libdir}/lib*.so \
44 ${libdir}/lib*.so.* \
45 /lib/*.so* "
46INSANE_SKIP_${PN} += "dev-so"
47
Andrew Geissler84ad7c52020-06-27 00:00:16 -050048pkg_postinst_ontarget_${PN}() {
49 #!/bin/sh
50 if [ ! -e /etc/OpenCL/vendors/xilinx.icd ]; then
51 echo "INFO: Creating ICD entry for Xilinx Platform"
52 mkdir -p /etc/OpenCL/vendors
53 echo "libxilinxopencl.so" > /etc/OpenCL/vendors/xilinx.icd
54 chmod -R 755 /etc/OpenCL
55 fi
56}