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gerrit.openbmc.org / openbmc / entity-manager / 6bf96be8e90f542b153de520aad2f0f1759c8521 / . / configurations / meta / yosemite4_sentineldome_t2_retimer.json
blob: 747d42593ca0007988e0ef38436be98738fb882b [file] [log] [blame]
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]1{
2 "Exposes": [
3 {
4 "CheckHysteresisWithSetpoint": true,
5 "Class": "temp",
6 "DCoefficient": 0.0,
7 "FFGainCoefficient": 0.0,
8 "FFOffCoefficient": 0.0,
Eric Yangd7be68d2024-09-12 14:22:43 +0800[diff] [blame]9 "ICoefficient": -0.02,
10 "ILimitMax": 100,
11 "ILimitMin": -50,
12 "Inputs": [
Lora Lin2e141a92024-10-21 16:30:55 +0800[diff] [blame]13 "SENTINEL_DOME_SLOT $bus % 15 MB_X8_RTM_TEMP_C"
Eric Yangd7be68d2024-09-12 14:22:43 +0800[diff] [blame]14 ],
15 "Name": "PID_MB_RETIMER_TEMP_Slot $bus % 15",
16 "NegativeHysteresis": 3.0,
17 "OutLimitMax": 100,
18 "OutLimitMin": 0,
19 "PCoefficient": -5.0,
20 "PositiveHysteresis": 0.0,
21 "SetPoint": 90.0,
22 "SlewNeg": 0.0,
23 "SlewPos": 0.0,
24 "Type": "Pid",
25 "Zones": [
26 "Zone 1"
27 ]
28 },
29 {
30 "CheckHysteresisWithSetpoint": true,
31 "Class": "temp",
32 "DCoefficient": 0.0,
33 "FFGainCoefficient": 0.0,
34 "FFOffCoefficient": 0.0,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]35 "ICoefficient": -0.035,
36 "ILimitMax": 100,
37 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]38 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]39 "Inputs": [
Eric Yang7a90c092025-02-14 13:27:28 +0800[diff] [blame]40 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A0_TEMP_C",
41 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A1_TEMP_C",
42 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A2_TEMP_C",
43 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A3_TEMP_C",
44 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A4_TEMP_C",
45 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A5_TEMP_C",
46 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A6_TEMP_C",
47 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A7_TEMP_C",
48 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A8_TEMP_C",
49 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A9_TEMP_C",
50 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A10_TEMP_C",
51 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A11_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]52 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]53 "Name": "PID_MB_DIMM_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]54 "NegativeHysteresis": 2.0,
55 "OutLimitMax": 100,
56 "OutLimitMin": 0,
57 "PCoefficient": -3.0,
58 "PositiveHysteresis": 0.0,
59 "SetPoint": 75.0,
60 "SlewNeg": 0.0,
61 "SlewPos": 0.0,
62 "Type": "Pid",
63 "Zones": [
64 "Zone 1"
65 ]
66 },
67 {
68 "CheckHysteresisWithSetpoint": true,
69 "Class": "temp",
70 "DCoefficient": 0.0,
71 "FFGainCoefficient": 0.0,
72 "FFOffCoefficient": 0.0,
73 "ICoefficient": -0.035,
74 "ILimitMax": 100,
75 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]76 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]77 "Inputs": [
Lora Lin9790e9e2024-10-21 09:05:48 +0800[diff] [blame]78 "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]79 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]80 "Name": "PID_MB_CPU_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]81 "NegativeHysteresis": 3.0,
82 "OutLimitMax": 100,
83 "OutLimitMin": 0,
84 "PCoefficient": -5.5,
85 "PositiveHysteresis": 0.0,
86 "SetPoint": 74.0,
87 "SlewNeg": 0.0,
88 "SlewPos": 0.0,
89 "Type": "Pid",
90 "Zones": [
91 "Zone 1"
92 ]
93 },
94 {
95 "CheckHysteresisWithSetpoint": true,
96 "Class": "temp",
97 "DCoefficient": 0.0,
98 "FFGainCoefficient": 0.0,
99 "FFOffCoefficient": 0.0,
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]100 "ICoefficient": -0.035,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]101 "ILimitMax": 100,
102 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]103 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]104 "Inputs": [
Lora Lin9790e9e2024-10-21 09:05:48 +0800[diff] [blame]105 "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]106 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]107 "Name": "PID_MB_SSD_BOOT_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]108 "NegativeHysteresis": 2.0,
109 "OutLimitMax": 100,
110 "OutLimitMin": 0,
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]111 "PCoefficient": -5.5,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]112 "PositiveHysteresis": 0.0,
113 "SetPoint": 68.0,
114 "SlewNeg": 0.0,
115 "SlewPos": 0.0,
116 "Type": "Pid",
117 "Zones": [
118 "Zone 1"
119 ]
120 },
121 {
122 "CheckHysteresisWithSetpoint": true,
123 "Class": "temp",
124 "DCoefficient": 0.0,
125 "FFGainCoefficient": 0.0,
126 "FFOffCoefficient": 0.0,
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]127 "ICoefficient": -0.035,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]128 "ILimitMax": 100,
129 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]130 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]131 "Inputs": [
Lora Lin9790e9e2024-10-21 09:05:48 +0800[diff] [blame]132 "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_DATA_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]133 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]134 "Name": "PID_MB_SSD_DATA_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]135 "NegativeHysteresis": 2.0,
136 "OutLimitMax": 100,
137 "OutLimitMin": 0,
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]138 "PCoefficient": -5.5,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]139 "PositiveHysteresis": 0.0,
140 "SetPoint": 68.0,
141 "SlewNeg": 0.0,
142 "SlewPos": 0.0,
143 "Type": "Pid",
144 "Zones": [
145 "Zone 1"
146 ]
147 },
148 {
149 "CheckHysteresisWithSetpoint": true,
150 "Class": "temp",
151 "DCoefficient": 0.0,
152 "FFGainCoefficient": 0.0,
153 "FFOffCoefficient": 0.0,
154 "ICoefficient": -0.02,
155 "ILimitMax": 100,
156 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]157 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]158 "Inputs": [
Lora Lin9790e9e2024-10-21 09:05:48 +0800[diff] [blame]159 "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
160 "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
161 "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
162 "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
163 "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]164 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]165 "Name": "PID_MB_VR_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]166 "NegativeHysteresis": 3.0,
167 "OutLimitMax": 100,
168 "OutLimitMin": 0,
169 "PCoefficient": -3.0,
170 "PositiveHysteresis": 0.0,
171 "SetPoint": 90.0,
172 "SlewNeg": 0.0,
173 "SlewPos": 0.0,
174 "Type": "Pid",
175 "Zones": [
176 "Zone 1"
177 ]
178 },
179 {
180 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]181 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]182 "Inputs": [
Lora Lin9790e9e2024-10-21 09:05:48 +0800[diff] [blame]183 "SENTINEL_DOME_SLOT $bus % 15 MB_INLET_TEMP_C",
184 "SENTINEL_DOME_SLOT $bus % 15 MB_OUTLET_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]185 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]186 "Name": "Stepwise_MB_INLET_OUTLET_TEMP_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]187 "NegativeHysteresis": 0,
188 "Output": [
Ricky CX Wu724d45d2024-11-15 15:38:28 +0800[diff] [blame]189 10.0
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]190 ],
191 "PositiveHysteresis": 0,
192 "Reading": [
193 20.0
194 ],
195 "Type": "Stepwise",
196 "Zones": [
197 "Zone 1"
198 ]
199 },
200 {
201 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]202 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]203 "Inputs": [
Lora Lin2e141a92024-10-21 16:30:55 +0800[diff] [blame]204 "SENTINEL_DOME_SLOT $bus % 15 MB_X8_RTM_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]205 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]206 "Name": "Stepwise_MB_RETIMER_TEMP_Slot $bus % 15",
Eric Yangd7be68d2024-09-12 14:22:43 +0800[diff] [blame]207 "NegativeHysteresis": 2,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]208 "Output": [
Eric Yangd7be68d2024-09-12 14:22:43 +0800[diff] [blame]209 10.0,
210 20.0,
211 25.0,
212 30.0,
213 35.0,
214 40.0,
215 45.0,
216 50.0
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]217 ],
218 "PositiveHysteresis": 0,
219 "Reading": [
Eric Yangd7be68d2024-09-12 14:22:43 +0800[diff] [blame]220 89.0,
221 90.0,
222 91.0,
223 92.0,
224 93.0,
225 94.0,
226 95.0,
227 96.0
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]228 ],
229 "Type": "Stepwise",
230 "Zones": [
231 "Zone 1"
232 ]
233 },
234 {
235 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]236 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]237 "Inputs": [
Ricky CX Wu65911162024-12-12 17:22:40 +0800[diff] [blame]238 "SENTINEL_DOME_SLOT $bus % 15 MB_FIO_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]239 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]240 "Name": "Stepwise_MB_FIO_Slot $bus % 15",
Ricky CX Wu65911162024-12-12 17:22:40 +0800[diff] [blame]241 "NegativeHysteresis": 0,
242 "Output": [
243 10.0
244 ],
245 "PositiveHysteresis": 0,
246 "Reading": [
247 20.0
248 ],
249 "Type": "Stepwise",
250 "Zones": [
251 "Zone 1"
252 ]
253 },
254 {
255 "Class": "temp",
256 "InputUnavailableAsFailed": false,
257 "Inputs": [
258 "CALIBRATED_SENTINEL_DOME_SLOT $bus % 15 MB_FIO_TEMP_C"
259 ],
260 "Name": "Stepwise_CALIBRATED_MB_FIO_Slot $bus % 15",
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]261 "NegativeHysteresis": 1,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]262 "Output": [
263 20.0,
264 21.0,
265 22.0,
266 23.0,
267 24.0,
268 25.0,
269 26.0,
270 27.0,
271 28.0,
272 29.0,
273 30.0,
Ricky CX Wu2826f402024-10-24 13:25:59 +0800[diff] [blame]274 32.0,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]275 33.0,
276 35.0,
277 37.0,
278 38.0,
279 39.0,
280 40.0,
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]281 41.0,
Ricky CX Wu2826f402024-10-24 13:25:59 +0800[diff] [blame]282 42.0
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]283 ],
284 "PositiveHysteresis": 0,
285 "Reading": [
286 20.0,
287 21.0,
288 22.0,
289 23.0,
290 24.0,
291 25.0,
292 26.0,
293 27.0,
294 28.0,
295 29.0,
296 30.0,
297 31.0,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]298 33.0,
299 34.0,
300 35.0,
301 36.0,
302 37.0,
303 38.0,
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]304 39.0,
Ricky CX Wu2826f402024-10-24 13:25:59 +0800[diff] [blame]305 40.0
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]306 ],
307 "Type": "Stepwise",
308 "Zones": [
309 "Zone 1"
310 ]
311 },
312 {
313 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]314 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]315 "Inputs": [
Eric Yang7a90c092025-02-14 13:27:28 +0800[diff] [blame]316 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A0_TEMP_C",
317 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A1_TEMP_C",
318 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A2_TEMP_C",
319 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A3_TEMP_C",
320 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A4_TEMP_C",
321 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A5_TEMP_C",
322 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A6_TEMP_C",
323 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A7_TEMP_C",
324 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A8_TEMP_C",
325 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A9_TEMP_C",
326 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A10_TEMP_C",
327 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A11_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]328 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]329 "Name": "Stepwise_MB_DIMM_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]330 "NegativeHysteresis": 2,
331 "Output": [
332 20.0,
333 22.0,
334 24.0,
335 26.0,
336 28.0,
337 30.0
338 ],
339 "PositiveHysteresis": 0,
340 "Reading": [
341 65.0,
342 66.0,
343 67.0,
344 68.0,
345 69.0,
346 70.0
347 ],
348 "Type": "Stepwise",
349 "Zones": [
350 "Zone 1"
351 ]
352 },
353 {
354 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]355 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]356 "Inputs": [
Lora Lin9790e9e2024-10-21 09:05:48 +0800[diff] [blame]357 "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]358 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]359 "Name": "Stepwise_MB_CPU_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]360 "NegativeHysteresis": 3,
361 "Output": [
362 20.0,
363 25.0,
364 30.0,
365 35.0,
366 40.0,
367 45.0,
368 50.0,
369 55.0,
370 60.0
371 ],
372 "PositiveHysteresis": 0,
373 "Reading": [
374 66.0,
375 67.0,
376 68.0,
377 69.0,
378 70.0,
379 71.0,
380 72.0,
381 73.0,
382 74.0
383 ],
384 "Type": "Stepwise",
385 "Zones": [
386 "Zone 1"
387 ]
388 },
389 {
390 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]391 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]392 "Inputs": [
Lora Lin9790e9e2024-10-21 09:05:48 +0800[diff] [blame]393 "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]394 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]395 "Name": "Stepwise_MB_SSD_BOOT_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]396 "NegativeHysteresis": 2,
397 "Output": [
398 20.0,
399 22.0,
400 24.0,
401 26.0,
402 28.0,
403 30.0
404 ],
405 "PositiveHysteresis": 0,
406 "Reading": [
407 58.0,
408 59.0,
409 60.0,
410 61.0,
411 62.0,
412 63.0
413 ],
414 "Type": "Stepwise",
415 "Zones": [
416 "Zone 1"
417 ]
418 },
419 {
420 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]421 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]422 "Inputs": [
Lora Lin9790e9e2024-10-21 09:05:48 +0800[diff] [blame]423 "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_DATA_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]424 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]425 "Name": "Stepwise_MB_SSD_DATA_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]426 "NegativeHysteresis": 2,
427 "Output": [
428 20.0,
429 22.0,
430 24.0,
431 26.0,
432 28.0,
433 30.0
434 ],
435 "PositiveHysteresis": 0,
436 "Reading": [
437 58.0,
438 59.0,
439 60.0,
440 61.0,
441 62.0,
442 63.0
443 ],
444 "Type": "Stepwise",
445 "Zones": [
446 "Zone 1"
447 ]
448 },
449 {
450 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]451 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]452 "Inputs": [
Lora Lin9790e9e2024-10-21 09:05:48 +0800[diff] [blame]453 "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C",
454 "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C",
455 "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C",
456 "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C",
457 "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]458 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]459 "Name": "Stepwise_MB_VR_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]460 "NegativeHysteresis": 3,
461 "Output": [
462 20.0,
463 22.0,
464 24.0,
465 26.0,
466 28.0,
467 30.0
468 ],
469 "PositiveHysteresis": 0,
470 "Reading": [
471 80.0,
472 81.0,
473 82.0,
474 83.0,
475 84.0,
476 85.0
477 ],
478 "Type": "Stepwise",
479 "Zones": [
480 "Zone 1"
481 ]
482 }
483 ],
484 "Name": "Yosemite 4 Sentinel Dome T2 with Retimer Slot $bus % 15",
485 "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Sentinel Dome Retimer.*', 'PRODUCT_PRODUCT_NAME': 'Yosemite V4', 'PRODUCT_INFO_AM2': 'Yosemite V4 T2'})",
486 "Type": "Board",
487 "xyz.openbmc_project.Inventory.Decorator.Asset": {
488 "BuildDate": "$BOARD_MANUFACTURE_DATE",
489 "Manufacturer": "$BOARD_MANUFACTURER",
490 "Model": "$BOARD_PRODUCT_NAME",
491 "PartNumber": "$BOARD_PART_NUMBER",
492 "SerialNumber": "$BOARD_SERIAL_NUMBER",
493 "SparePartNumber": "$BOARD_INFO_AM1"
494 },
495 "xyz.openbmc_project.Inventory.Decorator.AssetTag": {
496 "AssetTag": "$PRODUCT_ASSET_TAG"
497 },
Oliver Brewkabdad3d52024-08-21 18:49:37 +0200[diff] [blame]498 "xyz.openbmc_project.Inventory.Decorator.ManagedHost": {
499 "HostIndex": "$bus % 15"
500 },
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]501 "xyz.openbmc_project.Inventory.Decorator.Revision": {
502 "Version": "$PRODUCT_VERSION"
503 },
504 "xyz.openbmc_project.Inventory.Decorator.Slot": {
505 "SlotNumber": "$bus % 15"
Ingrid Chenf3b02722024-08-30 17:14:37 +0800[diff] [blame]506 },
507 "xyz.openbmc_project.Inventory.Item.Board.Motherboard": {
508 "ProductId": 1
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]509 }
510}