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Lawrence Tang580423f2022-08-24 09:37:53 +01001/**
2 * Describes available sections to the CPER parser.
Ed Tanousfedd4572024-07-12 13:56:00 -07003 *
Lawrence Tang580423f2022-08-24 09:37:53 +01004 * Author: Lawrence.Tang@arm.com
5 **/
6#include "../edk/Cper.h"
7#include "cper-section.h"
8#include "cper-section-arm.h"
9#include "cper-section-generic.h"
10#include "cper-section-ia32x64.h"
11#include "cper-section-ipf.h"
12#include "cper-section-memory.h"
13#include "cper-section-pcie.h"
14#include "cper-section-firmware.h"
15#include "cper-section-pci-bus.h"
16#include "cper-section-pci-dev.h"
17#include "cper-section-dmar-generic.h"
18#include "cper-section-dmar-vtd.h"
19#include "cper-section-dmar-iommu.h"
20#include "cper-section-ccix-per.h"
21#include "cper-section-cxl-protocol.h"
22#include "cper-section-cxl-component.h"
Karthik Rajagopalan683e0552024-03-07 12:30:43 -080023#include "cper-section-nvidia.h"
Dung Cao04f57712024-08-29 08:03:59 +000024#include "cper-section-ampere.h"
Lawrence Tang580423f2022-08-24 09:37:53 +010025
26//Definitions of all sections available to the CPER parser.
27CPER_SECTION_DEFINITION section_definitions[] = {
John Chungf8fc7052024-05-03 20:05:29 +080028 { &gEfiProcessorGenericErrorSectionGuid, "Processor Generic",
Ed Tanousb07061a2024-09-22 10:33:29 -070029 "GenericProcessor", cper_section_generic_to_ir,
30 ir_section_generic_to_cper },
31 { &gEfiIa32X64ProcessorErrorSectionGuid, "IA32/X64", "Ia32x64Processor",
John Chungf8fc7052024-05-03 20:05:29 +080032 cper_section_ia32x64_to_ir, ir_section_ia32x64_to_cper },
Ed Tanousb07061a2024-09-22 10:33:29 -070033 { &gEfiIpfProcessorErrorSectionGuid, "IPF", "IPF", NULL, NULL },
34 { &gEfiArmProcessorErrorSectionGuid, "ARM", "ArmProcessor",
35 cper_section_arm_to_ir, ir_section_arm_to_cper },
36 { &gEfiPlatformMemoryErrorSectionGuid, "Platform Memory", "Memory",
John Chungf8fc7052024-05-03 20:05:29 +080037 cper_section_platform_memory_to_ir, ir_section_memory_to_cper },
Ed Tanousb07061a2024-09-22 10:33:29 -070038 { &gEfiPlatformMemoryError2SectionGuid, "Platform Memory 2", "Memory2",
John Chungf8fc7052024-05-03 20:05:29 +080039 cper_section_platform_memory2_to_ir, ir_section_memory2_to_cper },
Ed Tanousb07061a2024-09-22 10:33:29 -070040 { &gEfiPcieErrorSectionGuid, "PCIe", "Pcie", cper_section_pcie_to_ir,
John Chungf8fc7052024-05-03 20:05:29 +080041 ir_section_pcie_to_cper },
42 { &gEfiFirmwareErrorSectionGuid, "Firmware Error Record Reference",
Ed Tanousb07061a2024-09-22 10:33:29 -070043 "Firmware", cper_section_firmware_to_ir,
44 ir_section_firmware_to_cper },
45 { &gEfiPciBusErrorSectionGuid, "PCI/PCI-X Bus", "PciBus",
John Chungf8fc7052024-05-03 20:05:29 +080046 cper_section_pci_bus_to_ir, ir_section_pci_bus_to_cper },
Ed Tanousb07061a2024-09-22 10:33:29 -070047 { &gEfiPciDevErrorSectionGuid, "PCI Component/Device", "PciComponent",
John Chungf8fc7052024-05-03 20:05:29 +080048 cper_section_pci_dev_to_ir, ir_section_pci_dev_to_cper },
Ed Tanousb07061a2024-09-22 10:33:29 -070049 { &gEfiDMArGenericErrorSectionGuid, "DMAr Generic", "GenericDmar",
John Chungf8fc7052024-05-03 20:05:29 +080050 cper_section_dmar_generic_to_ir, ir_section_dmar_generic_to_cper },
51 { &gEfiDirectedIoDMArErrorSectionGuid,
Ed Tanousb07061a2024-09-22 10:33:29 -070052 "Intel VT for Directed I/O Specific DMAr", "VtdDmar",
John Chungf8fc7052024-05-03 20:05:29 +080053 cper_section_dmar_vtd_to_ir, ir_section_dmar_vtd_to_cper },
Ed Tanousb07061a2024-09-22 10:33:29 -070054 { &gEfiIommuDMArErrorSectionGuid, "IOMMU Specific DMAr", "IommuDmar",
John Chungf8fc7052024-05-03 20:05:29 +080055 cper_section_dmar_iommu_to_ir, ir_section_dmar_iommu_to_cper },
Ed Tanousb07061a2024-09-22 10:33:29 -070056 { &gEfiCcixPerLogErrorSectionGuid, "CCIX PER Log Error", "CcixPer",
John Chungf8fc7052024-05-03 20:05:29 +080057 cper_section_ccix_per_to_ir, ir_section_ccix_per_to_cper },
Ed Tanousb07061a2024-09-22 10:33:29 -070058 { &gEfiCxlProtocolErrorSectionGuid, "CXL Protocol Error", "CxlProtocol",
John Chungf8fc7052024-05-03 20:05:29 +080059 cper_section_cxl_protocol_to_ir, ir_section_cxl_protocol_to_cper },
60 { &gEfiCxlGeneralMediaErrorSectionGuid,
Ed Tanousb07061a2024-09-22 10:33:29 -070061 "CXL General Media Component Error", "CxlComponent",
John Chungf8fc7052024-05-03 20:05:29 +080062 cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper },
Ed Tanousb07061a2024-09-22 10:33:29 -070063 { &gEfiCxlDramEventErrorSectionGuid, "CXL DRAM Component Error",
64 "CxlComponent", cper_section_cxl_component_to_ir,
John Chungf8fc7052024-05-03 20:05:29 +080065 ir_section_cxl_component_to_cper },
Ed Tanousb07061a2024-09-22 10:33:29 -070066 { &gEfiCxlMemoryModuleErrorSectionGuid,
67 "CXL Memory Module Component Error", "CxlComponent",
68 cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper },
John Chungf8fc7052024-05-03 20:05:29 +080069 { &gEfiCxlPhysicalSwitchErrorSectionGuid,
Ed Tanousb07061a2024-09-22 10:33:29 -070070 "CXL Physical Switch Component Error", "CxlComponent",
John Chungf8fc7052024-05-03 20:05:29 +080071 cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper },
72 { &gEfiCxlVirtualSwitchErrorSectionGuid,
Ed Tanousb07061a2024-09-22 10:33:29 -070073 "CXL Virtual Switch Component Error", "CxlComponent",
John Chungf8fc7052024-05-03 20:05:29 +080074 cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper },
75 { &gEfiCxlMldPortErrorSectionGuid, "CXL MLD Port Component Error",
Ed Tanousb07061a2024-09-22 10:33:29 -070076 "CxlComponent", cper_section_cxl_component_to_ir,
77 ir_section_cxl_component_to_cper },
78 { &gEfiNvidiaErrorSectionGuid, "NVIDIA", "Nvidia",
79 cper_section_nvidia_to_ir, ir_section_nvidia_to_cper },
80 { &gEfiAmpereErrorSectionGuid, "Ampere", "Ampere",
81 cper_section_ampere_to_ir, ir_section_ampere_to_cper },
Lawrence Tang580423f2022-08-24 09:37:53 +010082};
John Chungf8fc7052024-05-03 20:05:29 +080083const size_t section_definitions_len =
84 sizeof(section_definitions) / sizeof(CPER_SECTION_DEFINITION);