Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 1 | /** |
| 2 | * Describes functions for converting ARM CPER sections from binary and JSON format |
| 3 | * into an intermediate format. |
| 4 | * |
| 5 | * Author: Lawrence.Tang@arm.com |
| 6 | **/ |
| 7 | |
| 8 | #include <stdio.h> |
| 9 | #include "json.h" |
Lawrence Tang | d7e8ca3 | 2022-07-07 10:25:53 +0100 | [diff] [blame^] | 10 | #include "b64.h" |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 11 | #include "../edk/Cper.h" |
| 12 | #include "../cper-utils.h" |
| 13 | #include "cper-section-arm.h" |
| 14 | |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 15 | //Private pre-definitions. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 16 | json_object* cper_arm_error_info_to_ir(EFI_ARM_ERROR_INFORMATION_ENTRY* error_info); |
| 17 | json_object* cper_arm_processor_context_to_ir(EFI_ARM_CONTEXT_INFORMATION_HEADER* header, void** cur_pos); |
| 18 | json_object* cper_arm_cache_tlb_error_to_ir(EFI_ARM_CACHE_ERROR_STRUCTURE* cache_tlb_error, EFI_ARM_ERROR_INFORMATION_ENTRY* error_info); |
| 19 | json_object* cper_arm_bus_error_to_ir(EFI_ARM_BUS_ERROR_STRUCTURE* bus_error); |
| 20 | json_object* cper_arm_misc_register_array_to_ir(EFI_ARM_MISC_CONTEXT_REGISTER* misc_register); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 21 | |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 22 | //Converts the given processor-generic CPER section into JSON IR. |
| 23 | json_object* cper_section_arm_to_ir(void* section, EFI_ERROR_SECTION_DESCRIPTOR* descriptor) |
| 24 | { |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 25 | EFI_ARM_ERROR_RECORD* record = (EFI_ARM_ERROR_RECORD*)section; |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 26 | json_object* section_ir = json_object_new_object(); |
| 27 | |
| 28 | //Validation bits. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 29 | json_object* validation = bitfield_to_ir(record->ValidFields, 4, ARM_ERROR_VALID_BITFIELD_NAMES); |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 30 | json_object_object_add(section_ir, "validationBits", validation); |
| 31 | |
| 32 | //Number of error info and context info structures, and length. |
| 33 | json_object_object_add(section_ir, "errorInfoNum", json_object_new_int(record->ErrInfoNum)); |
| 34 | json_object_object_add(section_ir, "contextInfoNum", json_object_new_int(record->ContextInfoNum)); |
| 35 | json_object_object_add(section_ir, "sectionLength", json_object_new_int(record->SectionLength)); |
| 36 | |
| 37 | //Error affinity. |
| 38 | json_object* error_affinity = json_object_new_object(); |
| 39 | json_object_object_add(error_affinity, "value", json_object_new_int(record->ErrorAffinityLevel)); |
| 40 | json_object_object_add(error_affinity, "type", |
| 41 | json_object_new_string(record->ErrorAffinityLevel < 4 ? "Vendor Defined" : "Reserved")); |
| 42 | json_object_object_add(section_ir, "errorAffinity", error_affinity); |
| 43 | |
| 44 | //Processor ID (MPIDR_EL1) and chip ID (MIDR_EL1). |
| 45 | json_object_object_add(section_ir, "mpidrEl1", json_object_new_uint64(record->MPIDR_EL1)); |
| 46 | json_object_object_add(section_ir, "midrEl1", json_object_new_uint64(record->MIDR_EL1)); |
| 47 | |
| 48 | //Whether the processor is running, and the state of it if so. |
| 49 | json_object_object_add(section_ir, "running", json_object_new_boolean(record->RunningState)); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 50 | if (record->RunningState >> 31) |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 51 | { |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 52 | //Bit 32 of running state is on, so PSCI state information is included. |
| 53 | //todo: Look at how to make this human readable from the ARM PSCI document. |
| 54 | json_object_object_add(section_ir, "psciState", json_object_new_int(record->PsciState)); |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 55 | } |
| 56 | |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 57 | //Processor error structures. |
| 58 | json_object* error_info_array = json_object_new_array(); |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 59 | EFI_ARM_ERROR_INFORMATION_ENTRY* cur_error = (EFI_ARM_ERROR_INFORMATION_ENTRY*)(record + 1); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 60 | for (int i=0; i<record->ErrInfoNum; i++) |
| 61 | { |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 62 | json_object_array_add(error_info_array, cper_arm_error_info_to_ir(cur_error)); |
| 63 | cur_error++; |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 64 | } |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 65 | json_object_object_add(section_ir, "errorInfo", error_info_array); |
| 66 | |
| 67 | //Processor context structures. |
| 68 | //The current position is moved within the processing, as it is a dynamic size structure. |
| 69 | void* cur_pos = (void*)cur_error; |
| 70 | EFI_ARM_CONTEXT_INFORMATION_HEADER* header = (EFI_ARM_CONTEXT_INFORMATION_HEADER*)cur_error; |
| 71 | json_object* processor_context = cper_arm_processor_context_to_ir(header, &cur_pos); |
| 72 | |
| 73 | //Is there any vendor-specific information following? |
| 74 | if (cur_pos < section + record->SectionLength) |
| 75 | { |
Lawrence Tang | d7e8ca3 | 2022-07-07 10:25:53 +0100 | [diff] [blame^] | 76 | json_object* vendor_specific = json_object_new_object(); |
| 77 | char* encoded = b64_encode((unsigned char*)cur_pos, section + record->SectionLength - cur_pos); |
| 78 | json_object_object_add(vendor_specific, "data", json_object_new_string(encoded)); |
| 79 | free(encoded); |
| 80 | |
| 81 | json_object_object_add(section_ir, "vendorSpecificInfo", vendor_specific); |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 82 | } |
| 83 | |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 84 | return section_ir; |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 85 | } |
| 86 | |
| 87 | //Converts a single ARM Process Error Information structure into JSON IR. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 88 | json_object* cper_arm_error_info_to_ir(EFI_ARM_ERROR_INFORMATION_ENTRY* error_info) |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 89 | { |
| 90 | json_object* error_info_ir = json_object_new_object(); |
| 91 | |
| 92 | //Version, length. |
| 93 | json_object_object_add(error_info_ir, "version", json_object_new_int(error_info->Version)); |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 94 | json_object_object_add(error_info_ir, "length", json_object_new_int(error_info->Length)); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 95 | |
| 96 | //Validation bitfield. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 97 | json_object* validation = bitfield_to_ir(error_info->ValidationBits, 5, ARM_ERROR_INFO_ENTRY_VALID_BITFIELD_NAMES); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 98 | json_object_object_add(error_info_ir, "validationBits", validation); |
| 99 | |
| 100 | //The type of error information in this log. |
| 101 | //todo: The UEFI spec is ambiguous, what are the values for these?? |
| 102 | json_object* error_type = integer_to_readable_pair(error_info->Type, 4, |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 103 | ARM_ERROR_INFO_ENTRY_INFO_TYPES_KEYS, |
| 104 | ARM_ERROR_INFO_ENTRY_INFO_TYPES_VALUES, |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 105 | "Unknown (Reserved)"); |
| 106 | json_object_object_add(error_info_ir, "errorType", error_type); |
| 107 | |
| 108 | //Multiple error count. |
Lawrence Tang | 22a467c | 2022-07-05 17:21:06 +0100 | [diff] [blame] | 109 | json_object* multiple_error = json_object_new_object(); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 110 | json_object_object_add(multiple_error, "value", json_object_new_int(error_info->MultipleError)); |
| 111 | json_object_object_add(multiple_error, "type", |
| 112 | json_object_new_string(error_info->MultipleError < 1 ? "Single Error" : "Multiple Errors")); |
| 113 | json_object_object_add(error_info_ir, "multipleError", multiple_error); |
| 114 | |
| 115 | //Flags. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 116 | json_object* flags = bitfield_to_ir(error_info->Flags, 4, ARM_ERROR_INFO_ENTRY_FLAGS_NAMES); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 117 | json_object_object_add(error_info_ir, "flags", flags); |
| 118 | |
| 119 | //Error information, split by type. |
| 120 | json_object* error_subinfo = NULL; |
| 121 | switch (error_info->Type) |
| 122 | { |
| 123 | case 0: //Cache |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 124 | case 1: //TLB |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 125 | error_subinfo = cper_arm_cache_tlb_error_to_ir((EFI_ARM_CACHE_ERROR_STRUCTURE*)&error_info->ErrorInformation, error_info); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 126 | break; |
| 127 | case 2: //Bus |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 128 | error_subinfo = cper_arm_bus_error_to_ir((EFI_ARM_BUS_ERROR_STRUCTURE*)&error_info->ErrorInformation); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 129 | break; |
| 130 | } |
| 131 | json_object_object_add(error_info_ir, "errorInformation", error_subinfo); |
| 132 | |
Lawrence Tang | b98ec66 | 2022-07-06 16:50:21 +0100 | [diff] [blame] | 133 | //Virtual fault address, physical fault address. |
| 134 | json_object_object_add(error_info_ir, "virtualFaultAddress", json_object_new_uint64(error_info->VirtualFaultAddress)); |
| 135 | json_object_object_add(error_info_ir, "physicalFaultAddress", json_object_new_uint64(error_info->PhysicalFaultAddress)); |
| 136 | |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 137 | return error_info_ir; |
| 138 | } |
| 139 | |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 140 | //Converts a single ARM cache/TLB error information structure into JSON IR format. |
| 141 | json_object* cper_arm_cache_tlb_error_to_ir(EFI_ARM_CACHE_ERROR_STRUCTURE* cache_tlb_error, EFI_ARM_ERROR_INFORMATION_ENTRY* error_info) |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 142 | { |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 143 | json_object* cache_tlb_error_ir = json_object_new_object(); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 144 | |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 145 | //Validation bitfield. |
| 146 | json_object* validation = bitfield_to_ir(cache_tlb_error->ValidationBits, 7, ARM_CACHE_TLB_ERROR_VALID_BITFIELD_NAMES); |
| 147 | json_object_object_add(cache_tlb_error_ir, "validationBits", validation); |
| 148 | |
| 149 | //Transaction type. |
| 150 | json_object* transaction_type = integer_to_readable_pair(cache_tlb_error->TransactionType, 3, |
| 151 | ARM_ERROR_TRANSACTION_TYPES_KEYS, |
| 152 | ARM_ERROR_TRANSACTION_TYPES_VALUES, |
| 153 | "Unknown (Reserved)"); |
| 154 | json_object_object_add(cache_tlb_error_ir, "transactionType", transaction_type); |
| 155 | |
| 156 | //Operation. |
| 157 | //todo: What are the types' numeric values? UEFI spec is ambiguous |
| 158 | json_object* operation; |
| 159 | if (error_info->Type == 0) |
| 160 | { |
| 161 | //Cache operation. |
| 162 | operation = integer_to_readable_pair(cache_tlb_error->Operation, 11, |
| 163 | ARM_CACHE_BUS_OPERATION_TYPES_KEYS, |
| 164 | ARM_CACHE_BUS_OPERATION_TYPES_VALUES, |
| 165 | "Unknown (Reserved)"); |
| 166 | } |
| 167 | else |
| 168 | { |
| 169 | //TLB operation. |
| 170 | operation = integer_to_readable_pair(cache_tlb_error->Operation, 9, |
| 171 | ARM_TLB_OPERATION_TYPES_KEYS, |
| 172 | ARM_TLB_OPERATION_TYPES_VALUES, |
| 173 | "Unknown (Reserved)"); |
| 174 | } |
| 175 | json_object_object_add(cache_tlb_error_ir, "operation", operation); |
| 176 | |
| 177 | //Miscellaneous remaining fields. |
| 178 | json_object_object_add(cache_tlb_error_ir, "level", json_object_new_int(cache_tlb_error->Level)); |
| 179 | json_object_object_add(cache_tlb_error_ir, "processorContextCorrupt", json_object_new_boolean(cache_tlb_error->ProcessorContextCorrupt)); |
| 180 | json_object_object_add(cache_tlb_error_ir, "corrected", json_object_new_boolean(cache_tlb_error->Corrected)); |
| 181 | json_object_object_add(cache_tlb_error_ir, "precisePC", json_object_new_boolean(cache_tlb_error->PrecisePC)); |
| 182 | json_object_object_add(cache_tlb_error_ir, "restartablePC", json_object_new_boolean(cache_tlb_error->RestartablePC)); |
| 183 | return cache_tlb_error_ir; |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 184 | } |
| 185 | |
| 186 | //Converts a single ARM bus error information structure into JSON IR format. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 187 | json_object* cper_arm_bus_error_to_ir(EFI_ARM_BUS_ERROR_STRUCTURE* bus_error) |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 188 | { |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 189 | json_object* bus_error_ir = json_object_new_object(); |
| 190 | |
| 191 | //Validation bits. |
| 192 | json_object* validation = bitfield_to_ir(bus_error->ValidationBits, 7, ARM_BUS_ERROR_VALID_BITFIELD_NAMES); |
| 193 | json_object_object_add(bus_error_ir, "validationBits", validation); |
| 194 | |
| 195 | //Transaction type. |
| 196 | json_object* transaction_type = integer_to_readable_pair(bus_error->TransactionType, 3, |
| 197 | ARM_ERROR_TRANSACTION_TYPES_KEYS, |
| 198 | ARM_ERROR_TRANSACTION_TYPES_VALUES, |
| 199 | "Unknown (Reserved)"); |
| 200 | json_object_object_add(bus_error_ir, "transactionType", transaction_type); |
| 201 | |
| 202 | //Operation. |
| 203 | json_object* operation = integer_to_readable_pair(bus_error->Operation, 7, |
| 204 | ARM_CACHE_BUS_OPERATION_TYPES_KEYS, |
| 205 | ARM_CACHE_BUS_OPERATION_TYPES_VALUES, |
| 206 | "Unknown (Reserved)"); |
| 207 | json_object_object_add(bus_error_ir, "operation", operation); |
| 208 | |
| 209 | //Affinity level of bus error, + miscellaneous fields. |
| 210 | json_object_object_add(bus_error_ir, "level", json_object_new_int(bus_error->Level)); |
| 211 | json_object_object_add(bus_error_ir, "processorContextCorrupt", json_object_new_boolean(bus_error->ProcessorContextCorrupt)); |
| 212 | json_object_object_add(bus_error_ir, "corrected", json_object_new_boolean(bus_error->Corrected)); |
| 213 | json_object_object_add(bus_error_ir, "precisePC", json_object_new_boolean(bus_error->PrecisePC)); |
| 214 | json_object_object_add(bus_error_ir, "restartablePC", json_object_new_boolean(bus_error->RestartablePC)); |
| 215 | json_object_object_add(bus_error_ir, "timedOut", json_object_new_boolean(bus_error->TimeOut)); |
| 216 | |
| 217 | //Participation type. |
| 218 | json_object* participation_type = integer_to_readable_pair(bus_error->ParticipationType, 4, |
| 219 | ARM_BUS_PARTICIPATION_TYPES_KEYS, |
| 220 | ARM_BUS_PARTICIPATION_TYPES_VALUES, |
| 221 | "Unknown"); |
| 222 | json_object_object_add(bus_error_ir, "participationType", participation_type); |
| 223 | |
| 224 | //Address space. |
| 225 | json_object* address_space = integer_to_readable_pair(bus_error->AddressSpace, 3, |
| 226 | ARM_BUS_ADDRESS_SPACE_TYPES_KEYS, |
| 227 | ARM_BUS_ADDRESS_SPACE_TYPES_VALUES, |
| 228 | "Unknown"); |
| 229 | json_object_object_add(bus_error_ir, "addressSpace", address_space); |
| 230 | |
| 231 | //Memory access attributes. |
| 232 | //todo: find the specification of these in the ARM ARM |
| 233 | //... |
| 234 | |
| 235 | //Access Mode |
| 236 | json_object* access_mode = json_object_new_object(); |
| 237 | json_object_object_add(access_mode, "value", json_object_new_int(bus_error->AccessMode)); |
| 238 | json_object_object_add(access_mode, "name", json_object_new_string(bus_error->AccessMode == 0 ? "Secure" : "Normal")); |
| 239 | json_object_object_add(bus_error_ir, "accessMode", access_mode); |
| 240 | |
| 241 | return bus_error_ir; |
| 242 | } |
| 243 | |
| 244 | //Converts a single ARM processor context block into JSON IR. |
| 245 | json_object* cper_arm_processor_context_to_ir(EFI_ARM_CONTEXT_INFORMATION_HEADER* header, void** cur_pos) |
| 246 | { |
| 247 | json_object* context_ir = json_object_new_object(); |
| 248 | |
| 249 | //Add the context type. |
| 250 | json_object* context_type = integer_to_readable_pair(header->RegisterContextType, 9, |
| 251 | ARM_PROCESSOR_INFO_REGISTER_CONTEXT_TYPES_KEYS, |
| 252 | ARM_PROCESSOR_INFO_REGISTER_CONTEXT_TYPES_VALUES, |
| 253 | "Unknown (Reserved)"); |
| 254 | json_object_object_add(context_ir, "registerContextType", context_type); |
| 255 | |
| 256 | //Register array size (bytes). |
| 257 | json_object_object_add(context_ir, "registerArraySize", json_object_new_uint64(header->RegisterArraySize)); |
| 258 | |
| 259 | //The register array itself. |
| 260 | *cur_pos = (void*)(header + 1); |
| 261 | json_object* register_array = NULL; |
| 262 | switch (header->RegisterContextType) |
| 263 | { |
| 264 | case EFI_ARM_CONTEXT_TYPE_AARCH32_GPR: |
| 265 | register_array = uniform_struct_to_ir((UINT32*)cur_pos, |
| 266 | sizeof(EFI_ARM_V8_AARCH32_GPR) / sizeof(UINT32), ARM_AARCH32_GPR_NAMES); |
| 267 | break; |
| 268 | case EFI_ARM_CONTEXT_TYPE_AARCH32_EL1: |
| 269 | register_array = uniform_struct_to_ir((UINT32*)cur_pos, |
| 270 | sizeof(EFI_ARM_AARCH32_EL1_CONTEXT_REGISTERS) / sizeof(UINT32), ARM_AARCH32_EL1_REGISTER_NAMES); |
| 271 | break; |
| 272 | case EFI_ARM_CONTEXT_TYPE_AARCH32_EL2: |
| 273 | register_array = uniform_struct_to_ir((UINT32*)cur_pos, |
| 274 | sizeof(EFI_ARM_AARCH32_EL2_CONTEXT_REGISTERS) / sizeof(UINT32), ARM_AARCH32_EL2_REGISTER_NAMES); |
| 275 | break; |
| 276 | case EFI_ARM_CONTEXT_TYPE_AARCH32_SECURE: |
| 277 | register_array = uniform_struct_to_ir((UINT32*)cur_pos, |
| 278 | sizeof(EFI_ARM_AARCH32_SECURE_CONTEXT_REGISTERS) / sizeof(UINT32), ARM_AARCH32_SECURE_REGISTER_NAMES); |
| 279 | break; |
| 280 | case EFI_ARM_CONTEXT_TYPE_AARCH64_GPR: |
| 281 | register_array = uniform_struct64_to_ir((UINT64*)cur_pos, |
| 282 | sizeof(EFI_ARM_V8_AARCH64_GPR) / sizeof(UINT64), ARM_AARCH64_GPR_NAMES); |
| 283 | break; |
| 284 | case EFI_ARM_CONTEXT_TYPE_AARCH64_EL1: |
| 285 | register_array = uniform_struct64_to_ir((UINT64*)cur_pos, |
| 286 | sizeof(EFI_ARM_AARCH64_EL1_CONTEXT_REGISTERS) / sizeof(UINT64), ARM_AARCH64_EL1_REGISTER_NAMES); |
| 287 | break; |
| 288 | case EFI_ARM_CONTEXT_TYPE_AARCH64_EL2: |
| 289 | register_array = uniform_struct64_to_ir((UINT64*)cur_pos, |
| 290 | sizeof(EFI_ARM_AARCH64_EL2_CONTEXT_REGISTERS) / sizeof(UINT64), ARM_AARCH64_EL2_REGISTER_NAMES); |
| 291 | break; |
| 292 | case EFI_ARM_CONTEXT_TYPE_AARCH64_EL3: |
| 293 | register_array = uniform_struct64_to_ir((UINT64*)cur_pos, |
| 294 | sizeof(EFI_ARM_AARCH64_EL3_CONTEXT_REGISTERS) / sizeof(UINT64), ARM_AARCH64_EL3_REGISTER_NAMES); |
| 295 | break; |
| 296 | case EFI_ARM_CONTEXT_TYPE_MISC: |
| 297 | register_array = cper_arm_misc_register_array_to_ir((EFI_ARM_MISC_CONTEXT_REGISTER*)cur_pos); |
| 298 | break; |
| 299 | default: |
Lawrence Tang | d7e8ca3 | 2022-07-07 10:25:53 +0100 | [diff] [blame^] | 300 | //Unknown register array type, add as base64 data instead. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 301 | register_array = json_object_new_object(); |
Lawrence Tang | d7e8ca3 | 2022-07-07 10:25:53 +0100 | [diff] [blame^] | 302 | char* encoded = b64_encode((unsigned char*)cur_pos, header->RegisterArraySize); |
| 303 | json_object_object_add(register_array, "data", json_object_new_string(encoded)); |
| 304 | free(encoded); |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame] | 305 | break; |
| 306 | } |
| 307 | |
| 308 | //Set the current position to after the processor context structure. |
| 309 | *cur_pos = (UINT8*)(*cur_pos) + header->RegisterArraySize; |
| 310 | |
| 311 | return context_ir; |
| 312 | } |
| 313 | |
| 314 | //Converts a single CPER ARM miscellaneous register array to JSON IR format. |
| 315 | json_object* cper_arm_misc_register_array_to_ir(EFI_ARM_MISC_CONTEXT_REGISTER* misc_register) |
| 316 | { |
| 317 | json_object* register_array = json_object_new_object(); |
| 318 | json_object* mrs_encoding = json_object_new_object(); |
| 319 | json_object_object_add(mrs_encoding, "op2", json_object_new_int(misc_register->MrsOp2)); |
| 320 | json_object_object_add(mrs_encoding, "crm", json_object_new_int(misc_register->MrsOp2)); |
| 321 | json_object_object_add(mrs_encoding, "crn", json_object_new_int(misc_register->MrsOp2)); |
| 322 | json_object_object_add(mrs_encoding, "op1", json_object_new_int(misc_register->MrsOp2)); |
| 323 | json_object_object_add(mrs_encoding, "o0", json_object_new_int(misc_register->MrsOp2)); |
| 324 | json_object_object_add(register_array, "mrsEncoding", mrs_encoding); |
| 325 | json_object_object_add(register_array, "value", json_object_new_uint64(misc_register->Value)); |
| 326 | |
| 327 | return register_array; |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 328 | } |