blob: 79bd600d800bbcaec233275e5b8be98c239318d0 [file] [log] [blame]
Lawrence Tang079d5812022-07-12 14:15:32 +01001{
Lawrence Tang079d5812022-07-12 14:15:32 +01002 "$schema": "https://json-schema.org/draft/2020-12/schema",
3 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -08004 "description": "PCI Express Error Section",
John Chung044afd02024-05-03 19:58:02 +08005 "required": [
6 "validationBits",
7 "portType",
8 "version",
9 "commandStatus",
10 "deviceID",
11 "deviceSerialNumber",
12 "bridgeControlStatus",
13 "capabilityStructure",
14 "aerInfo"
15 ],
Lawrence Tang079d5812022-07-12 14:15:32 +010016 "additionalProperties": false,
17 "properties": {
18 "validationBits": {
19 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -080020 "description": "Indicates validity of other fields in this section.",
John Chung044afd02024-05-03 19:58:02 +080021 "required": [
22 "portTypeValid",
23 "versionValid",
24 "commandStatusValid",
25 "deviceIDValid",
26 "deviceSerialNumberValid",
27 "bridgeControlStatusValid",
28 "capabilityStructureStatusValid",
29 "aerInfoValid"
30 ],
Lawrence Tang079d5812022-07-12 14:15:32 +010031 "properties": {
32 "portTypeValid": {
33 "type": "boolean"
34 },
35 "versionValid": {
36 "type": "boolean"
37 },
38 "commandStatusValid": {
39 "type": "boolean"
40 },
41 "deviceIDValid": {
42 "type": "boolean"
43 },
44 "deviceSerialNumberValid": {
45 "type": "boolean"
46 },
47 "bridgeControlStatusValid": {
48 "type": "boolean"
49 },
50 "capabilityStructureStatusValid": {
51 "type": "boolean"
52 },
53 "aerInfoValid": {
54 "type": "boolean"
55 }
56 }
57 },
58 "portType": {
59 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -080060 "description": "PCIe Device/Port Type as defined in the PCI Express capabilities register.",
Lawrence Tang8a2d7372022-07-12 16:44:49 +010061 "$ref": "./common/cper-json-nvp.json"
Lawrence Tang079d5812022-07-12 14:15:32 +010062 },
63 "version": {
64 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -080065 "description": "PCIe Spec. version supported by the platform",
Lawrence Tang079d5812022-07-12 14:15:32 +010066 "required": ["major", "minor"],
67 "properties": {
68 "major": {
69 "type": "integer"
70 },
71 "minor": {
72 "type": "integer"
73 }
74 }
75 },
76 "commandStatus": {
77 "type": "object",
78 "required": ["commandRegister", "statusRegister"],
79 "properties": {
80 "commandRegister": {
Andrew Adrianced9835a12024-12-05 14:41:42 -080081 "type": "integer",
82 "description": "PCI Command Register"
Lawrence Tang079d5812022-07-12 14:15:32 +010083 },
84 "statusRegister": {
Andrew Adrianced9835a12024-12-05 14:41:42 -080085 "type": "integer",
86 "description": "PCI Status Register"
Lawrence Tang079d5812022-07-12 14:15:32 +010087 }
88 }
89 },
90 "deviceID": {
91 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -080092 "description": "PCIe Root Port PCI/bridge PCI compatible device number and bus number information to uniquely identify the root port or bridge.",
John Chung044afd02024-05-03 19:58:02 +080093 "required": [
94 "vendorID",
95 "deviceID",
96 "classCode",
97 "functionNumber",
98 "deviceNumber",
99 "segmentNumber",
100 "primaryOrDeviceBusNumber",
101 "secondaryBusNumber",
102 "slotNumber"
103 ],
Lawrence Tang079d5812022-07-12 14:15:32 +0100104 "properties": {
105 "vendorID": {
106 "type": "integer"
107 },
108 "deviceID": {
109 "type": "integer"
110 },
111 "classCode": {
112 "type": "integer"
113 },
114 "functionNumber": {
115 "type": "integer"
116 },
117 "deviceNumber": {
118 "type": "integer"
119 },
120 "segmentNumber": {
121 "type": "integer"
122 },
123 "primaryOrDeviceBusNumber": {
124 "type": "integer"
125 },
126 "secondaryBusNumber": {
127 "type": "integer"
128 },
129 "slotNumber": {
130 "type": "integer"
131 }
132 }
133 },
134 "deviceSerialNumber": {
Andrew Adrianced9835a12024-12-05 14:41:42 -0800135 "type": "integer",
136 "description": "PCIe Device Serial Number"
Lawrence Tang079d5812022-07-12 14:15:32 +0100137 },
138 "bridgeControlStatus": {
139 "type": "object",
140 "required": ["secondaryStatusRegister", "controlRegister"],
141 "properties": {
142 "secondaryStatusRegister": {
Andrew Adrianced9835a12024-12-05 14:41:42 -0800143 "type": "integer",
144 "description": "Bridge Secondary Status Register"
Lawrence Tang079d5812022-07-12 14:15:32 +0100145 },
146 "controlRegister": {
Andrew Adrianced9835a12024-12-05 14:41:42 -0800147 "type": "integer",
148 "description": "Bridge Control Register"
Lawrence Tang079d5812022-07-12 14:15:32 +0100149 }
150 }
151 },
152 "capabilityStructure": {
153 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -0800154 "description": "This feild reports either the PCIe 2.0 Capability structure",
Lawrence Tang079d5812022-07-12 14:15:32 +0100155 "required": ["data"],
156 "properties": {
157 "data": {
158 "type": "string"
159 }
160 }
161 },
162 "aerInfo": {
163 "type": "object",
Andrew Adrianced9835a12024-12-05 14:41:42 -0800164 "description": "PCIe Advanced Error Reporting Extended Capability Structure.",
Lawrence Tang3ab351f2022-07-20 16:09:34 +0100165 "required": ["data"],
Lawrence Tang079d5812022-07-12 14:15:32 +0100166 "properties": {
Lawrence Tang3ab351f2022-07-20 16:09:34 +0100167 "data": {
Lawrence Tang079d5812022-07-12 14:15:32 +0100168 "type": "string"
Andrew Adriance3cebfc22024-11-20 12:57:04 -0800169 },
170 "capability_header": {
171 "type": "integer"
172 },
173 "uncorrectable_error_status": {
174 "type": "integer"
175 },
176 "uncorrectable_error_mask": {
177 "type": "integer"
178 },
179 "uncorrectable_error_severity": {
180 "type": "integer"
181 },
182 "correctable_error_status": {
183 "type": "integer"
184 },
185 "correctable_error_mask": {
186 "type": "integer"
187 },
188 "capabilites_control": {
189 "type": "integer"
190 },
191 "tlp_header_0": {
192 "type": "integer"
193 },
194 "tlp_header_1": {
195 "type": "integer"
196 },
197 "tlp_header_2": {
198 "type": "integer"
199 },
200 "tlp_header_3": {
201 "type": "integer"
Lawrence Tang079d5812022-07-12 14:15:32 +0100202 }
203 }
204 }
205 }
John Chung044afd02024-05-03 19:58:02 +0800206}