Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 1 | { |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 2 | "$schema": "https://json-schema.org/draft/2020-12/schema", |
| 3 | "type": "object", |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 4 | "description": "PCI Express Error Section", |
John Chung | 044afd0 | 2024-05-03 19:58:02 +0800 | [diff] [blame] | 5 | "required": [ |
| 6 | "validationBits", |
| 7 | "portType", |
| 8 | "version", |
| 9 | "commandStatus", |
| 10 | "deviceID", |
| 11 | "deviceSerialNumber", |
| 12 | "bridgeControlStatus", |
| 13 | "capabilityStructure", |
| 14 | "aerInfo" |
| 15 | ], |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 16 | "additionalProperties": false, |
| 17 | "properties": { |
| 18 | "validationBits": { |
| 19 | "type": "object", |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 20 | "description": "Indicates validity of other fields in this section.", |
John Chung | 044afd0 | 2024-05-03 19:58:02 +0800 | [diff] [blame] | 21 | "required": [ |
| 22 | "portTypeValid", |
| 23 | "versionValid", |
| 24 | "commandStatusValid", |
| 25 | "deviceIDValid", |
| 26 | "deviceSerialNumberValid", |
| 27 | "bridgeControlStatusValid", |
| 28 | "capabilityStructureStatusValid", |
| 29 | "aerInfoValid" |
| 30 | ], |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 31 | "properties": { |
| 32 | "portTypeValid": { |
| 33 | "type": "boolean" |
| 34 | }, |
| 35 | "versionValid": { |
| 36 | "type": "boolean" |
| 37 | }, |
| 38 | "commandStatusValid": { |
| 39 | "type": "boolean" |
| 40 | }, |
| 41 | "deviceIDValid": { |
| 42 | "type": "boolean" |
| 43 | }, |
| 44 | "deviceSerialNumberValid": { |
| 45 | "type": "boolean" |
| 46 | }, |
| 47 | "bridgeControlStatusValid": { |
| 48 | "type": "boolean" |
| 49 | }, |
| 50 | "capabilityStructureStatusValid": { |
| 51 | "type": "boolean" |
| 52 | }, |
| 53 | "aerInfoValid": { |
| 54 | "type": "boolean" |
| 55 | } |
| 56 | } |
| 57 | }, |
| 58 | "portType": { |
| 59 | "type": "object", |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 60 | "description": "PCIe Device/Port Type as defined in the PCI Express capabilities register.", |
Lawrence Tang | 8a2d737 | 2022-07-12 16:44:49 +0100 | [diff] [blame] | 61 | "$ref": "./common/cper-json-nvp.json" |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 62 | }, |
| 63 | "version": { |
| 64 | "type": "object", |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 65 | "description": "PCIe Spec. version supported by the platform", |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 66 | "required": ["major", "minor"], |
| 67 | "properties": { |
| 68 | "major": { |
| 69 | "type": "integer" |
| 70 | }, |
| 71 | "minor": { |
| 72 | "type": "integer" |
| 73 | } |
| 74 | } |
| 75 | }, |
| 76 | "commandStatus": { |
| 77 | "type": "object", |
| 78 | "required": ["commandRegister", "statusRegister"], |
| 79 | "properties": { |
| 80 | "commandRegister": { |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 81 | "type": "integer", |
| 82 | "description": "PCI Command Register" |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 83 | }, |
| 84 | "statusRegister": { |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 85 | "type": "integer", |
| 86 | "description": "PCI Status Register" |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 87 | } |
| 88 | } |
| 89 | }, |
| 90 | "deviceID": { |
| 91 | "type": "object", |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 92 | "description": "PCIe Root Port PCI/bridge PCI compatible device number and bus number information to uniquely identify the root port or bridge.", |
John Chung | 044afd0 | 2024-05-03 19:58:02 +0800 | [diff] [blame] | 93 | "required": [ |
| 94 | "vendorID", |
| 95 | "deviceID", |
| 96 | "classCode", |
| 97 | "functionNumber", |
| 98 | "deviceNumber", |
| 99 | "segmentNumber", |
| 100 | "primaryOrDeviceBusNumber", |
| 101 | "secondaryBusNumber", |
| 102 | "slotNumber" |
| 103 | ], |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 104 | "properties": { |
| 105 | "vendorID": { |
| 106 | "type": "integer" |
| 107 | }, |
| 108 | "deviceID": { |
| 109 | "type": "integer" |
| 110 | }, |
| 111 | "classCode": { |
| 112 | "type": "integer" |
| 113 | }, |
| 114 | "functionNumber": { |
| 115 | "type": "integer" |
| 116 | }, |
| 117 | "deviceNumber": { |
| 118 | "type": "integer" |
| 119 | }, |
| 120 | "segmentNumber": { |
| 121 | "type": "integer" |
| 122 | }, |
| 123 | "primaryOrDeviceBusNumber": { |
| 124 | "type": "integer" |
| 125 | }, |
| 126 | "secondaryBusNumber": { |
| 127 | "type": "integer" |
| 128 | }, |
| 129 | "slotNumber": { |
| 130 | "type": "integer" |
| 131 | } |
| 132 | } |
| 133 | }, |
| 134 | "deviceSerialNumber": { |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 135 | "type": "integer", |
| 136 | "description": "PCIe Device Serial Number" |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 137 | }, |
| 138 | "bridgeControlStatus": { |
| 139 | "type": "object", |
| 140 | "required": ["secondaryStatusRegister", "controlRegister"], |
| 141 | "properties": { |
| 142 | "secondaryStatusRegister": { |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 143 | "type": "integer", |
| 144 | "description": "Bridge Secondary Status Register" |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 145 | }, |
| 146 | "controlRegister": { |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 147 | "type": "integer", |
| 148 | "description": "Bridge Control Register" |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 149 | } |
| 150 | } |
| 151 | }, |
| 152 | "capabilityStructure": { |
| 153 | "type": "object", |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 154 | "description": "This feild reports either the PCIe 2.0 Capability structure", |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 155 | "required": ["data"], |
| 156 | "properties": { |
| 157 | "data": { |
| 158 | "type": "string" |
| 159 | } |
| 160 | } |
| 161 | }, |
| 162 | "aerInfo": { |
| 163 | "type": "object", |
Andrew Adriance | d9835a1 | 2024-12-05 14:41:42 -0800 | [diff] [blame^] | 164 | "description": "PCIe Advanced Error Reporting Extended Capability Structure.", |
Lawrence Tang | 3ab351f | 2022-07-20 16:09:34 +0100 | [diff] [blame] | 165 | "required": ["data"], |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 166 | "properties": { |
Lawrence Tang | 3ab351f | 2022-07-20 16:09:34 +0100 | [diff] [blame] | 167 | "data": { |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 168 | "type": "string" |
Andrew Adriance | 3cebfc2 | 2024-11-20 12:57:04 -0800 | [diff] [blame] | 169 | }, |
| 170 | "capability_header": { |
| 171 | "type": "integer" |
| 172 | }, |
| 173 | "uncorrectable_error_status": { |
| 174 | "type": "integer" |
| 175 | }, |
| 176 | "uncorrectable_error_mask": { |
| 177 | "type": "integer" |
| 178 | }, |
| 179 | "uncorrectable_error_severity": { |
| 180 | "type": "integer" |
| 181 | }, |
| 182 | "correctable_error_status": { |
| 183 | "type": "integer" |
| 184 | }, |
| 185 | "correctable_error_mask": { |
| 186 | "type": "integer" |
| 187 | }, |
| 188 | "capabilites_control": { |
| 189 | "type": "integer" |
| 190 | }, |
| 191 | "tlp_header_0": { |
| 192 | "type": "integer" |
| 193 | }, |
| 194 | "tlp_header_1": { |
| 195 | "type": "integer" |
| 196 | }, |
| 197 | "tlp_header_2": { |
| 198 | "type": "integer" |
| 199 | }, |
| 200 | "tlp_header_3": { |
| 201 | "type": "integer" |
Lawrence Tang | 079d581 | 2022-07-12 14:15:32 +0100 | [diff] [blame] | 202 | } |
| 203 | } |
| 204 | } |
| 205 | } |
John Chung | 044afd0 | 2024-05-03 19:58:02 +0800 | [diff] [blame] | 206 | } |