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Supreeth Venkatesh5b116112020-07-30 13:28:46 -05001From 6411fa78f2caa3dfcb938083baf63fe00aa8f181 Mon Sep 17 00:00:00 2001
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -05002From: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
3Date: Wed, 27 May 2020 14:45:32 -0500
Supreeth Venkatesh5b116112020-07-30 13:28:46 -05004Subject: [PATCH v3 1/1] ARM:dts:aspeed: Initial device tree for AMD EthanolX
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Supreeth Venkateshd052d0d2020-05-27 15:40:42 -05007
Supreeth Venkatesh5b116112020-07-30 13:28:46 -05008Initial introduction of AMD EthanolX platform equipped with an
9Aspeed ast2500 BMC manufactured by AMD.
10
11AMD EthanolX platform is an AMD customer reference board with an
12Aspeed ast2500 BMC manufactured by AMD.
13This adds AMD EthanolX device tree file including the flash layout
14used by EthanolX BMC machines.
15
16This also adds an entry of AMD EthanolX device tree file in Makefile.
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -050017
18Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
19---
Supreeth Venkatesh5b116112020-07-30 13:28:46 -050020Changes since v2:
21* Removed incorrect I2C0 and I2C1 Reg addresses
22
23Changes since v1:
24* Addressed review comment regarding SPDX License Identifier
25* Added I2c0 and I2c1 which cater to AMD's APML Interface
26---
27 arch/arm/boot/dts/Makefile | 1 +
28 arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts | 219 ++++++++++++++++++
29 2 files changed, 220 insertions(+)
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -050030 create mode 100644 arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
31
Supreeth Venkatesh5b116112020-07-30 13:28:46 -050032diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
33index d6dfdf73e66b..55ed881d2ebc 100644
34--- a/arch/arm/boot/dts/Makefile
35+++ b/arch/arm/boot/dts/Makefile
36@@ -1281,6 +1281,7 @@ dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
37 dtb-$(CONFIG_ARCH_ASPEED) += \
38 aspeed-ast2500-evb.dtb \
39 aspeed-ast2600-evb.dtb \
40+ aspeed-bmc-amd-ethanolx.dtb \
41 aspeed-bmc-arm-centriq2400-rep.dtb \
42 aspeed-bmc-arm-stardragon4800-rep2.dtb \
43 aspeed-bmc-facebook-cmm.dtb \
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -050044diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
45new file mode 100644
Supreeth Venkatesh5b116112020-07-30 13:28:46 -050046index 000000000000..60ba86f3e5bc
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -050047--- /dev/null
48+++ b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
Supreeth Venkatesh5b116112020-07-30 13:28:46 -050049@@ -0,0 +1,219 @@
50+// SPDX-License-Identifier: GPL-2.0
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -050051+// Copyright (c) 2020 AMD Inc.
52+// Author: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
53+/dts-v1/;
54+
55+#include "aspeed-g5.dtsi"
56+#include <dt-bindings/gpio/aspeed-gpio.h>
57+
58+/ {
59+ model = "AMD EthanolX BMC";
60+ compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
61+
62+ memory@80000000 {
63+ reg = <0x80000000 0x20000000>;
64+ };
65+ aliases {
66+ serial0 = &uart1;
67+ serial4 = &uart5;
68+ };
69+ chosen {
70+ stdout-path = &uart5;
71+ bootargs = "console=ttyS4,115200 earlyprintk";
72+ };
73+ leds {
Supreeth Venkatesh3a77e1a2020-06-24 10:51:40 -050074+ compatible = "gpio-leds";
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -050075+
76+ fault {
77+ gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
78+ };
79+
80+ identify {
81+ gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
82+ };
83+ };
84+ iio-hwmon {
85+ compatible = "iio-hwmon";
86+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;
87+ };
88+};
89+
90+&fmc {
91+ status = "okay";
92+ flash@0 {
93+ status = "okay";
94+ m25p,fast-read;
95+ #include "openbmc-flash-layout.dtsi"
96+ };
97+};
98+
99+
100+&mac0 {
101+ status = "okay";
102+
103+ pinctrl-names = "default";
104+ pinctrl-0 = <&pinctrl_rmii1_default>;
105+ clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
Supreeth Venkatesh5b116112020-07-30 13:28:46 -0500106+ <&syscon ASPEED_CLK_MAC1RCLK>;
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500107+ clock-names = "MACCLK", "RCLK";
108+};
109+
110+&uart1 {
111+ //Host Console
112+ status = "okay";
113+ pinctrl-names = "default";
114+ pinctrl-0 = <&pinctrl_txd1_default
Supreeth Venkatesh5b116112020-07-30 13:28:46 -0500115+ &pinctrl_rxd1_default>;
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500116+};
117+
118+&uart5 {
119+ //BMC Console
120+ status = "okay";
121+};
122+
123+&adc {
124+ status = "okay";
125+
126+ pinctrl-names = "default";
127+ pinctrl-0 = <&pinctrl_adc0_default
Supreeth Venkatesh5b116112020-07-30 13:28:46 -0500128+ &pinctrl_adc1_default
129+ &pinctrl_adc2_default
130+ &pinctrl_adc3_default
131+ &pinctrl_adc4_default>;
132+};
133+
134+//APML for P0
135+&i2c0 {
136+ status = "okay";
137+};
138+
139+//APML for P1
140+&i2c1 {
141+ status = "okay";
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500142+};
143+
Supreeth Venkatesh3a77e1a2020-06-24 10:51:40 -0500144+// Thermal Sensors
145+&i2c7 {
146+ status = "okay";
147+
148+ lm75a@48 {
149+ compatible = "national,lm75a";
150+ reg = <0x48>;
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500151+ };
152+
Supreeth Venkatesh3a77e1a2020-06-24 10:51:40 -0500153+ lm75a@49 {
154+ compatible = "national,lm75a";
155+ reg = <0x49>;
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500156+ };
157+
Supreeth Venkatesh3a77e1a2020-06-24 10:51:40 -0500158+ lm75a@4a {
159+ compatible = "national,lm75a";
160+ reg = <0x4a>;
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500161+ };
162+
Supreeth Venkatesh3a77e1a2020-06-24 10:51:40 -0500163+ lm75a@4b {
164+ compatible = "national,lm75a";
165+ reg = <0x4b>;
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500166+ };
167+
Supreeth Venkatesh3a77e1a2020-06-24 10:51:40 -0500168+ lm75a@4c {
169+ compatible = "national,lm75a";
170+ reg = <0x4c>;
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500171+ };
172+
Supreeth Venkatesh3a77e1a2020-06-24 10:51:40 -0500173+ lm75a@4d {
174+ compatible = "national,lm75a";
175+ reg = <0x4d>;
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500176+ };
177+
Supreeth Venkatesh3a77e1a2020-06-24 10:51:40 -0500178+ lm75a@4e {
179+ compatible = "national,lm75a";
180+ reg = <0x4e>;
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500181+ };
182+
Supreeth Venkatesh3a77e1a2020-06-24 10:51:40 -0500183+ lm75a@4f {
184+ compatible = "national,lm75a";
185+ reg = <0x4f>;
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -0500186+ };
187+};
188+
189+&kcs1 {
190+ status = "okay";
191+ kcs_addr = <0x60>;
192+};
193+
194+&kcs2 {
195+ status = "okay";
196+ kcs_addr = <0x62>;
197+};
198+
199+&kcs4 {
200+ status = "okay";
201+ kcs_addr = <0x97DE>;
202+};
203+
204+&lpc_snoop {
205+ status = "okay";
206+ snoop-ports = <0x80>;
207+};
208+
209+&lpc_ctrl {
210+ //Enable lpc clock
211+ status = "okay";
212+};
213+
214+&pwm_tacho {
215+ status = "okay";
216+ pinctrl-names = "default";
217+ pinctrl-0 = <&pinctrl_pwm0_default
218+ &pinctrl_pwm1_default
219+ &pinctrl_pwm2_default
220+ &pinctrl_pwm3_default
221+ &pinctrl_pwm4_default
222+ &pinctrl_pwm5_default
223+ &pinctrl_pwm6_default
224+ &pinctrl_pwm7_default>;
225+
226+ fan@0 {
227+ reg = <0x00>;
228+ aspeed,fan-tach-ch = /bits/ 8 <0x00>;
229+ };
230+
231+ fan@1 {
232+ reg = <0x01>;
233+ aspeed,fan-tach-ch = /bits/ 8 <0x01>;
234+ };
235+
236+ fan@2 {
237+ reg = <0x02>;
238+ aspeed,fan-tach-ch = /bits/ 8 <0x02>;
239+ };
240+
241+ fan@3 {
242+ reg = <0x03>;
243+ aspeed,fan-tach-ch = /bits/ 8 <0x03>;
244+ };
245+
246+ fan@4 {
247+ reg = <0x04>;
248+ aspeed,fan-tach-ch = /bits/ 8 <0x04>;
249+ };
250+
251+ fan@5 {
252+ reg = <0x05>;
253+ aspeed,fan-tach-ch = /bits/ 8 <0x05>;
254+ };
255+
256+ fan@6 {
257+ reg = <0x06>;
258+ aspeed,fan-tach-ch = /bits/ 8 <0x06>;
259+ };
260+
261+ fan@7 {
262+ reg = <0x07>;
263+ aspeed,fan-tach-ch = /bits/ 8 <0x07>;
264+ };
265+};
266+
267+
268+
Supreeth Venkatesh3a77e1a2020-06-24 10:51:40 -0500269--
Supreeth Venkateshd052d0d2020-05-27 15:40:42 -05002702.17.1
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