blob: 03deb3026374768dcfb70e4ecec712ba4ccecbcf [file] [log] [blame]
Oshri Alkoby (NTIL)07a65b52019-01-19 00:00:10 +02001<!-- SPDX-License-Identifier: GPL-2.0
2#
3# Nuvoton IGPS: Image Generation And Programming Scripts For Poleg BMC
4#
5# Copyright (C) 2018 Nuvoton Technologies, All Rights Reserved
6#--------------------------------------------------------------------------->
7
8<?xml version="1.0" encoding="UTF-8"?>
9
10<Bin_Ecc_Map>
11 <!-- BMC mandatory fields -->
12 <ImageProperties>
13 <BinSize>0</BinSize> <!-- If 0 the binary size will be calculated by the tool -->
14 <PadValue>0xFF</PadValue> <!-- Byte value to pad the empty areas, default is 0 -->
15 </ImageProperties>
16
17 <BinField>
18 <!-- BootBlock tag (0x50 0x07 0x55 0xAA 0x54 0x4F 0x4F 0x42) or
19 uboot tag (0x55 0x42 0x4F 0x4F 0x54 0x42 0x4C 0x4B) -->
20 <name>StartTag</name> <!-- name of field -->
21 <config>
22 <offset>0</offset>
23 <size>0x8</size>
24 </config>
25 <content format='bytes'>0x50 0x07 0x55 0xAA 0x54 0x4F 0x4F 0x42</content> <!-- content the user should fill -->
26 </BinField>
27
28 <BinField>
29 <!-- Code destination address, 32-bit aligned: for BootBlock should be 0xFFFD5E00 so code will run in 0xFFFD6000 as linked for -->
30 <name>DestAddr</name> <!-- name of field -->
31 <config>
32 <offset>0x140</offset>
33 <size>0x4</size>
34 </config>
35 <content format='32bit'>0xFFFD5E00</content> <!-- content the user should fill -->
36 </BinField>
37
38 <BinField>
39 <!-- BootBlock or u-boot Code size -->
40 <name>CodeSize</name> <!-- name of field -->
41 <config>
42 <offset>0x144</offset>
43 <size>0x4</size>
44 </config>
45 <content format='FileSize'>Poleg_bootblock.bin</content> <!-- content the user should fill -->
46 </BinField>
47
48 <BinField>
49 <!-- The BootBlock or u-boot binary file -->
50 <name>Code</name> <!-- name of field -->
51 <config>
52 <offset>0x200</offset>
53 <size format='FileSize'>Poleg_bootblock.bin</size> <!-- size in the header calculated by tool-->
54 </config>
55 <content format='FileContent'>Poleg_bootblock.bin</content> <!-- content the user should fill -->
56 </BinField>
57
58 <!-- BMC optional fields -->
59 <BinField>
60 <!-- Word contents copied by ROM code to FIU0 FIU_DRD_CFG register -->
61 <name>FIU0_DRD_CFG_Set</name> <!-- name of field -->
62 <config>
63 <offset>0x108</offset>
64 <size>0x4</size>
65 </config>
66 <content format='32bit'>0x030011BB</content> <!-- content the user should fill -->
67 </BinField>
68
69 <BinField>
70 <!-- Defines the clock divide ratio from AHB to FIU0 clock -->
71 <name>FIU_Clk_Divider</name> <!-- name of field -->
72 <config>
73 <offset>0x10C</offset>
74 <size>0x1</size>
75 </config>
76 <content format='bytes'>4</content> <!-- content the user should fill -->
77 </BinField>
78
79 <BinField>
80 <!-- Version (Major.Minor) -->
81 <name>Version</name> <!-- name of field -->
82 <config>
83 <offset>0x148</offset>
84 <size>0x4</size>
85 </config>
86 <content format='32bit'>0x0201</content> <!-- content the user should fill -->
87 </BinField>
88
89 <BinField>
90 <!-- Board manufaturer ( Dell = 0, Nuvoton = 100, Google = 1, MS = 2) -->
91 <name>BOARD_VENDOR</name> <!-- name of field -->
92 <config>
93 <offset>0x14C</offset>
94 <size>0x4</size>
95 </config>
96 <content format='32bit'>100</content> <!--Board_manufacturer: Nuvoton-->
97 </BinField>
98 <BinField>
99 <!-- Board type ( DRB = 0, SVB = 1, EB = 2,HORIZON = 3, SANDSTORM = 4, ROCKAWAY = 100 RunBMC = 10) -->
100 <!-- WARNING: Currently this value is only printed to serial. Set BOARD_VENDOR to 1 get Dell specific customization. -->
101 <name>BOARD_TYPE</name> <!-- name of field -->
102 <config>
103 <offset>0x150</offset>
104 <size>0x4</size>
105 </config>
106 <content format='32bit'>0x02</content> <!--Board_type: EB-->
107 </BinField>
108
109 <!-- the next two fields are available since version 10.7.0 -->
110 <BinField>
111 <!-- supported values: 333,444,500,600,666,700,720,750,775,787,800,825,850,900,950,1000,1060 -->
112 <name>MC_FREQ_IN_MHZ</name> <!-- name of field -->
113 <config>
114 <offset>0x11C</offset>
115 <size>0x2</size>
116 </config>
117 <content format='32bit'>800</content>
118 </BinField>
119 <BinField>
120 <!-- supporeted values: 333,500,600,666,700,720,750,800,825,850,900,950,1000,1060 -->
121 <name>CPU_FREQ_IN_MHZ</name> <!-- name of field -->
122 <config>
123 <offset>0x154</offset>
124 <size>0x2</size>
125 </config>
126 <content format='32bit'>800</content>
127 </BinField>
128
129 <BinField>
130 <!-- MC_CONFIG.
131 Bit 0: MC_DISABLE_CAPABILITY_INPUT_DQS_ENHANCE_TRAINING (0x01)
132 Bit 1: MC_CAPABILITY_IGNORE_ECC_DEVICE (0x02) -->
133 <name>MC_CONFIG</name> <!-- name of field -->
134 <config>
135 <offset>0x156</offset>
136 <size>0x1</size>
137 </config>
138 <content format='32bit'>0x00</content>
139 </BinField>
140
141 <BinField>
142 <!-- HOST_IF.
143 0xFF: LPC backward compatible
144 0x00: LPC.
145 0x01: eSPI
146 0x02: GPIOs TRIS. -->
147 <name>HOST_IF</name> <!-- name of field -->
148 <config>
149 <offset>0x157</offset>
150 <size>0x1</size>
151 </config>
152 <content format='32bit'>0x00</content>
153 </BinField>
154
155 <BinField>
156 <!-- SECURITY_LEVEL_T.
157 0xFF: SECURITY_LEVEL_UNKNOWN: backward compatible
158 0x00: SECURITY_LEVEL_NONE.
159 0x01: SECURITY_LEVEL_STANDARD
160 0x02: SECURITY_LEVEL_NIST. (require BootBlock with NIST support) -->
161 <name>SECURITY_LEVEL_T</name> <!-- name of field -->
162 <config>
163 <offset>0x15C</offset>
164 <size>0x1</size>
165 </config>
166 <content format='32bit'>0xFF</content>
167 </BinField>
168
169 <BinField>
170 <!-- Key revoke (bitwise). Set bit 0 to revoke key 0 etc. -->
171 <name>SECURITY_REVOKE_KEYS</name> <!-- name of field -->
172 <config>
173 <offset>0x1D7</offset>
174 <size>0x1</size>
175 </config>
176 <content format='bytes'>0x00</content>
177 </BinField>
178
179 <BinField>
180 <!-- security log offset -->
181 <name>SECURITY_LOG</name> <!-- name of field -->
182 <config>
183 <offset>0x1D8</offset>
184 <size>0x4</size>
185 </config>
186 <content format='32bit'>0x090000</content>
187 </BinField>
188 <BinField>
189 <!-- hole 0 size: used for NIST security. -->
190 <name>SECURITY_LOG_SIZE</name> <!-- name of field -->
191 <config>
192 <offset>0x1DC</offset>
193 <size>0x4</size>
194 </config>
195 <content format='32bit'>0x3000</content>
196 </BinField>
197
198
199 <BinField>
200 <!-- hole 0: used for NIST security. -->
201 <name>HOLE0</name> <!-- name of field -->
202 <config>
203 <offset>0x1E0</offset>
204 <size>0x4</size>
205 </config>
206 <content format='32bit'>0x0A0000</content>
207 </BinField>
208 <BinField>
209 <!-- hole 0 size: used for NIST security. -->
210 <name>HOLE0_SIZE</name> <!-- name of field -->
211 <config>
212 <offset>0x1E4</offset>
213 <size>0x4</size>
214 </config>
215 <content format='32bit'>0xF70000</content>
216 </BinField>
217
218 <BinField>
219 <!-- hole 1: used for NIST security. -->
220 <name>HOLE1</name> <!-- name of field -->
221 <config>
222 <offset>0x1E8</offset>
223 <size>0x4</size>
224 </config>
225 <content format='32bit'>0</content>
226 </BinField>
227 <BinField>
228 <!-- hole 1 size: used for NIST security. -->
229 <name>HOLE1_SIZE</name> <!-- name of field -->
230 <config>
231 <offset>0x1EC</offset>
232 <size>0x4</size>
233 </config>
234 <content format='32bit'>0</content>
235 </BinField>
236
237
238 <BinField>
239 <!-- hole 2: used for NIST security. -->
240 <name>HOLE2</name> <!-- name of field -->
241 <config>
242 <offset>0x1F0</offset>
243 <size>0x4</size>
244 </config>
245 <content format='32bit'>0xFFFFFFFF</content>
246 </BinField>
247 <BinField>
248 <!-- hole 2 size: used for NIST security. -->
249 <name>HOLE2_SIZE</name> <!-- name of field -->
250 <config>
251 <offset>0x1F4</offset>
252 <size>0x4</size>
253 </config>
254 <content format='32bit'>0</content>
255 </BinField>
256
257 <BinField>
258 <!-- hole 3: used for NIST security. -->
259 <name>HOLE3</name> <!-- name of field -->
260 <config>
261 <offset>0x1F8</offset>
262 <size>0x4</size>
263 </config>
264 <content format='32bit'>0</content>
265 </BinField>
266 <BinField>
267 <!-- hole 3 size: used for NIST security. -->
268 <name>HOLE3_SIZE</name> <!-- name of field -->
269 <config>
270 <offset>0x1FC</offset>
271 <size>0x4</size>
272 </config>
273 <content format='32bit'>0</content>
274 </BinField>
275
276</Bin_Ecc_Map>