| From d5a7cde4648d2247f83a0f259aa088152199dfbd Mon Sep 17 00:00:00 2001 |
| From: Emekcan Aras <emekcan.aras@arm.com> |
| Date: Mon, 27 Feb 2023 20:58:30 +0000 |
| Subject: [PATCH 2/6] Platform: corstone1000: Replace MCUBOOT BL1 by TFM's |
| (BL2) |
| |
| From: Mohamed Omar Asaker <mohamed.omarasaker@arm.com> |
| |
| Set region_defs of BL2 correctly |
| Set FLASH Areas 0 and 1 to have BL2 |
| Set FLASH Areas 2 and 3 to have TFM |
| Set FLASH Areas 4 and 5 to have FIP |
| Initialize FLASH in BL1_2 boot platform code |
| |
| Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/20554] |
| Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com> |
| Change-Id: I987d29cb6318b8b30cafab67d24f446aaadfe500 |
| --- |
| .../arm/corstone1000/bl1/boot_hal_bl1.c | 14 +++++++ |
| .../target/arm/corstone1000/bl2_flash_map.c | 8 ++-- |
| .../ext/target/arm/corstone1000/config.cmake | 3 ++ |
| .../arm/corstone1000/partition/flash_layout.h | 41 +++++++++++++------ |
| .../arm/corstone1000/partition/region_defs.h | 4 +- |
| 5 files changed, 51 insertions(+), 19 deletions(-) |
| |
| diff --git a/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c b/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c |
| index 678342443..2124720b2 100644 |
| --- a/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c |
| +++ b/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c |
| @@ -638,6 +638,13 @@ int32_t boot_platform_init(void) |
| |
| int32_t boot_platform_post_init(void) |
| { |
| + int32_t result; |
| + if (platform_code_is_bl1_2) { |
| + result = FLASH_DEV_NAME.Initialize(NULL); |
| + if (result != ARM_DRIVER_OK) { |
| + return 1; |
| + } |
| + } |
| return 0; |
| } |
| |
| @@ -665,6 +672,13 @@ void boot_platform_quit(struct boot_arm_vector_table *vt) |
| stdio_uninit(); |
| #endif /* defined(TFM_BL1_LOGGING) || defined(TEST_BL1_1) || defined(TEST_BL1_2) */ |
| |
| + if (platform_code_is_bl1_2) { |
| + result = FLASH_DEV_NAME.Uninitialize(); |
| + if (result != ARM_DRIVER_OK) { |
| + return 1; |
| + } |
| + } |
| + |
| result = corstone1000_watchdog_reset_timer(); |
| if (result != ARM_DRIVER_OK) { |
| while (1); |
| diff --git a/platform/ext/target/arm/corstone1000/bl2_flash_map.c b/platform/ext/target/arm/corstone1000/bl2_flash_map.c |
| index 599f80b41..2b1cdfa19 100644 |
| --- a/platform/ext/target/arm/corstone1000/bl2_flash_map.c |
| +++ b/platform/ext/target/arm/corstone1000/bl2_flash_map.c |
| @@ -25,14 +25,14 @@ extern ARM_DRIVER_FLASH FLASH_DEV_NAME; |
| */ |
| struct flash_area flash_map[] = { |
| { |
| - .fa_id = FLASH_AREA_0_ID, |
| + .fa_id = FLASH_AREA_2_ID, |
| .fa_device_id = FLASH_DEVICE_ID, |
| .fa_driver = &FLASH_DEV_NAME, |
| .fa_off = FLASH_INVALID_OFFSET, |
| .fa_size = FLASH_INVALID_SIZE, |
| }, |
| { |
| - .fa_id = FLASH_AREA_1_ID, |
| + .fa_id = FLASH_AREA_3_ID, |
| .fa_device_id = FLASH_DEVICE_ID, |
| .fa_driver = &FLASH_DEV_NAME, |
| .fa_off = FLASH_INVALID_OFFSET, |
| @@ -40,14 +40,14 @@ struct flash_area flash_map[] = { |
| }, |
| #ifndef TFM_S_REG_TEST |
| { |
| - .fa_id = FLASH_AREA_2_ID, |
| + .fa_id = FLASH_AREA_4_ID, |
| .fa_device_id = FLASH_DEVICE_ID, |
| .fa_driver = &FLASH_DEV_NAME, |
| .fa_off = FLASH_INVALID_OFFSET, |
| .fa_size = FLASH_INVALID_SIZE, |
| }, |
| { |
| - .fa_id = FLASH_AREA_3_ID, |
| + .fa_id = FLASH_AREA_5_ID, |
| .fa_device_id = FLASH_DEVICE_ID, |
| .fa_driver = &FLASH_DEV_NAME, |
| .fa_off = FLASH_INVALID_OFFSET, |
| diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake |
| index 1b0675404..bec6b84f0 100644 |
| --- a/platform/ext/target/arm/corstone1000/config.cmake |
| +++ b/platform/ext/target/arm/corstone1000/config.cmake |
| @@ -16,6 +16,9 @@ set(TFM_BL1_SOFTWARE_CRYPTO OFF CACHE BOOL "Whether BL1_1 |
| set(TFM_BL1_MEMORY_MAPPED_FLASH OFF CACHE BOOL "Whether BL1 can directly access flash content") |
| set(TFM_BL1_PQ_CRYPTO OFF CACHE BOOL "Enable LMS PQ crypto for BL2 verification. This is experimental and should not yet be used in production") |
| |
| +set(TFM_BL2_IMAGE_FLASH_AREA_NUM 0 CACHE STRING "Which flash area BL2 is stored in") |
| +set(MCUBOOT_S_IMAGE_FLASH_AREA_NUM 2 CACHE STRING "ID of the flash area containing the primary Secure image") |
| + |
| set(BL2 ON CACHE BOOL "Whether to build BL2") |
| set(BL2_TRAILER_SIZE 0x800 CACHE STRING "Trailer size") |
| set(DEFAULT_MCUBOOT_FLASH_MAP OFF CACHE BOOL "Whether to use the default flash map defined by TF-M project") |
| diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h |
| index a95ff63ef..41b4c6323 100644 |
| --- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h |
| +++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h |
| @@ -136,23 +136,38 @@ |
| #define BANK_PARTITION_SIZE (0xFE0000) /* 15.875 MB */ |
| #define TFM_PARTITION_SIZE (0x5E000) /* 376 KB */ |
| |
| -/* Macros needed to imgtool.py, used when creating BL2 signed image */ |
| -#define BL2_IMAGE_LOAD_ADDRESS (SRAM_BASE + TFM_PARTITION_SIZE + BL2_DATA_GAP_SIZE) |
| -#define BL2_IMAGE_OFFSET (0x0) |
| -#define BL2_IMAGE_MAX_SIZE (SE_BL2_PARTITION_SIZE) |
| +/************************************************************/ |
| +/* Bank : Images flash offsets are with respect to the bank */ |
| +/************************************************************/ |
| |
| -/* Image 1: TF-M primary and secondary images */ |
| +/* Image 0: BL2 primary and secondary images */ |
| #define FLASH_AREA_0_ID (1) |
| -#define FLASH_AREA_0_SIZE (TFM_PARTITION_SIZE) |
| +#define FLASH_AREA_0_OFFSET (0) /* starting from 0th offset of the bank */ |
| +#define FLASH_AREA_0_SIZE (SE_BL2_PARTITION_SIZE) |
| + |
| #define FLASH_AREA_1_ID (FLASH_AREA_0_ID + 1) |
| -#define FLASH_AREA_1_SIZE (TFM_PARTITION_SIZE) |
| +#define FLASH_AREA_1_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE) |
| +#define FLASH_AREA_1_SIZE (SE_BL2_PARTITION_SIZE) |
| + |
| +/* Image 1: TF-M primary and secondary images */ |
| +#define FLASH_AREA_2_ID (1) |
| +#define FLASH_AREA_2_SIZE (TFM_PARTITION_SIZE) |
| +#define FLASH_AREA_3_ID (FLASH_AREA_2_ID + 1) |
| +#define FLASH_AREA_3_SIZE (TFM_PARTITION_SIZE) |
| |
| /* Image 2: Host FIP */ |
| #define FIP_SIGNATURE_AREA_SIZE (0x1000) /* 4 KB */ |
| |
| /* Host BL2 (TF-A) primary and secondary image. */ |
| -#define FLASH_AREA_2_ID (FLASH_AREA_1_ID + 1) |
| -#define FLASH_AREA_3_ID (FLASH_AREA_2_ID + 1) |
| +#define FLASH_AREA_4_ID (FLASH_AREA_3_ID + 1) |
| +#define FLASH_AREA_5_ID (FLASH_AREA_4_ID + 1) |
| + |
| +#define BL1_FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? FLASH_AREA_0_ID : \ |
| + 255 ) |
| +#define BL1_FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? FLASH_AREA_1_ID : \ |
| + 255 ) |
| + |
| +#define BL1_FLASH_AREA_IMAGE_SCRATCH 255 |
| |
| /* Macros needed to imgtool.py, used when creating TF-M signed image */ |
| #define S_IMAGE_LOAD_ADDRESS (SRAM_BASE) |
| @@ -161,11 +176,11 @@ |
| #define NON_SECURE_IMAGE_OFFSET (TFM_PARTITION_SIZE) |
| #define NON_SECURE_IMAGE_MAX_SIZE (0x0) |
| |
| -#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? FLASH_AREA_0_ID : \ |
| - ((x) == 1) ? FLASH_AREA_2_ID : \ |
| +#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? FLASH_AREA_2_ID : \ |
| + ((x) == 1) ? FLASH_AREA_4_ID : \ |
| 255 ) |
| -#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? FLASH_AREA_1_ID : \ |
| - ((x) == 1) ? FLASH_AREA_3_ID : \ |
| +#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? FLASH_AREA_3_ID : \ |
| + ((x) == 1) ? FLASH_AREA_5_ID : \ |
| 255 ) |
| |
| #define FLASH_AREA_IMAGE_SCRATCH 255 |
| diff --git a/platform/ext/target/arm/corstone1000/partition/region_defs.h b/platform/ext/target/arm/corstone1000/partition/region_defs.h |
| index 8157c36bf..fc9f734f6 100644 |
| --- a/platform/ext/target/arm/corstone1000/partition/region_defs.h |
| +++ b/platform/ext/target/arm/corstone1000/partition/region_defs.h |
| @@ -48,7 +48,7 @@ |
| (TFM_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE) |
| |
| #define IMAGE_BL2_CODE_SIZE \ |
| - (SE_BL2_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE) |
| + (SE_BL2_PARTITION_SIZE - BL1_HEADER_SIZE - BL1_TRAILER_SIZE) |
| |
| /* Secure regions */ |
| #define S_CODE_START (SRAM_BASE + BL2_HEADER_SIZE) |
| @@ -86,7 +86,7 @@ |
| |
| /* SE BL2 regions */ |
| #define BL2_IMAGE_START (SRAM_BASE + SRAM_SIZE - SE_BL2_PARTITION_SIZE) |
| -#define BL2_CODE_START (BL2_IMAGE_START + BL2_HEADER_SIZE) |
| +#define BL2_CODE_START (BL2_IMAGE_START + BL1_HEADER_SIZE) |
| #define BL2_CODE_SIZE (IMAGE_BL2_CODE_SIZE) |
| #define BL2_CODE_LIMIT (BL2_CODE_START + BL2_CODE_SIZE - 1) |
| |
| -- |
| 2.17.1 |
| |