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gerrit.openbmc.org / openbmc / openbmc / 8e7b46e2350c3689938f309eaca929aada20b5a0 / . / meta-arm / meta-arm-bsp / recipes-bsp / trusted-firmware-m / files / corstone1000 / 0005-Platform-corstone1000-Replace-MCUBOOT-BL1-by-TFM-s-B.patch
blob: 697061e2d96bddcba4b194902aa1605b8cfc87bd [file] [log] [blame]
Patrick Williams8e7b46e2023-05-01 14:19:06 -0500[diff] [blame^]1From d5a7cde4648d2247f83a0f259aa088152199dfbd Mon Sep 17 00:00:00 2001
2From: Emekcan Aras <emekcan.aras@arm.com>
3Date: Mon, 27 Feb 2023 20:58:30 +0000
4Subject: [PATCH 2/6] Platform: corstone1000: Replace MCUBOOT BL1 by TFM's
5 (BL2)
6
7From: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
8
9Set region_defs of BL2 correctly
10Set FLASH Areas 0 and 1 to have BL2
11Set FLASH Areas 2 and 3 to have TFM
12Set FLASH Areas 4 and 5 to have FIP
13Initialize FLASH in BL1_2 boot platform code
14
15Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/20554]
16Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
17Change-Id: I987d29cb6318b8b30cafab67d24f446aaadfe500
18---
19 .../arm/corstone1000/bl1/boot_hal_bl1.c | 14 +++++++
20 .../target/arm/corstone1000/bl2_flash_map.c | 8 ++--
21 .../ext/target/arm/corstone1000/config.cmake | 3 ++
22 .../arm/corstone1000/partition/flash_layout.h | 41 +++++++++++++------
23 .../arm/corstone1000/partition/region_defs.h | 4 +-
24 5 files changed, 51 insertions(+), 19 deletions(-)
25
26diff --git a/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c b/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c
27index 678342443..2124720b2 100644
28--- a/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c
29+++ b/platform/ext/target/arm/corstone1000/bl1/boot_hal_bl1.c
30@@ -638,6 +638,13 @@ int32_t boot_platform_init(void)
31
32 int32_t boot_platform_post_init(void)
33 {
34+ int32_t result;
35+ if (platform_code_is_bl1_2) {
36+ result = FLASH_DEV_NAME.Initialize(NULL);
37+ if (result != ARM_DRIVER_OK) {
38+ return 1;
39+ }
40+ }
41 return 0;
42 }
43
44@@ -665,6 +672,13 @@ void boot_platform_quit(struct boot_arm_vector_table *vt)
45 stdio_uninit();
46 #endif /* defined(TFM_BL1_LOGGING) || defined(TEST_BL1_1) || defined(TEST_BL1_2) */
47
48+ if (platform_code_is_bl1_2) {
49+ result = FLASH_DEV_NAME.Uninitialize();
50+ if (result != ARM_DRIVER_OK) {
51+ return 1;
52+ }
53+ }
54+
55 result = corstone1000_watchdog_reset_timer();
56 if (result != ARM_DRIVER_OK) {
57 while (1);
58diff --git a/platform/ext/target/arm/corstone1000/bl2_flash_map.c b/platform/ext/target/arm/corstone1000/bl2_flash_map.c
59index 599f80b41..2b1cdfa19 100644
60--- a/platform/ext/target/arm/corstone1000/bl2_flash_map.c
61+++ b/platform/ext/target/arm/corstone1000/bl2_flash_map.c
62@@ -25,14 +25,14 @@ extern ARM_DRIVER_FLASH FLASH_DEV_NAME;
63 */
64 struct flash_area flash_map[] = {
65 {
66- .fa_id = FLASH_AREA_0_ID,
67+ .fa_id = FLASH_AREA_2_ID,
68 .fa_device_id = FLASH_DEVICE_ID,
69 .fa_driver = &FLASH_DEV_NAME,
70 .fa_off = FLASH_INVALID_OFFSET,
71 .fa_size = FLASH_INVALID_SIZE,
72 },
73 {
74- .fa_id = FLASH_AREA_1_ID,
75+ .fa_id = FLASH_AREA_3_ID,
76 .fa_device_id = FLASH_DEVICE_ID,
77 .fa_driver = &FLASH_DEV_NAME,
78 .fa_off = FLASH_INVALID_OFFSET,
79@@ -40,14 +40,14 @@ struct flash_area flash_map[] = {
80 },
81 #ifndef TFM_S_REG_TEST
82 {
83- .fa_id = FLASH_AREA_2_ID,
84+ .fa_id = FLASH_AREA_4_ID,
85 .fa_device_id = FLASH_DEVICE_ID,
86 .fa_driver = &FLASH_DEV_NAME,
87 .fa_off = FLASH_INVALID_OFFSET,
88 .fa_size = FLASH_INVALID_SIZE,
89 },
90 {
91- .fa_id = FLASH_AREA_3_ID,
92+ .fa_id = FLASH_AREA_5_ID,
93 .fa_device_id = FLASH_DEVICE_ID,
94 .fa_driver = &FLASH_DEV_NAME,
95 .fa_off = FLASH_INVALID_OFFSET,
96diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
97index 1b0675404..bec6b84f0 100644
98--- a/platform/ext/target/arm/corstone1000/config.cmake
99+++ b/platform/ext/target/arm/corstone1000/config.cmake
100@@ -16,6 +16,9 @@ set(TFM_BL1_SOFTWARE_CRYPTO OFF CACHE BOOL "Whether BL1_1
101 set(TFM_BL1_MEMORY_MAPPED_FLASH OFF CACHE BOOL "Whether BL1 can directly access flash content")
102 set(TFM_BL1_PQ_CRYPTO OFF CACHE BOOL "Enable LMS PQ crypto for BL2 verification. This is experimental and should not yet be used in production")
103
104+set(TFM_BL2_IMAGE_FLASH_AREA_NUM 0 CACHE STRING "Which flash area BL2 is stored in")
105+set(MCUBOOT_S_IMAGE_FLASH_AREA_NUM 2 CACHE STRING "ID of the flash area containing the primary Secure image")
106+
107 set(BL2 ON CACHE BOOL "Whether to build BL2")
108 set(BL2_TRAILER_SIZE 0x800 CACHE STRING "Trailer size")
109 set(DEFAULT_MCUBOOT_FLASH_MAP OFF CACHE BOOL "Whether to use the default flash map defined by TF-M project")
110diff --git a/platform/ext/target/arm/corstone1000/partition/flash_layout.h b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
111index a95ff63ef..41b4c6323 100644
112--- a/platform/ext/target/arm/corstone1000/partition/flash_layout.h
113+++ b/platform/ext/target/arm/corstone1000/partition/flash_layout.h
114@@ -136,23 +136,38 @@
115 #define BANK_PARTITION_SIZE (0xFE0000) /* 15.875 MB */
116 #define TFM_PARTITION_SIZE (0x5E000) /* 376 KB */
117
118-/* Macros needed to imgtool.py, used when creating BL2 signed image */
119-#define BL2_IMAGE_LOAD_ADDRESS (SRAM_BASE + TFM_PARTITION_SIZE + BL2_DATA_GAP_SIZE)
120-#define BL2_IMAGE_OFFSET (0x0)
121-#define BL2_IMAGE_MAX_SIZE (SE_BL2_PARTITION_SIZE)
122+/************************************************************/
123+/* Bank : Images flash offsets are with respect to the bank */
124+/************************************************************/
125
126-/* Image 1: TF-M primary and secondary images */
127+/* Image 0: BL2 primary and secondary images */
128 #define FLASH_AREA_0_ID (1)
129-#define FLASH_AREA_0_SIZE (TFM_PARTITION_SIZE)
130+#define FLASH_AREA_0_OFFSET (0) /* starting from 0th offset of the bank */
131+#define FLASH_AREA_0_SIZE (SE_BL2_PARTITION_SIZE)
132+
133 #define FLASH_AREA_1_ID (FLASH_AREA_0_ID + 1)
134-#define FLASH_AREA_1_SIZE (TFM_PARTITION_SIZE)
135+#define FLASH_AREA_1_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE)
136+#define FLASH_AREA_1_SIZE (SE_BL2_PARTITION_SIZE)
137+
138+/* Image 1: TF-M primary and secondary images */
139+#define FLASH_AREA_2_ID (1)
140+#define FLASH_AREA_2_SIZE (TFM_PARTITION_SIZE)
141+#define FLASH_AREA_3_ID (FLASH_AREA_2_ID + 1)
142+#define FLASH_AREA_3_SIZE (TFM_PARTITION_SIZE)
143
144 /* Image 2: Host FIP */
145 #define FIP_SIGNATURE_AREA_SIZE (0x1000) /* 4 KB */
146
147 /* Host BL2 (TF-A) primary and secondary image. */
148-#define FLASH_AREA_2_ID (FLASH_AREA_1_ID + 1)
149-#define FLASH_AREA_3_ID (FLASH_AREA_2_ID + 1)
150+#define FLASH_AREA_4_ID (FLASH_AREA_3_ID + 1)
151+#define FLASH_AREA_5_ID (FLASH_AREA_4_ID + 1)
152+
153+#define BL1_FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? FLASH_AREA_0_ID : \
154+ 255 )
155+#define BL1_FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? FLASH_AREA_1_ID : \
156+ 255 )
157+
158+#define BL1_FLASH_AREA_IMAGE_SCRATCH 255
159
160 /* Macros needed to imgtool.py, used when creating TF-M signed image */
161 #define S_IMAGE_LOAD_ADDRESS (SRAM_BASE)
162@@ -161,11 +176,11 @@
163 #define NON_SECURE_IMAGE_OFFSET (TFM_PARTITION_SIZE)
164 #define NON_SECURE_IMAGE_MAX_SIZE (0x0)
165
166-#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? FLASH_AREA_0_ID : \
167- ((x) == 1) ? FLASH_AREA_2_ID : \
168+#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? FLASH_AREA_2_ID : \
169+ ((x) == 1) ? FLASH_AREA_4_ID : \
170 255 )
171-#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? FLASH_AREA_1_ID : \
172- ((x) == 1) ? FLASH_AREA_3_ID : \
173+#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? FLASH_AREA_3_ID : \
174+ ((x) == 1) ? FLASH_AREA_5_ID : \
175 255 )
176
177 #define FLASH_AREA_IMAGE_SCRATCH 255
178diff --git a/platform/ext/target/arm/corstone1000/partition/region_defs.h b/platform/ext/target/arm/corstone1000/partition/region_defs.h
179index 8157c36bf..fc9f734f6 100644
180--- a/platform/ext/target/arm/corstone1000/partition/region_defs.h
181+++ b/platform/ext/target/arm/corstone1000/partition/region_defs.h
182@@ -48,7 +48,7 @@
183 (TFM_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
184
185 #define IMAGE_BL2_CODE_SIZE \
186- (SE_BL2_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
187+ (SE_BL2_PARTITION_SIZE - BL1_HEADER_SIZE - BL1_TRAILER_SIZE)
188
189 /* Secure regions */
190 #define S_CODE_START (SRAM_BASE + BL2_HEADER_SIZE)
191@@ -86,7 +86,7 @@
192
193 /* SE BL2 regions */
194 #define BL2_IMAGE_START (SRAM_BASE + SRAM_SIZE - SE_BL2_PARTITION_SIZE)
195-#define BL2_CODE_START (BL2_IMAGE_START + BL2_HEADER_SIZE)
196+#define BL2_CODE_START (BL2_IMAGE_START + BL1_HEADER_SIZE)
197 #define BL2_CODE_SIZE (IMAGE_BL2_CODE_SIZE)
198 #define BL2_CODE_LIMIT (BL2_CODE_START + BL2_CODE_SIZE - 1)
199
200--
2012.17.1
202