blob: 225f22f013dbdfab0c7a0526bcd8336765ce6df0 [file] [log] [blame]
Patrick Williamsd8c66bc2016-06-20 12:57:21 -05001From b74e34e6f53816ad57b13ba6fd70a97db1bc1eae Mon Sep 17 00:00:00 2001
2From: Khem Raj <raj.khem@gmail.com>
3Date: Thu, 31 Dec 2015 15:15:09 -0800
4Subject: [PATCH 21/24] eglibc: Clear cache lines on ppc8xx
5
62007-06-13 Nathan Sidwell <nathan@codesourcery.com>
7 Mark Shinwell <shinwell@codesourcery.com>
8
9 * sysdeps/unix/sysv/linux/powerpc/libc-start.c
10 (__libc_start_main): Detect 8xx parts and clear
11 __cache_line_size if detected.
12 * sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
13 (DL_PLATFORM_AUXV): Likewise.
14
15Upstream-Status: Pending
16
17Signed-off-by: Khem Raj <raj.khem@gmail.com>
18---
19 sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | 14 +++++++++++++-
20 sysdeps/unix/sysv/linux/powerpc/libc-start.c | 16 +++++++++++++++-
21 2 files changed, 28 insertions(+), 2 deletions(-)
22
23diff --git a/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c b/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
24index c2504ff..d50f1cb 100644
25--- a/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
26+++ b/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
27@@ -24,9 +24,21 @@ int __cache_line_size attribute_hidden;
28 /* Scan the Aux Vector for the "Data Cache Block Size" entry. If found
29 verify that the static extern __cache_line_size is defined by checking
30 for not NULL. If it is defined then assign the cache block size
31- value to __cache_line_size. */
32+ value to __cache_line_size. This is used by memset to
33+ optimize setting to zero. We have to detect 8xx processors, which
34+ have buggy dcbz implementations that cannot report page faults
35+ correctly. That requires reading SPR, which is a privileged
36+ operation. Fortunately 2.2.18 and later emulates PowerPC mfspr
37+ reads from the PVR register. */
38 #define DL_PLATFORM_AUXV \
39 case AT_DCACHEBSIZE: \
40+ if (__LINUX_KERNEL_VERSION >= 0x020218) \
41+ { \
42+ unsigned pvr = 0; \
43+ asm ("mfspr %0, 287" : "=r" (pvr)); \
44+ if ((pvr & 0xffff0000) == 0x00500000) \
45+ break; \
46+ } \
47 __cache_line_size = av->a_un.a_val; \
48 break;
49
50diff --git a/sysdeps/unix/sysv/linux/powerpc/libc-start.c b/sysdeps/unix/sysv/linux/powerpc/libc-start.c
51index 209a16d..5d8572d 100644
52--- a/sysdeps/unix/sysv/linux/powerpc/libc-start.c
53+++ b/sysdeps/unix/sysv/linux/powerpc/libc-start.c
54@@ -73,11 +73,25 @@ __libc_start_main (int argc, char **argv,
55
56 /* Initialize the __cache_line_size variable from the aux vector. For the
57 static case, we also need _dl_hwcap, _dl_hwcap2 and _dl_platform, so we
58- can call __tcb_parse_hwcap_and_convert_at_platform (). */
59+ can call __tcb_parse_hwcap_and_convert_at_platform ().
60+
61+ This is used by memset to optimize setting to zero. We have to
62+ detect 8xx processors, which have buggy dcbz implementations that
63+ cannot report page faults correctly. That requires reading SPR,
64+ which is a privileged operation. Fortunately 2.2.18 and later
65+ emulates PowerPC mfspr reads from the PVR register. */
66 for (ElfW (auxv_t) * av = auxvec; av->a_type != AT_NULL; ++av)
67 switch (av->a_type)
68 {
69 case AT_DCACHEBSIZE:
70+ if (__LINUX_KERNEL_VERSION >= 0x020218)
71+ {
72+ unsigned pvr = 0;
73+
74+ asm ("mfspr %0, 287" : "=r" (pvr) :);
75+ if ((pvr & 0xffff0000) == 0x00500000)
76+ break;
77+ }
78 __cache_line_size = av->a_un.a_val;
79 break;
80 #ifndef SHARED
81--
822.6.4
83