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Patrick Williams864cc432023-02-09 14:54:44 -06001From 0a4aa2a03a208996e7448c79edd0adef9a697255 Mon Sep 17 00:00:00 2001
Andrew Geisslerea144b032023-01-27 16:03:57 -06002From: Rui Miguel Silva <rui.silva@linaro.org>
3Date: Wed, 30 Nov 2022 15:37:22 +0000
Patrick Williams864cc432023-02-09 14:54:44 -06004Subject: [PATCH 20/27] arm:corstone1000: add mmc for fvp
Andrew Geisslerea144b032023-01-27 16:03:57 -06005
6Enable support mmc/sdcard for the corstone1000 FVP.
7
8Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
9Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
10Upstream-Status: Pending [Not submitted to upstream yet]
11---
12 board/armltd/corstone1000/corstone1000.c | 28 +++++++++++++++++++-----
13 configs/corstone1000_defconfig | 8 ++++++-
14 include/configs/corstone1000.h | 4 +++-
15 3 files changed, 32 insertions(+), 8 deletions(-)
16
17diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
Patrick Williams864cc432023-02-09 14:54:44 -060018index 76816f8f4ea1..d6ca6e896140 100644
Andrew Geisslerea144b032023-01-27 16:03:57 -060019--- a/board/armltd/corstone1000/corstone1000.c
20+++ b/board/armltd/corstone1000/corstone1000.c
21@@ -38,19 +38,35 @@ static struct mm_region corstone1000_mem_map[] = {
22 }, {
23 /* USB */
24 .virt = 0x40200000UL,
25- .phys = 0x40200000UL,
26+ .phys = 0x40200000UL,
27+ .size = 0x00100000UL,
28+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
29+ PTE_BLOCK_NON_SHARE |
30+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
31+ }, {
32+ /* MMC0 */
33+ .virt = 0x40300000UL,
34+ .phys = 0x40300000UL,
35 .size = 0x00100000UL,
36 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
37- PTE_BLOCK_NON_SHARE |
38- PTE_BLOCK_PXN | PTE_BLOCK_UXN
39+ PTE_BLOCK_NON_SHARE |
40+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
41 }, {
42 /* ethernet */
43 .virt = 0x40100000UL,
44- .phys = 0x40100000UL,
45+ .phys = 0x40100000UL,
46+ .size = 0x00100000UL,
47+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
48+ PTE_BLOCK_NON_SHARE |
49+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
50+ }, {
51+ /* MMC1 */
52+ .virt = 0x50000000UL,
53+ .phys = 0x50000000UL,
54 .size = 0x00100000UL,
55 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
56- PTE_BLOCK_NON_SHARE |
57- PTE_BLOCK_PXN | PTE_BLOCK_UXN
58+ PTE_BLOCK_NON_SHARE |
59+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
60 }, {
61 /* OCVM */
62 .virt = 0x80000000UL,
63diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
Patrick Williams864cc432023-02-09 14:54:44 -060064index 06eac3e041fe..f7c276a10a6e 100644
Andrew Geisslerea144b032023-01-27 16:03:57 -060065--- a/configs/corstone1000_defconfig
66+++ b/configs/corstone1000_defconfig
67@@ -40,7 +40,13 @@ CONFIG_VERSION_VARIABLE=y
68 CONFIG_NET_RANDOM_ETHADDR=y
69 CONFIG_REGMAP=y
70 CONFIG_MISC=y
71-# CONFIG_MMC is not set
72+CONFIG_CLK=y
73+CONFIG_CMD_MMC=y
74+CONFIG_DM_MMC=y
75+CONFIG_ARM_PL180_MMCI=y
76+CONFIG_MMC_SDHCI_ADMA_HELPERS=y
77+CONFIG_MMC_WRITE=y
78+CONFIG_DM_GPIO=y
79 CONFIG_PHYLIB=y
80 CONFIG_PHY_SMSC=y
81 CONFIG_SMC911X=y
82diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
Patrick Williams864cc432023-02-09 14:54:44 -060083index be13b98d4829..a015a1630e2c 100644
Andrew Geisslerea144b032023-01-27 16:03:57 -060084--- a/include/configs/corstone1000.h
85+++ b/include/configs/corstone1000.h
Patrick Williams864cc432023-02-09 14:54:44 -060086@@ -59,7 +59,9 @@
Andrew Geisslerea144b032023-01-27 16:03:57 -060087 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
88
89 #define BOOT_TARGET_DEVICES(func) \
90- func(USB, usb, 0)
91+ func(USB, usb, 0) \
92+ func(MMC, mmc, 0) \
93+ func(MMC, mmc, 1)
94
95 #include <config_distro_bootcmd.h>
96
97--
Patrick Williams864cc432023-02-09 14:54:44 -0600982.39.1
Andrew Geisslerea144b032023-01-27 16:03:57 -060099