meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0003-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch

From 2ccb463274d0c04f1e3253194ea6eee80c31cb49 Mon Sep 17 00:00:00 2001
From: Himanshu Sharma <Himanshu.Sharma@arm.com>
Date: Mon, 30 May 2022 10:53:30 +0000
Subject: [PATCH] Platform/ARM/N1Sdp: Modify the IRQ ID of Debug UART and
 routing it to IOFPGA UART1

In DBG2 table, IRQ ID was set as 0 for the UART. This overwrote the
IPI0 trigger method to "level", which prevented SGI0 to be enabled
again after a CPU offline/online cycle.

This patch fixes the above issue by assigning a reserved IRQ ID
for the Debug UART, other than 0 and also routing it to use IOFPGA
UART1 by unsharing it from currently using serial terminal.

Upstream-Status: Pending
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: Himanshu Sharma <Himanshu.Sharma@arm.com>
Change-Id: Ib35fecc57f1d8c496135c18dbebd0be0a4b76041
---
 .../ConfigurationManagerDxe/ConfigurationManager.c        | 2 +-
 Platform/ARM/N1Sdp/N1SdpPlatform.dsc                      | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
index b11c0425..44046a00 100644
--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
@@ -320,7 +320,7 @@ EDKII_PLATFORM_REPOSITORY_INFO N1sdpRepositoryInfo = {
   // Debug Serial Port
   {
     FixedPcdGet64 (PcdSerialDbgRegisterBase),               // BaseAddress
-    0,                                                      // Interrupt -unused
+    250,                                                    // Interrupt (reserved)
     FixedPcdGet64 (PcdSerialDbgUartBaudRate),               // BaudRate
     FixedPcdGet32 (PcdSerialDbgUartClkInHz),                // Clock
     EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART        // Port subtype
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index d04b22d3..676ab677 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -4,7 +4,7 @@
 # This provides platform specific component descriptions and libraries that
 # conform to EFI/Framework standards.
 #
-# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.<BR>
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -136,9 +136,9 @@
   gArmPlatformTokenSpaceGuid.PL011UartInterrupt|95
 
   # PL011 Serial Debug UART (DBG2)
-  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
-  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
-  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|50000000
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x1C0A0000
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|24000000
 
   # SBSA Watchdog
   gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93