blob: b499d838432e5fcd3245da3818f59c455e0ede03 [file] [log] [blame]
Zane Shelleye90b85d2021-12-17 17:24:49 -06001//------------------------------------------------------------------------------
2// IMPORTANT:
3// This file will be built in CI test and should work out-of-the-box in CI test
4// with use of the fake device tree. Any functions that require addition support
5// to simulate in CI test should be put in `pdbg_no_sim.cpp`.
6//------------------------------------------------------------------------------
7
Zane Shelley171a2e02020-11-13 13:56:13 -06008#include <assert.h>
Zane Shelleye4bfb472021-08-10 12:47:32 -05009#include <config.h>
Zane Shelley171a2e02020-11-13 13:56:13 -060010
Zane Shelley7ae9c8c2020-12-02 20:10:31 -060011#include <hei_main.hpp>
Caleb Palmer626270a2022-02-21 11:05:08 -060012#include <nlohmann/json.hpp>
13#include <util/dbus.hpp>
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -060014#include <util/pdbg.hpp>
Zane Shelley171a2e02020-11-13 13:56:13 -060015#include <util/trace.hpp>
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -060016
Caleb Palmer626270a2022-02-21 11:05:08 -060017#include <filesystem>
18#include <fstream>
19#include <string>
20
Zane Shelley3a851082021-03-23 16:45:28 -050021#ifdef CONFIG_PHAL_API
Zane Shelleye4bfb472021-08-10 12:47:32 -050022#include <attributes_info.H>
Zane Shelley3a851082021-03-23 16:45:28 -050023#endif
24
Zane Shelley38501e12022-01-10 15:42:28 -060025using namespace analyzer;
26
Caleb Palmer626270a2022-02-21 11:05:08 -060027namespace fs = std::filesystem;
28
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -060029namespace util
30{
31
32namespace pdbg
33{
34
35//------------------------------------------------------------------------------
36
Zane Shelleya0299852020-11-13 13:38:04 -060037pdbg_target* getTrgt(const libhei::Chip& i_chip)
38{
39 return (pdbg_target*)i_chip.getChip();
40}
41
42//------------------------------------------------------------------------------
43
Zane Shelley236bb732021-03-24 17:07:46 -050044pdbg_target* getTrgt(const std::string& i_path)
45{
46 return pdbg_target_from_path(nullptr, i_path.c_str());
47}
48
49//------------------------------------------------------------------------------
50
Zane Shelleya0299852020-11-13 13:38:04 -060051const char* getPath(pdbg_target* i_trgt)
52{
53 return pdbg_target_path(i_trgt);
54}
55
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -060056const char* getPath(const libhei::Chip& i_chip)
57{
Zane Shelleya0299852020-11-13 13:38:04 -060058 return getPath(getTrgt(i_chip));
59}
60
61//------------------------------------------------------------------------------
62
63uint32_t getChipPos(pdbg_target* i_trgt)
64{
65 uint32_t attr = 0;
66 pdbg_target_get_attribute(i_trgt, "ATTR_FAPI_POS", 4, 1, &attr);
67 return attr;
68}
69
70uint32_t getChipPos(const libhei::Chip& i_chip)
71{
72 return getChipPos(getTrgt(i_chip));
73}
74
75//------------------------------------------------------------------------------
76
Zane Shelley2a394cb2022-02-17 22:01:39 -060077uint8_t getUnitPos(pdbg_target* i_trgt)
78{
79 uint8_t attr = 0;
80 pdbg_target_get_attribute(i_trgt, "ATTR_CHIP_UNIT_POS", 1, 1, &attr);
81 return attr;
82}
83
84//------------------------------------------------------------------------------
85
Zane Shelleya0299852020-11-13 13:38:04 -060086uint8_t getTrgtType(pdbg_target* i_trgt)
87{
88 uint8_t attr = 0;
89 pdbg_target_get_attribute(i_trgt, "ATTR_TYPE", 1, 1, &attr);
90 return attr;
91}
92
93uint8_t getTrgtType(const libhei::Chip& i_chip)
94{
95 return getTrgtType(getTrgt(i_chip));
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -060096}
97
98//------------------------------------------------------------------------------
99
Zane Shelley2a394cb2022-02-17 22:01:39 -0600100pdbg_target* getParentChip(pdbg_target* i_unitTarget)
101{
102 assert(nullptr != i_unitTarget);
103
104 // Check if the given target is already a chip.
105 auto targetType = getTrgtType(i_unitTarget);
106 if (TYPE_PROC == targetType || TYPE_OCMB == targetType)
107 {
108 return i_unitTarget; // simply return the given target
109 }
110
111 // Check if this unit is on an OCMB.
112 pdbg_target* parentChip = pdbg_target_parent("ocmb", i_unitTarget);
113
114 // If not on the OCMB, check if this unit is on a PROC.
115 if (nullptr == parentChip)
116 {
117 parentChip = pdbg_target_parent("proc", i_unitTarget);
118 }
119
120 // There should always be a parent chip. Throw an error if not found.
121 if (nullptr == parentChip)
122 {
123 throw std::logic_error("No parent chip found: i_unitTarget=" +
124 std::string{getPath(i_unitTarget)});
125 }
126
127 return parentChip;
128}
129
130//------------------------------------------------------------------------------
131
Zane Shelleyc62813d2023-08-22 16:52:19 -0500132pdbg_target* getParentProcessor(pdbg_target* i_target)
133{
134 assert(nullptr != i_target);
135
136 // Check if the given target is already a processor chip.
137 if (TYPE_PROC == getTrgtType(i_target))
138 {
139 return i_target; // simply return the given target
140 }
141
142 // Get the parent processor chip.
143 pdbg_target* parentChip = pdbg_target_parent("proc", i_target);
144
145 // There should always be a parent chip. Throw an error if not found.
146 if (nullptr == parentChip)
147 {
148 throw std::logic_error("No parent chip found: i_target=" +
149 std::string{getPath(i_target)});
150 }
151
152 return parentChip;
153}
154
155//------------------------------------------------------------------------------
156
Zane Shelley2a394cb2022-02-17 22:01:39 -0600157pdbg_target* getChipUnit(pdbg_target* i_parentChip, TargetType_t i_unitType,
158 uint8_t i_unitPos)
159{
160 assert(nullptr != i_parentChip);
161
162 auto parentType = getTrgtType(i_parentChip);
163
164 std::string devTreeType{};
165
166 if (TYPE_PROC == parentType)
167 {
168 // clang-format off
169 static const std::map<TargetType_t, std::string> m =
170 {
171 {TYPE_MC, "mc" },
172 {TYPE_MCC, "mcc" },
173 {TYPE_OMI, "omi" },
174 {TYPE_OMIC, "omic" },
175 {TYPE_PAUC, "pauc" },
176 {TYPE_PAU, "pau" },
177 {TYPE_NMMU, "nmmu" },
178 {TYPE_IOHS, "iohs" },
179 {TYPE_IOLINK, "smpgroup"},
180 {TYPE_EQ, "eq" },
181 {TYPE_CORE, "core" },
182 {TYPE_PEC, "pec" },
183 {TYPE_PHB, "phb" },
184 {TYPE_NX, "nx" },
185 };
186 // clang-format on
187
188 devTreeType = m.at(i_unitType);
189 }
190 else if (TYPE_OCMB == parentType)
191 {
192 // clang-format off
193 static const std::map<TargetType_t, std::string> m =
194 {
195 {TYPE_MEM_PORT, "mem_port"},
196 };
197 // clang-format on
198
199 devTreeType = m.at(i_unitType);
200 }
201 else
202 {
203 throw std::logic_error("Unexpected parent chip: " +
204 std::string{getPath(i_parentChip)});
205 }
206
207 // Iterate all children of the parent and match the unit position.
208 pdbg_target* unitTarget = nullptr;
209 pdbg_for_each_target(devTreeType.c_str(), i_parentChip, unitTarget)
210 {
211 if (nullptr != unitTarget && i_unitPos == getUnitPos(unitTarget))
212 {
213 break; // found it
214 }
215 }
216
217 // Print a warning if the target unit is not found, but don't throw an
218 // error. Instead let the calling code deal with the it.
219 if (nullptr == unitTarget)
220 {
221 trace::err("No unit target found: i_parentChip=%s i_unitType=0x%02x "
222 "i_unitPos=%u",
223 getPath(i_parentChip), i_unitType, i_unitPos);
224 }
225
226 return unitTarget;
227}
228
229//------------------------------------------------------------------------------
230
Caleb Palmer626270a2022-02-21 11:05:08 -0600231pdbg_target* getTargetAcrossBus(pdbg_target* i_rxTarget)
232{
233 assert(nullptr != i_rxTarget);
234
235 // Validate target type
236 auto rxType = util::pdbg::getTrgtType(i_rxTarget);
237 assert(util::pdbg::TYPE_IOLINK == rxType ||
238 util::pdbg::TYPE_IOHS == rxType);
239
240 pdbg_target* o_peerTarget;
241 fs::path filePath;
242
243 // Open the appropriate data file depending on machine type
244 util::dbus::MachineType machineType = util::dbus::getMachineType();
245 switch (machineType)
246 {
247 // Rainier 4U
248 case util::dbus::MachineType::Rainier_2S4U:
249 case util::dbus::MachineType::Rainier_1S4U:
Patrick Williams27dd6362023-05-10 07:51:20 -0500250 filePath = fs::path{PACKAGE_DIR
251 "util-data/peer-targets-rainier-4u.json"};
Caleb Palmer626270a2022-02-21 11:05:08 -0600252 break;
253 // Rainier 2U
254 case util::dbus::MachineType::Rainier_2S2U:
255 case util::dbus::MachineType::Rainier_1S2U:
Patrick Williams27dd6362023-05-10 07:51:20 -0500256 filePath = fs::path{PACKAGE_DIR
257 "util-data/peer-targets-rainier-2u.json"};
Caleb Palmer626270a2022-02-21 11:05:08 -0600258 break;
259 // Everest
260 case util::dbus::MachineType::Everest:
Patrick Williams27dd6362023-05-10 07:51:20 -0500261 filePath = fs::path{PACKAGE_DIR
262 "util-data/peer-targets-everest.json"};
Caleb Palmer626270a2022-02-21 11:05:08 -0600263 break;
Zane Shelleya7dc66b2023-11-06 14:01:18 -0600264 // Bonnell
265 case util::dbus::MachineType::Bonnell:
266 filePath = fs::path{PACKAGE_DIR
267 "util-data/peer-targets-bonnell.json"};
268 break;
Caleb Palmer626270a2022-02-21 11:05:08 -0600269 default:
270 trace::err("Invalid machine type found %d",
271 static_cast<uint8_t>(machineType));
272 break;
273 }
274
275 std::ifstream file{filePath};
276 assert(file.good());
277
278 try
279 {
Patrick Williams27dd6362023-05-10 07:51:20 -0500280 auto trgtMap = nlohmann::json::parse(file);
281 std::string rxPath = util::pdbg::getPath(i_rxTarget);
Caleb Palmer626270a2022-02-21 11:05:08 -0600282 std::string peerPath = trgtMap.at(rxPath).get<std::string>();
283
284 o_peerTarget = util::pdbg::getTrgt(peerPath);
285 }
286 catch (...)
287 {
288 trace::err("Failed to parse file: %s", filePath.string().c_str());
289 throw;
290 }
291
292 return o_peerTarget;
293}
294
295//------------------------------------------------------------------------------
296
Zane Shelley38501e12022-01-10 15:42:28 -0600297pdbg_target* getConnectedTarget(pdbg_target* i_rxTarget,
298 const callout::BusType& i_busType)
299{
300 assert(nullptr != i_rxTarget);
301
302 pdbg_target* txTarget = nullptr;
303
Patrick Williams27dd6362023-05-10 07:51:20 -0500304 auto rxType = util::pdbg::getTrgtType(i_rxTarget);
Zane Shelley38501e12022-01-10 15:42:28 -0600305 std::string rxPath = util::pdbg::getPath(i_rxTarget);
306
307 if (callout::BusType::SMP_BUS == i_busType &&
308 util::pdbg::TYPE_IOLINK == rxType)
309 {
Caleb Palmer626270a2022-02-21 11:05:08 -0600310 txTarget = getTargetAcrossBus(i_rxTarget);
Zane Shelley38501e12022-01-10 15:42:28 -0600311 }
312 else if (callout::BusType::SMP_BUS == i_busType &&
313 util::pdbg::TYPE_IOHS == rxType)
314 {
Caleb Palmer626270a2022-02-21 11:05:08 -0600315 txTarget = getTargetAcrossBus(i_rxTarget);
Zane Shelley38501e12022-01-10 15:42:28 -0600316 }
317 else if (callout::BusType::OMI_BUS == i_busType &&
318 util::pdbg::TYPE_OMI == rxType)
319 {
320 // This is a bit clunky. The pdbg APIs only give us the ability to
Caleb Palmer626270a2022-02-21 11:05:08 -0600321 // iterate over the children instead of just returning a list. So
322 // we'll push all the children to a list and go from there.
Zane Shelley38501e12022-01-10 15:42:28 -0600323 std::vector<pdbg_target*> childList;
324
325 pdbg_target* childTarget = nullptr;
326 pdbg_for_each_target("ocmb", i_rxTarget, childTarget)
327 {
328 if (nullptr != childTarget)
329 {
330 childList.push_back(childTarget);
331 }
332 }
333
334 // We know there should only be one OCMB per OMI.
335 if (1 != childList.size())
336 {
337 throw std::logic_error("Invalid child list size for " + rxPath);
338 }
339
340 // Get the connected target.
341 txTarget = childList.front();
342 }
343 else if (callout::BusType::OMI_BUS == i_busType &&
344 util::pdbg::TYPE_OCMB == rxType)
345 {
346 txTarget = pdbg_target_parent("omi", i_rxTarget);
347 if (nullptr == txTarget)
348 {
349 throw std::logic_error("No parent OMI found for " + rxPath);
350 }
351 }
352 else
353 {
354 // This would be a code bug.
355 throw std::logic_error("Unsupported config: i_rxTarget=" + rxPath +
356 " i_busType=" + i_busType.getString());
357 }
358
359 assert(nullptr != txTarget); // just in case we missed something above
360
361 return txTarget;
362}
363
364//------------------------------------------------------------------------------
365
Zane Shelley171a2e02020-11-13 13:56:13 -0600366pdbg_target* getPibTrgt(pdbg_target* i_procTrgt)
367{
368 // The input target must be a processor.
Zane Shelley35171d92020-12-03 13:31:13 -0600369 assert(TYPE_PROC == getTrgtType(i_procTrgt));
Zane Shelley171a2e02020-11-13 13:56:13 -0600370
371 // Get the pib path.
372 char path[16];
373 sprintf(path, "/proc%d/pib", pdbg_target_index(i_procTrgt));
374
375 // Return the pib target.
376 pdbg_target* pibTrgt = pdbg_target_from_path(nullptr, path);
377 assert(nullptr != pibTrgt);
378
379 return pibTrgt;
380}
381
382//------------------------------------------------------------------------------
383
Zane Shelleyff76b6b2020-11-18 13:54:26 -0600384pdbg_target* getFsiTrgt(pdbg_target* i_procTrgt)
385{
386 // The input target must be a processor.
Zane Shelley35171d92020-12-03 13:31:13 -0600387 assert(TYPE_PROC == getTrgtType(i_procTrgt));
Zane Shelleyff76b6b2020-11-18 13:54:26 -0600388
389 // Get the fsi path.
390 char path[16];
391 sprintf(path, "/proc%d/fsi", pdbg_target_index(i_procTrgt));
392
393 // Return the fsi target.
394 pdbg_target* fsiTrgt = pdbg_target_from_path(nullptr, path);
395 assert(nullptr != fsiTrgt);
396
397 return fsiTrgt;
398}
399
400//------------------------------------------------------------------------------
401
Zane Shelley35171d92020-12-03 13:31:13 -0600402// IMPORTANT:
Caleb Palmer626270a2022-02-21 11:05:08 -0600403// The ATTR_CHIP_ID attribute will be synced from Hostboot to the BMC at
404// some point during the IPL. It is possible that this information is needed
405// before the sync occurs, in which case the value will return 0.
Zane Shelley171a2e02020-11-13 13:56:13 -0600406uint32_t __getChipId(pdbg_target* i_trgt)
407{
408 uint32_t attr = 0;
409 pdbg_target_get_attribute(i_trgt, "ATTR_CHIP_ID", 4, 1, &attr);
410 return attr;
411}
412
Zane Shelley35171d92020-12-03 13:31:13 -0600413// IMPORTANT:
Caleb Palmer626270a2022-02-21 11:05:08 -0600414// The ATTR_EC attribute will be synced from Hostboot to the BMC at some
415// point during the IPL. It is possible that this information is needed
416// before the sync occurs, in which case the value will return 0.
Zane Shelley171a2e02020-11-13 13:56:13 -0600417uint8_t __getChipEc(pdbg_target* i_trgt)
418{
419 uint8_t attr = 0;
420 pdbg_target_get_attribute(i_trgt, "ATTR_EC", 1, 1, &attr);
421 return attr;
422}
423
424uint32_t __getChipIdEc(pdbg_target* i_trgt)
425{
Zane Shelley35171d92020-12-03 13:31:13 -0600426 auto chipId = __getChipId(i_trgt);
427 auto chipEc = __getChipEc(i_trgt);
428
429 if (((0 == chipId) || (0 == chipEc)) && (TYPE_PROC == getTrgtType(i_trgt)))
430 {
431 // There is a special case where the model/level attributes have not
Caleb Palmer626270a2022-02-21 11:05:08 -0600432 // been initialized in the devtree. This is possible on the epoch
433 // IPL where an attention occurs before Hostboot is able to update
434 // the devtree information on the BMC. It may is still possible to
435 // get this information from chips with CFAM access (i.e. a
436 // processor) via the CFAM chip ID register.
Zane Shelley35171d92020-12-03 13:31:13 -0600437
438 uint32_t val = 0;
439 if (0 == getCfam(i_trgt, 0x100a, val))
440 {
441 chipId = ((val & 0x0F0FF000) >> 12);
442 chipEc = ((val & 0xF0000000) >> 24) | ((val & 0x00F00000) >> 20);
443 }
444 }
445
446 return ((chipId & 0xffff) << 16) | (chipEc & 0xff);
Zane Shelley171a2e02020-11-13 13:56:13 -0600447}
448
449void __addChip(std::vector<libhei::Chip>& o_chips, pdbg_target* i_trgt,
450 libhei::ChipType_t i_type)
451{
Caleb Palmer626270a2022-02-21 11:05:08 -0600452 // Trace each chip for debug. It is important to show the type just in
453 // case the model/EC does not exist. See note below.
Zane Shelley171a2e02020-11-13 13:56:13 -0600454 trace::inf("Chip found: type=0x%08" PRIx32 " chip=%s", i_type,
455 getPath(i_trgt));
456
457 if (0 == i_type)
458 {
Caleb Palmer626270a2022-02-21 11:05:08 -0600459 // This is a special case. See the details in __getChipIdEC(). There
460 // is nothing more we can do with this chip since we don't know what
461 // it is. So ignore the chip for now.
Zane Shelley171a2e02020-11-13 13:56:13 -0600462 }
463 else
464 {
465 o_chips.emplace_back(i_trgt, i_type);
466 }
467}
468
Zane Shelleycd6373d2022-05-12 16:49:56 -0500469// Should ignore OCMBs that have been masked on the processor side of the bus.
470bool __isMaskedOcmb(const libhei::Chip& i_chip)
471{
472 // TODO: This function only works for P10 processors will need to update for
473 // subsequent chips.
474
475 // Map of MCC target position to DSTL_FIR_MASK address.
476 static const std::map<unsigned int, uint64_t> addrs = {
477 {0, 0x0C010D03}, {1, 0x0C010D43}, {2, 0x0D010D03}, {3, 0x0D010D43},
478 {4, 0x0E010D03}, {5, 0x0E010D43}, {6, 0x0F010D03}, {7, 0x0F010D43},
479 };
480
481 auto ocmb = getTrgt(i_chip);
482
483 // Confirm this chip is an OCMB.
484 if (TYPE_OCMB != getTrgtType(ocmb))
485 {
486 return false;
487 }
488
489 // Get the connected MCC target on the processor chip.
490 auto mcc = pdbg_target_parent("mcc", ocmb);
491 if (nullptr == mcc)
492 {
493 throw std::logic_error("No parent MCC found for " +
494 std::string{getPath(ocmb)});
495 }
496
497 // Read the associated DSTL_FIR_MASK.
498 uint64_t val = 0;
499 if (getScom(getParentChip(mcc), addrs.at(getUnitPos(mcc)), val))
500 {
501 // Just let this go. The SCOM code will log the error.
502 return false;
503 }
504
505 // The DSTL_FIR has bits for each of the two memory channels on the MCC.
506 auto chnlPos = getChipPos(ocmb) % 2;
507
508 // Channel 0 => bits 0-3, channel 1 => bits 4-7.
509 auto mask = (val >> (60 - (4 * chnlPos))) & 0xf;
510
511 // Return true if the mask is set to all 1's.
512 if (0xf == mask)
513 {
514 trace::inf("OCMB masked on processor side of bus: %s", getPath(ocmb));
515 return true;
516 }
517
518 return false; // default
519}
520
Zane Shelley171a2e02020-11-13 13:56:13 -0600521void getActiveChips(std::vector<libhei::Chip>& o_chips)
522{
523 o_chips.clear();
524
525 // Iterate each processor.
526 pdbg_target* procTrgt;
527 pdbg_for_each_class_target("proc", procTrgt)
528 {
529 // We cannot use the proc target to determine if the chip is active.
530 // There is some design limitation in pdbg that requires the proc
Caleb Palmer626270a2022-02-21 11:05:08 -0600531 // targets to always be active. Instead, we must get the associated
532 // pib target and check if it is active.
Zane Shelley171a2e02020-11-13 13:56:13 -0600533
534 // Active processors only.
535 if (PDBG_TARGET_ENABLED != pdbg_target_probe(getPibTrgt(procTrgt)))
536 continue;
537
538 // Add the processor to the list.
539 __addChip(o_chips, procTrgt, __getChipIdEc(procTrgt));
540
541 // Iterate the connected OCMBs, if they exist.
542 pdbg_target* ocmbTrgt;
543 pdbg_for_each_target("ocmb", procTrgt, ocmbTrgt)
544 {
545 // Active OCMBs only.
546 if (PDBG_TARGET_ENABLED != pdbg_target_probe(ocmbTrgt))
547 continue;
548
549 // Add the OCMB to the list.
550 __addChip(o_chips, ocmbTrgt, __getChipIdEc(ocmbTrgt));
551 }
552 }
Zane Shelleycd6373d2022-05-12 16:49:56 -0500553
554 // Ignore OCMBs that have been masked on the processor side of the bus.
555 o_chips.erase(
556 std::remove_if(o_chips.begin(), o_chips.end(), __isMaskedOcmb),
557 o_chips.end());
Zane Shelley171a2e02020-11-13 13:56:13 -0600558}
559
560//------------------------------------------------------------------------------
561
Zane Shelley3f363d42022-02-10 16:20:37 -0600562void getActiveProcessorChips(std::vector<pdbg_target*>& o_chips)
563{
564 o_chips.clear();
565
566 pdbg_target* procTrgt;
567 pdbg_for_each_class_target("proc", procTrgt)
568 {
569 // We cannot use the proc target to determine if the chip is active.
570 // There is some design limitation in pdbg that requires the proc
571 // targets to always be active. Instead, we must get the associated pib
572 // target and check if it is active.
573
574 if (PDBG_TARGET_ENABLED != pdbg_target_probe(getPibTrgt(procTrgt)))
575 continue;
576
577 o_chips.push_back(procTrgt);
578 }
579}
580
581//------------------------------------------------------------------------------
582
Zane Shelleyc18ba8f2021-12-01 16:29:20 -0600583pdbg_target* getPrimaryProcessor()
584{
Caleb Palmer626270a2022-02-21 11:05:08 -0600585 // TODO: For at least P10, the primary processor (the one connected
586 // directly
Zane Shelleyc18ba8f2021-12-01 16:29:20 -0600587 // to the BMC), will always be PROC 0. We will need to update this
588 // later if we ever support an alternate primary processor.
589 return getTrgt("/proc0");
590}
591
592//------------------------------------------------------------------------------
593
Zane Shelley7ae9c8c2020-12-02 20:10:31 -0600594bool queryHardwareAnalysisSupported()
595{
596 // Hardware analysis is only supported on P10 systems and up.
Zane Shelley5183af32020-12-07 14:49:03 -0600597 return (PDBG_PROC_P9 < pdbg_get_proc());
Zane Shelley7ae9c8c2020-12-02 20:10:31 -0600598}
599
600//------------------------------------------------------------------------------
601
Zane Shelley3a851082021-03-23 16:45:28 -0500602std::string getLocationCode(pdbg_target* trgt)
603{
604 if (nullptr == trgt)
605 {
606 // Either the path is wrong or the attribute doesn't exist.
607 return std::string{};
608 }
609
610#ifdef CONFIG_PHAL_API
611
612 ATTR_LOCATION_CODE_Type val;
613 if (DT_GET_PROP(ATTR_LOCATION_CODE, trgt, val))
614 {
615 // Get the immediate parent in the devtree path and try again.
616 return getLocationCode(pdbg_target_parent(nullptr, trgt));
617 }
618
619 // Attribute found.
620 return std::string{val};
621
622#else
623
624 return std::string{getPath(trgt)};
625
626#endif
627}
628
629//------------------------------------------------------------------------------
630
631std::string getPhysDevPath(pdbg_target* trgt)
632{
633 if (nullptr == trgt)
634 {
635 // Either the path is wrong or the attribute doesn't exist.
636 return std::string{};
637 }
638
639#ifdef CONFIG_PHAL_API
640
641 ATTR_PHYS_DEV_PATH_Type val;
642 if (DT_GET_PROP(ATTR_PHYS_DEV_PATH, trgt, val))
643 {
644 // Get the immediate parent in the devtree path and try again.
645 return getPhysDevPath(pdbg_target_parent(nullptr, trgt));
646 }
647
648 // Attribute found.
649 return std::string{val};
650
651#else
652
653 return std::string{getPath(trgt)};
654
655#endif
656}
657
658//------------------------------------------------------------------------------
659
Zane Shelleybf3326f2021-11-12 13:41:39 -0600660std::vector<uint8_t> getPhysBinPath(pdbg_target* target)
661{
662 std::vector<uint8_t> binPath;
663
664 if (nullptr != target)
665 {
666#ifdef CONFIG_PHAL_API
667
668 ATTR_PHYS_BIN_PATH_Type value;
669 if (DT_GET_PROP(ATTR_PHYS_BIN_PATH, target, value))
670 {
Caleb Palmer626270a2022-02-21 11:05:08 -0600671 // The attrirbute for this target does not exist. Get the
672 // immediate parent in the devtree path and try again. Note that
673 // if there is no parent target, nullptr will be returned and
674 // that will be checked above.
Zane Shelleybf3326f2021-11-12 13:41:39 -0600675 return getPhysBinPath(pdbg_target_parent(nullptr, target));
676 }
677
678 // Attribute was found. Copy the attribute array to the returned
679 // vector. Note that the reason we return the vector instead of just
680 // returning the array is because the array type and details only
681 // exists in this specific configuration.
682 binPath.insert(binPath.end(), value, value + sizeof(value));
683
684#endif
685 }
686
687 return binPath;
688}
689
690//------------------------------------------------------------------------------
691
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -0600692} // namespace pdbg
693
694} // namespace util