blob: ab0b429e95f9726fae87d175b2aaee0ea16b9d74 [file] [log] [blame]
Zane Shelleye90b85d2021-12-17 17:24:49 -06001//------------------------------------------------------------------------------
2// IMPORTANT:
3// This file will be built in CI test and should work out-of-the-box in CI test
4// with use of the fake device tree. Any functions that require addition support
5// to simulate in CI test should be put in `pdbg_no_sim.cpp`.
6//------------------------------------------------------------------------------
7
Zane Shelley171a2e02020-11-13 13:56:13 -06008#include <assert.h>
Zane Shelleye4bfb472021-08-10 12:47:32 -05009#include <config.h>
Zane Shelley171a2e02020-11-13 13:56:13 -060010
Zane Shelley7ae9c8c2020-12-02 20:10:31 -060011#include <hei_main.hpp>
Caleb Palmer626270a2022-02-21 11:05:08 -060012#include <nlohmann/json.hpp>
13#include <util/dbus.hpp>
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -060014#include <util/pdbg.hpp>
Zane Shelley171a2e02020-11-13 13:56:13 -060015#include <util/trace.hpp>
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -060016
Caleb Palmer626270a2022-02-21 11:05:08 -060017#include <filesystem>
18#include <fstream>
19#include <string>
20
Zane Shelley3a851082021-03-23 16:45:28 -050021#ifdef CONFIG_PHAL_API
Zane Shelleye4bfb472021-08-10 12:47:32 -050022#include <attributes_info.H>
Zane Shelley3a851082021-03-23 16:45:28 -050023#endif
24
Zane Shelley38501e12022-01-10 15:42:28 -060025using namespace analyzer;
26
Caleb Palmer626270a2022-02-21 11:05:08 -060027namespace fs = std::filesystem;
28
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -060029namespace util
30{
31
32namespace pdbg
33{
34
35//------------------------------------------------------------------------------
36
Zane Shelleya0299852020-11-13 13:38:04 -060037pdbg_target* getTrgt(const libhei::Chip& i_chip)
38{
39 return (pdbg_target*)i_chip.getChip();
40}
41
42//------------------------------------------------------------------------------
43
Zane Shelley236bb732021-03-24 17:07:46 -050044pdbg_target* getTrgt(const std::string& i_path)
45{
46 return pdbg_target_from_path(nullptr, i_path.c_str());
47}
48
49//------------------------------------------------------------------------------
50
Zane Shelleya0299852020-11-13 13:38:04 -060051const char* getPath(pdbg_target* i_trgt)
52{
53 return pdbg_target_path(i_trgt);
54}
55
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -060056const char* getPath(const libhei::Chip& i_chip)
57{
Zane Shelleya0299852020-11-13 13:38:04 -060058 return getPath(getTrgt(i_chip));
59}
60
61//------------------------------------------------------------------------------
62
63uint32_t getChipPos(pdbg_target* i_trgt)
64{
65 uint32_t attr = 0;
66 pdbg_target_get_attribute(i_trgt, "ATTR_FAPI_POS", 4, 1, &attr);
67 return attr;
68}
69
70uint32_t getChipPos(const libhei::Chip& i_chip)
71{
72 return getChipPos(getTrgt(i_chip));
73}
74
75//------------------------------------------------------------------------------
76
Zane Shelley2a394cb2022-02-17 22:01:39 -060077uint8_t getUnitPos(pdbg_target* i_trgt)
78{
79 uint8_t attr = 0;
80 pdbg_target_get_attribute(i_trgt, "ATTR_CHIP_UNIT_POS", 1, 1, &attr);
81 return attr;
82}
83
84//------------------------------------------------------------------------------
85
Zane Shelleya0299852020-11-13 13:38:04 -060086uint8_t getTrgtType(pdbg_target* i_trgt)
87{
88 uint8_t attr = 0;
89 pdbg_target_get_attribute(i_trgt, "ATTR_TYPE", 1, 1, &attr);
90 return attr;
91}
92
93uint8_t getTrgtType(const libhei::Chip& i_chip)
94{
95 return getTrgtType(getTrgt(i_chip));
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -060096}
97
98//------------------------------------------------------------------------------
99
Zane Shelley2a394cb2022-02-17 22:01:39 -0600100pdbg_target* getParentChip(pdbg_target* i_unitTarget)
101{
102 assert(nullptr != i_unitTarget);
103
104 // Check if the given target is already a chip.
105 auto targetType = getTrgtType(i_unitTarget);
106 if (TYPE_PROC == targetType || TYPE_OCMB == targetType)
107 {
108 return i_unitTarget; // simply return the given target
109 }
110
111 // Check if this unit is on an OCMB.
112 pdbg_target* parentChip = pdbg_target_parent("ocmb", i_unitTarget);
113
114 // If not on the OCMB, check if this unit is on a PROC.
115 if (nullptr == parentChip)
116 {
117 parentChip = pdbg_target_parent("proc", i_unitTarget);
118 }
119
120 // There should always be a parent chip. Throw an error if not found.
121 if (nullptr == parentChip)
122 {
123 throw std::logic_error("No parent chip found: i_unitTarget=" +
124 std::string{getPath(i_unitTarget)});
125 }
126
127 return parentChip;
128}
129
130//------------------------------------------------------------------------------
131
132pdbg_target* getChipUnit(pdbg_target* i_parentChip, TargetType_t i_unitType,
133 uint8_t i_unitPos)
134{
135 assert(nullptr != i_parentChip);
136
137 auto parentType = getTrgtType(i_parentChip);
138
139 std::string devTreeType{};
140
141 if (TYPE_PROC == parentType)
142 {
143 // clang-format off
144 static const std::map<TargetType_t, std::string> m =
145 {
146 {TYPE_MC, "mc" },
147 {TYPE_MCC, "mcc" },
148 {TYPE_OMI, "omi" },
149 {TYPE_OMIC, "omic" },
150 {TYPE_PAUC, "pauc" },
151 {TYPE_PAU, "pau" },
152 {TYPE_NMMU, "nmmu" },
153 {TYPE_IOHS, "iohs" },
154 {TYPE_IOLINK, "smpgroup"},
155 {TYPE_EQ, "eq" },
156 {TYPE_CORE, "core" },
157 {TYPE_PEC, "pec" },
158 {TYPE_PHB, "phb" },
159 {TYPE_NX, "nx" },
160 };
161 // clang-format on
162
163 devTreeType = m.at(i_unitType);
164 }
165 else if (TYPE_OCMB == parentType)
166 {
167 // clang-format off
168 static const std::map<TargetType_t, std::string> m =
169 {
170 {TYPE_MEM_PORT, "mem_port"},
171 };
172 // clang-format on
173
174 devTreeType = m.at(i_unitType);
175 }
176 else
177 {
178 throw std::logic_error("Unexpected parent chip: " +
179 std::string{getPath(i_parentChip)});
180 }
181
182 // Iterate all children of the parent and match the unit position.
183 pdbg_target* unitTarget = nullptr;
184 pdbg_for_each_target(devTreeType.c_str(), i_parentChip, unitTarget)
185 {
186 if (nullptr != unitTarget && i_unitPos == getUnitPos(unitTarget))
187 {
188 break; // found it
189 }
190 }
191
192 // Print a warning if the target unit is not found, but don't throw an
193 // error. Instead let the calling code deal with the it.
194 if (nullptr == unitTarget)
195 {
196 trace::err("No unit target found: i_parentChip=%s i_unitType=0x%02x "
197 "i_unitPos=%u",
198 getPath(i_parentChip), i_unitType, i_unitPos);
199 }
200
201 return unitTarget;
202}
203
204//------------------------------------------------------------------------------
205
Caleb Palmer626270a2022-02-21 11:05:08 -0600206pdbg_target* getTargetAcrossBus(pdbg_target* i_rxTarget)
207{
208 assert(nullptr != i_rxTarget);
209
210 // Validate target type
211 auto rxType = util::pdbg::getTrgtType(i_rxTarget);
212 assert(util::pdbg::TYPE_IOLINK == rxType ||
213 util::pdbg::TYPE_IOHS == rxType);
214
215 pdbg_target* o_peerTarget;
216 fs::path filePath;
217
218 // Open the appropriate data file depending on machine type
219 util::dbus::MachineType machineType = util::dbus::getMachineType();
220 switch (machineType)
221 {
222 // Rainier 4U
223 case util::dbus::MachineType::Rainier_2S4U:
224 case util::dbus::MachineType::Rainier_1S4U:
225 filePath =
226 fs::path{PACKAGE_DIR "util-data/peer-targets-rainier-4u.json"};
227 break;
228 // Rainier 2U
229 case util::dbus::MachineType::Rainier_2S2U:
230 case util::dbus::MachineType::Rainier_1S2U:
231 filePath =
232 fs::path{PACKAGE_DIR "util-data/peer-targets-rainier-2u.json"};
233 break;
234 // Everest
235 case util::dbus::MachineType::Everest:
236 filePath =
237 fs::path{PACKAGE_DIR "util-data/peer-targets-everest.json"};
238 break;
239 default:
240 trace::err("Invalid machine type found %d",
241 static_cast<uint8_t>(machineType));
242 break;
243 }
244
245 std::ifstream file{filePath};
246 assert(file.good());
247
248 try
249 {
250 auto trgtMap = nlohmann::json::parse(file);
251 std::string rxPath = util::pdbg::getPath(i_rxTarget);
252 std::string peerPath = trgtMap.at(rxPath).get<std::string>();
253
254 o_peerTarget = util::pdbg::getTrgt(peerPath);
255 }
256 catch (...)
257 {
258 trace::err("Failed to parse file: %s", filePath.string().c_str());
259 throw;
260 }
261
262 return o_peerTarget;
263}
264
265//------------------------------------------------------------------------------
266
Zane Shelley38501e12022-01-10 15:42:28 -0600267pdbg_target* getConnectedTarget(pdbg_target* i_rxTarget,
268 const callout::BusType& i_busType)
269{
270 assert(nullptr != i_rxTarget);
271
272 pdbg_target* txTarget = nullptr;
273
274 auto rxType = util::pdbg::getTrgtType(i_rxTarget);
275 std::string rxPath = util::pdbg::getPath(i_rxTarget);
276
277 if (callout::BusType::SMP_BUS == i_busType &&
278 util::pdbg::TYPE_IOLINK == rxType)
279 {
Caleb Palmer626270a2022-02-21 11:05:08 -0600280 txTarget = getTargetAcrossBus(i_rxTarget);
Zane Shelley38501e12022-01-10 15:42:28 -0600281 }
282 else if (callout::BusType::SMP_BUS == i_busType &&
283 util::pdbg::TYPE_IOHS == rxType)
284 {
Caleb Palmer626270a2022-02-21 11:05:08 -0600285 txTarget = getTargetAcrossBus(i_rxTarget);
Zane Shelley38501e12022-01-10 15:42:28 -0600286 }
287 else if (callout::BusType::OMI_BUS == i_busType &&
288 util::pdbg::TYPE_OMI == rxType)
289 {
290 // This is a bit clunky. The pdbg APIs only give us the ability to
Caleb Palmer626270a2022-02-21 11:05:08 -0600291 // iterate over the children instead of just returning a list. So
292 // we'll push all the children to a list and go from there.
Zane Shelley38501e12022-01-10 15:42:28 -0600293 std::vector<pdbg_target*> childList;
294
295 pdbg_target* childTarget = nullptr;
296 pdbg_for_each_target("ocmb", i_rxTarget, childTarget)
297 {
298 if (nullptr != childTarget)
299 {
300 childList.push_back(childTarget);
301 }
302 }
303
304 // We know there should only be one OCMB per OMI.
305 if (1 != childList.size())
306 {
307 throw std::logic_error("Invalid child list size for " + rxPath);
308 }
309
310 // Get the connected target.
311 txTarget = childList.front();
312 }
313 else if (callout::BusType::OMI_BUS == i_busType &&
314 util::pdbg::TYPE_OCMB == rxType)
315 {
316 txTarget = pdbg_target_parent("omi", i_rxTarget);
317 if (nullptr == txTarget)
318 {
319 throw std::logic_error("No parent OMI found for " + rxPath);
320 }
321 }
322 else
323 {
324 // This would be a code bug.
325 throw std::logic_error("Unsupported config: i_rxTarget=" + rxPath +
326 " i_busType=" + i_busType.getString());
327 }
328
329 assert(nullptr != txTarget); // just in case we missed something above
330
331 return txTarget;
332}
333
334//------------------------------------------------------------------------------
335
Zane Shelley171a2e02020-11-13 13:56:13 -0600336pdbg_target* getPibTrgt(pdbg_target* i_procTrgt)
337{
338 // The input target must be a processor.
Zane Shelley35171d92020-12-03 13:31:13 -0600339 assert(TYPE_PROC == getTrgtType(i_procTrgt));
Zane Shelley171a2e02020-11-13 13:56:13 -0600340
341 // Get the pib path.
342 char path[16];
343 sprintf(path, "/proc%d/pib", pdbg_target_index(i_procTrgt));
344
345 // Return the pib target.
346 pdbg_target* pibTrgt = pdbg_target_from_path(nullptr, path);
347 assert(nullptr != pibTrgt);
348
349 return pibTrgt;
350}
351
352//------------------------------------------------------------------------------
353
Zane Shelleyff76b6b2020-11-18 13:54:26 -0600354pdbg_target* getFsiTrgt(pdbg_target* i_procTrgt)
355{
356 // The input target must be a processor.
Zane Shelley35171d92020-12-03 13:31:13 -0600357 assert(TYPE_PROC == getTrgtType(i_procTrgt));
Zane Shelleyff76b6b2020-11-18 13:54:26 -0600358
359 // Get the fsi path.
360 char path[16];
361 sprintf(path, "/proc%d/fsi", pdbg_target_index(i_procTrgt));
362
363 // Return the fsi target.
364 pdbg_target* fsiTrgt = pdbg_target_from_path(nullptr, path);
365 assert(nullptr != fsiTrgt);
366
367 return fsiTrgt;
368}
369
370//------------------------------------------------------------------------------
371
Zane Shelley35171d92020-12-03 13:31:13 -0600372// IMPORTANT:
Caleb Palmer626270a2022-02-21 11:05:08 -0600373// The ATTR_CHIP_ID attribute will be synced from Hostboot to the BMC at
374// some point during the IPL. It is possible that this information is needed
375// before the sync occurs, in which case the value will return 0.
Zane Shelley171a2e02020-11-13 13:56:13 -0600376uint32_t __getChipId(pdbg_target* i_trgt)
377{
378 uint32_t attr = 0;
379 pdbg_target_get_attribute(i_trgt, "ATTR_CHIP_ID", 4, 1, &attr);
380 return attr;
381}
382
Zane Shelley35171d92020-12-03 13:31:13 -0600383// IMPORTANT:
Caleb Palmer626270a2022-02-21 11:05:08 -0600384// The ATTR_EC attribute will be synced from Hostboot to the BMC at some
385// point during the IPL. It is possible that this information is needed
386// before the sync occurs, in which case the value will return 0.
Zane Shelley171a2e02020-11-13 13:56:13 -0600387uint8_t __getChipEc(pdbg_target* i_trgt)
388{
389 uint8_t attr = 0;
390 pdbg_target_get_attribute(i_trgt, "ATTR_EC", 1, 1, &attr);
391 return attr;
392}
393
394uint32_t __getChipIdEc(pdbg_target* i_trgt)
395{
Zane Shelley35171d92020-12-03 13:31:13 -0600396 auto chipId = __getChipId(i_trgt);
397 auto chipEc = __getChipEc(i_trgt);
398
399 if (((0 == chipId) || (0 == chipEc)) && (TYPE_PROC == getTrgtType(i_trgt)))
400 {
401 // There is a special case where the model/level attributes have not
Caleb Palmer626270a2022-02-21 11:05:08 -0600402 // been initialized in the devtree. This is possible on the epoch
403 // IPL where an attention occurs before Hostboot is able to update
404 // the devtree information on the BMC. It may is still possible to
405 // get this information from chips with CFAM access (i.e. a
406 // processor) via the CFAM chip ID register.
Zane Shelley35171d92020-12-03 13:31:13 -0600407
408 uint32_t val = 0;
409 if (0 == getCfam(i_trgt, 0x100a, val))
410 {
411 chipId = ((val & 0x0F0FF000) >> 12);
412 chipEc = ((val & 0xF0000000) >> 24) | ((val & 0x00F00000) >> 20);
413 }
414 }
415
416 return ((chipId & 0xffff) << 16) | (chipEc & 0xff);
Zane Shelley171a2e02020-11-13 13:56:13 -0600417}
418
419void __addChip(std::vector<libhei::Chip>& o_chips, pdbg_target* i_trgt,
420 libhei::ChipType_t i_type)
421{
Caleb Palmer626270a2022-02-21 11:05:08 -0600422 // Trace each chip for debug. It is important to show the type just in
423 // case the model/EC does not exist. See note below.
Zane Shelley171a2e02020-11-13 13:56:13 -0600424 trace::inf("Chip found: type=0x%08" PRIx32 " chip=%s", i_type,
425 getPath(i_trgt));
426
427 if (0 == i_type)
428 {
Caleb Palmer626270a2022-02-21 11:05:08 -0600429 // This is a special case. See the details in __getChipIdEC(). There
430 // is nothing more we can do with this chip since we don't know what
431 // it is. So ignore the chip for now.
Zane Shelley171a2e02020-11-13 13:56:13 -0600432 }
433 else
434 {
435 o_chips.emplace_back(i_trgt, i_type);
436 }
437}
438
Zane Shelleycd6373d2022-05-12 16:49:56 -0500439// Should ignore OCMBs that have been masked on the processor side of the bus.
440bool __isMaskedOcmb(const libhei::Chip& i_chip)
441{
442 // TODO: This function only works for P10 processors will need to update for
443 // subsequent chips.
444
445 // Map of MCC target position to DSTL_FIR_MASK address.
446 static const std::map<unsigned int, uint64_t> addrs = {
447 {0, 0x0C010D03}, {1, 0x0C010D43}, {2, 0x0D010D03}, {3, 0x0D010D43},
448 {4, 0x0E010D03}, {5, 0x0E010D43}, {6, 0x0F010D03}, {7, 0x0F010D43},
449 };
450
451 auto ocmb = getTrgt(i_chip);
452
453 // Confirm this chip is an OCMB.
454 if (TYPE_OCMB != getTrgtType(ocmb))
455 {
456 return false;
457 }
458
459 // Get the connected MCC target on the processor chip.
460 auto mcc = pdbg_target_parent("mcc", ocmb);
461 if (nullptr == mcc)
462 {
463 throw std::logic_error("No parent MCC found for " +
464 std::string{getPath(ocmb)});
465 }
466
467 // Read the associated DSTL_FIR_MASK.
468 uint64_t val = 0;
469 if (getScom(getParentChip(mcc), addrs.at(getUnitPos(mcc)), val))
470 {
471 // Just let this go. The SCOM code will log the error.
472 return false;
473 }
474
475 // The DSTL_FIR has bits for each of the two memory channels on the MCC.
476 auto chnlPos = getChipPos(ocmb) % 2;
477
478 // Channel 0 => bits 0-3, channel 1 => bits 4-7.
479 auto mask = (val >> (60 - (4 * chnlPos))) & 0xf;
480
481 // Return true if the mask is set to all 1's.
482 if (0xf == mask)
483 {
484 trace::inf("OCMB masked on processor side of bus: %s", getPath(ocmb));
485 return true;
486 }
487
488 return false; // default
489}
490
Zane Shelley171a2e02020-11-13 13:56:13 -0600491void getActiveChips(std::vector<libhei::Chip>& o_chips)
492{
493 o_chips.clear();
494
495 // Iterate each processor.
496 pdbg_target* procTrgt;
497 pdbg_for_each_class_target("proc", procTrgt)
498 {
499 // We cannot use the proc target to determine if the chip is active.
500 // There is some design limitation in pdbg that requires the proc
Caleb Palmer626270a2022-02-21 11:05:08 -0600501 // targets to always be active. Instead, we must get the associated
502 // pib target and check if it is active.
Zane Shelley171a2e02020-11-13 13:56:13 -0600503
504 // Active processors only.
505 if (PDBG_TARGET_ENABLED != pdbg_target_probe(getPibTrgt(procTrgt)))
506 continue;
507
508 // Add the processor to the list.
509 __addChip(o_chips, procTrgt, __getChipIdEc(procTrgt));
510
511 // Iterate the connected OCMBs, if they exist.
512 pdbg_target* ocmbTrgt;
513 pdbg_for_each_target("ocmb", procTrgt, ocmbTrgt)
514 {
515 // Active OCMBs only.
516 if (PDBG_TARGET_ENABLED != pdbg_target_probe(ocmbTrgt))
517 continue;
518
519 // Add the OCMB to the list.
520 __addChip(o_chips, ocmbTrgt, __getChipIdEc(ocmbTrgt));
521 }
522 }
Zane Shelleycd6373d2022-05-12 16:49:56 -0500523
524 // Ignore OCMBs that have been masked on the processor side of the bus.
525 o_chips.erase(
526 std::remove_if(o_chips.begin(), o_chips.end(), __isMaskedOcmb),
527 o_chips.end());
Zane Shelley171a2e02020-11-13 13:56:13 -0600528}
529
530//------------------------------------------------------------------------------
531
Zane Shelley3f363d42022-02-10 16:20:37 -0600532void getActiveProcessorChips(std::vector<pdbg_target*>& o_chips)
533{
534 o_chips.clear();
535
536 pdbg_target* procTrgt;
537 pdbg_for_each_class_target("proc", procTrgt)
538 {
539 // We cannot use the proc target to determine if the chip is active.
540 // There is some design limitation in pdbg that requires the proc
541 // targets to always be active. Instead, we must get the associated pib
542 // target and check if it is active.
543
544 if (PDBG_TARGET_ENABLED != pdbg_target_probe(getPibTrgt(procTrgt)))
545 continue;
546
547 o_chips.push_back(procTrgt);
548 }
549}
550
551//------------------------------------------------------------------------------
552
Zane Shelleyc18ba8f2021-12-01 16:29:20 -0600553pdbg_target* getPrimaryProcessor()
554{
Caleb Palmer626270a2022-02-21 11:05:08 -0600555 // TODO: For at least P10, the primary processor (the one connected
556 // directly
Zane Shelleyc18ba8f2021-12-01 16:29:20 -0600557 // to the BMC), will always be PROC 0. We will need to update this
558 // later if we ever support an alternate primary processor.
559 return getTrgt("/proc0");
560}
561
562//------------------------------------------------------------------------------
563
Zane Shelley7ae9c8c2020-12-02 20:10:31 -0600564bool queryHardwareAnalysisSupported()
565{
566 // Hardware analysis is only supported on P10 systems and up.
Zane Shelley5183af32020-12-07 14:49:03 -0600567 return (PDBG_PROC_P9 < pdbg_get_proc());
Zane Shelley7ae9c8c2020-12-02 20:10:31 -0600568}
569
570//------------------------------------------------------------------------------
571
Zane Shelley3a851082021-03-23 16:45:28 -0500572std::string getLocationCode(pdbg_target* trgt)
573{
574 if (nullptr == trgt)
575 {
576 // Either the path is wrong or the attribute doesn't exist.
577 return std::string{};
578 }
579
580#ifdef CONFIG_PHAL_API
581
582 ATTR_LOCATION_CODE_Type val;
583 if (DT_GET_PROP(ATTR_LOCATION_CODE, trgt, val))
584 {
585 // Get the immediate parent in the devtree path and try again.
586 return getLocationCode(pdbg_target_parent(nullptr, trgt));
587 }
588
589 // Attribute found.
590 return std::string{val};
591
592#else
593
594 return std::string{getPath(trgt)};
595
596#endif
597}
598
599//------------------------------------------------------------------------------
600
601std::string getPhysDevPath(pdbg_target* trgt)
602{
603 if (nullptr == trgt)
604 {
605 // Either the path is wrong or the attribute doesn't exist.
606 return std::string{};
607 }
608
609#ifdef CONFIG_PHAL_API
610
611 ATTR_PHYS_DEV_PATH_Type val;
612 if (DT_GET_PROP(ATTR_PHYS_DEV_PATH, trgt, val))
613 {
614 // Get the immediate parent in the devtree path and try again.
615 return getPhysDevPath(pdbg_target_parent(nullptr, trgt));
616 }
617
618 // Attribute found.
619 return std::string{val};
620
621#else
622
623 return std::string{getPath(trgt)};
624
625#endif
626}
627
628//------------------------------------------------------------------------------
629
Zane Shelleybf3326f2021-11-12 13:41:39 -0600630std::vector<uint8_t> getPhysBinPath(pdbg_target* target)
631{
632 std::vector<uint8_t> binPath;
633
634 if (nullptr != target)
635 {
636#ifdef CONFIG_PHAL_API
637
638 ATTR_PHYS_BIN_PATH_Type value;
639 if (DT_GET_PROP(ATTR_PHYS_BIN_PATH, target, value))
640 {
Caleb Palmer626270a2022-02-21 11:05:08 -0600641 // The attrirbute for this target does not exist. Get the
642 // immediate parent in the devtree path and try again. Note that
643 // if there is no parent target, nullptr will be returned and
644 // that will be checked above.
Zane Shelleybf3326f2021-11-12 13:41:39 -0600645 return getPhysBinPath(pdbg_target_parent(nullptr, target));
646 }
647
648 // Attribute was found. Copy the attribute array to the returned
649 // vector. Note that the reason we return the vector instead of just
650 // returning the array is because the array type and details only
651 // exists in this specific configuration.
652 binPath.insert(binPath.end(), value, value + sizeof(value));
653
654#endif
655 }
656
657 return binPath;
658}
659
660//------------------------------------------------------------------------------
661
Zane Shelleyf4bd5ff2020-11-05 22:26:04 -0600662} // namespace pdbg
663
664} // namespace util