blob: 2e81fe5d5b6dc367d24f81537a0cbfce6fd1f955 [file] [log] [blame]
Zane Shelleye90b85d2021-12-17 17:24:49 -06001//------------------------------------------------------------------------------
2// IMPORTANT:
3// This file will ONLY be built in CI test and should be used for any functions
4// that require addition support to simulate in CI test. Any functions that will
5// work out-of-the-box in CI test with use of the fake device tree should be put
6// in `pdbg.cpp`.
7//------------------------------------------------------------------------------
8
9#include <assert.h>
10
Zane Shelleyc7026262022-02-22 16:37:36 -060011#include <test/sim-hw-access.hpp>
Zane Shelleye90b85d2021-12-17 17:24:49 -060012#include <util/pdbg.hpp>
13#include <util/trace.hpp>
14
15//------------------------------------------------------------------------------
16
17// Using this to fake the value returned from the simulation-only version of
18// util::pdbg::queryLpcTimeout().
19bool g_lpcTimeout = false;
20
21namespace util
22{
23namespace pdbg
24{
25
Zane Shelleyc7026262022-02-22 16:37:36 -060026//------------------------------------------------------------------------------
27
Zane Shelleye90b85d2021-12-17 17:24:49 -060028// This is the simulated version of this function.
29bool queryLpcTimeout(pdbg_target* target)
30{
31 // Must be a processor target.
32 assert(TYPE_PROC == getTrgtType(target));
33
34 // Instead of the SBE chip-op, use the faked value.
35 return g_lpcTimeout;
36}
37
Zane Shelleyc7026262022-02-22 16:37:36 -060038//------------------------------------------------------------------------------
39
40int getScom(pdbg_target* i_target, uint64_t i_addr, uint64_t& o_val)
41{
42 assert(nullptr != i_target);
43 assert(TYPE_PROC == getTrgtType(i_target) ||
44 TYPE_OCMB == getTrgtType(i_target));
45
46 int rc = sim::ScomAccess::getSingleton().get(i_target, i_addr, o_val);
47
48 if (0 != rc)
49 {
50 trace::err("SCOM read failure: target=%s addr=0x%0" PRIx64,
51 getPath(i_target), i_addr);
52 }
53
54 return rc;
55}
56
57//------------------------------------------------------------------------------
58
59int getCfam(pdbg_target* i_target, uint32_t i_addr, uint32_t& o_val)
60{
61 assert(nullptr != i_target);
62 assert(TYPE_PROC == getTrgtType(i_target));
63
64 int rc = sim::CfamAccess::getSingleton().get(i_target, i_addr, o_val);
65
66 if (0 != rc)
67 {
68 trace::err("CFAM read failure: target=%s addr=0x%08x",
69 getPath(i_target), i_addr);
70 }
71
72 return rc;
73}
74
75//------------------------------------------------------------------------------
76
Zane Shelleye90b85d2021-12-17 17:24:49 -060077} // namespace pdbg
78} // namespace util